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authorYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>2007-10-02 10:21:36 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-10-11 18:46:14 -0400
commitf13558c2a4a7339192ff7148ee903340affdb790 (patch)
treeee42395f24b7e7ba723b6e132178ad7dde0cd25e
parent3282bd3cb0c7653e604c0d3666331281ae8f74c4 (diff)
[MIPS] Cobalt: Remove cobalt_machine_power_off()
It's same as cobalt_machine_halt(). Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/cobalt/reset.c9
-rw-r--r--arch/mips/cobalt/setup.c3
2 files changed, 1 insertions, 11 deletions
diff --git a/arch/mips/cobalt/reset.c b/arch/mips/cobalt/reset.c
index 81628b3ae621..71eb4ccc4bc1 100644
--- a/arch/mips/cobalt/reset.c
+++ b/arch/mips/cobalt/reset.c
@@ -61,12 +61,3 @@ void cobalt_machine_restart(char *command)
61 /* we should never get here */ 61 /* we should never get here */
62 cobalt_machine_halt(); 62 cobalt_machine_halt();
63} 63}
64
65/*
66 * This triggers the luser mode device driver for the power switch ;-)
67 */
68void cobalt_machine_power_off(void)
69{
70 printk("You can switch the machine off now.\n");
71 cobalt_machine_halt();
72}
diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c
index 345e4ae998df..d11bb1bc7b6b 100644
--- a/arch/mips/cobalt/setup.c
+++ b/arch/mips/cobalt/setup.c
@@ -25,7 +25,6 @@
25 25
26extern void cobalt_machine_restart(char *command); 26extern void cobalt_machine_restart(char *command);
27extern void cobalt_machine_halt(void); 27extern void cobalt_machine_halt(void);
28extern void cobalt_machine_power_off(void);
29 28
30const char *get_system_type(void) 29const char *get_system_type(void)
31{ 30{
@@ -96,7 +95,7 @@ void __init plat_mem_setup(void)
96 95
97 _machine_restart = cobalt_machine_restart; 96 _machine_restart = cobalt_machine_restart;
98 _machine_halt = cobalt_machine_halt; 97 _machine_halt = cobalt_machine_halt;
99 pm_power_off = cobalt_machine_power_off; 98 pm_power_off = cobalt_machine_halt;
100 99
101 set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE)); 100 set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE));
102 101