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authorAlex Porosanu <alexandru.porosanu@freescale.com>2013-09-09 11:56:33 -0400
committerHerbert Xu <herbert@gondor.apana.org.au>2013-09-13 07:43:55 -0400
commitf1157a5bf383bd811d27e8924543dd629a2e34c0 (patch)
tree074b22518e91b285fd46ab3bb32e8e98ada386fb
parentb1f996e0b3b00c98f0ac8ffef1a6572cbc735bbc (diff)
crypto: caam - fix RNG4 AAI defines
RNG4 defines in desc.h were incomplete (bits AI & PS were missing), while SK was set as an ALG related bit. This patchs adds the missing bits and corrects the SK bit. Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
-rw-r--r--drivers/crypto/caam/ctrl.c2
-rw-r--r--drivers/crypto/caam/desc.h17
2 files changed, 10 insertions, 9 deletions
diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index 9e9215ac130e..29cbec18a3a8 100644
--- a/drivers/crypto/caam/ctrl.c
+++ b/drivers/crypto/caam/ctrl.c
@@ -39,7 +39,7 @@ static void build_instantiation_desc(u32 *desc)
39 39
40 /* generate secure keys (non-test) */ 40 /* generate secure keys (non-test) */
41 append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG | 41 append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
42 OP_ALG_RNG4_SK); 42 OP_ALG_AAI_RNG4_SK);
43 43
44 append_jump(desc, JUMP_CLASS_CLASS1 | JUMP_TYPE_HALT); 44 append_jump(desc, JUMP_CLASS_CLASS1 | JUMP_TYPE_HALT);
45} 45}
diff --git a/drivers/crypto/caam/desc.h b/drivers/crypto/caam/desc.h
index 53b296f78b0d..7e4500f18df6 100644
--- a/drivers/crypto/caam/desc.h
+++ b/drivers/crypto/caam/desc.h
@@ -1155,8 +1155,15 @@ struct sec4_sg_entry {
1155 1155
1156/* randomizer AAI set */ 1156/* randomizer AAI set */
1157#define OP_ALG_AAI_RNG (0x00 << OP_ALG_AAI_SHIFT) 1157#define OP_ALG_AAI_RNG (0x00 << OP_ALG_AAI_SHIFT)
1158#define OP_ALG_AAI_RNG_NOZERO (0x10 << OP_ALG_AAI_SHIFT) 1158#define OP_ALG_AAI_RNG_NZB (0x10 << OP_ALG_AAI_SHIFT)
1159#define OP_ALG_AAI_RNG_ODD (0x20 << OP_ALG_AAI_SHIFT) 1159#define OP_ALG_AAI_RNG_OBP (0x20 << OP_ALG_AAI_SHIFT)
1160
1161/* RNG4 AAI set */
1162#define OP_ALG_AAI_RNG4_SH_0 (0x00 << OP_ALG_AAI_SHIFT)
1163#define OP_ALG_AAI_RNG4_SH_1 (0x01 << OP_ALG_AAI_SHIFT)
1164#define OP_ALG_AAI_RNG4_PS (0x40 << OP_ALG_AAI_SHIFT)
1165#define OP_ALG_AAI_RNG4_AI (0x80 << OP_ALG_AAI_SHIFT)
1166#define OP_ALG_AAI_RNG4_SK (0x100 << OP_ALG_AAI_SHIFT)
1160 1167
1161/* hmac/smac AAI set */ 1168/* hmac/smac AAI set */
1162#define OP_ALG_AAI_HASH (0x00 << OP_ALG_AAI_SHIFT) 1169#define OP_ALG_AAI_HASH (0x00 << OP_ALG_AAI_SHIFT)
@@ -1178,12 +1185,6 @@ struct sec4_sg_entry {
1178#define OP_ALG_AAI_GSM (0x10 << OP_ALG_AAI_SHIFT) 1185#define OP_ALG_AAI_GSM (0x10 << OP_ALG_AAI_SHIFT)
1179#define OP_ALG_AAI_EDGE (0x20 << OP_ALG_AAI_SHIFT) 1186#define OP_ALG_AAI_EDGE (0x20 << OP_ALG_AAI_SHIFT)
1180 1187
1181/* RNG4 set */
1182#define OP_ALG_RNG4_SHIFT 4
1183#define OP_ALG_RNG4_MASK (0x1f3 << OP_ALG_RNG4_SHIFT)
1184
1185#define OP_ALG_RNG4_SK (0x100 << OP_ALG_RNG4_SHIFT)
1186
1187#define OP_ALG_AS_SHIFT 2 1188#define OP_ALG_AS_SHIFT 2
1188#define OP_ALG_AS_MASK (0x3 << OP_ALG_AS_SHIFT) 1189#define OP_ALG_AS_MASK (0x3 << OP_ALG_AS_SHIFT)
1189#define OP_ALG_AS_UPDATE (0 << OP_ALG_AS_SHIFT) 1190#define OP_ALG_AS_UPDATE (0 << OP_ALG_AS_SHIFT)