diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-05-04 10:57:13 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-05-04 10:57:13 -0400 |
commit | f0f376f204b6047bbb405180f796e93cc8444f09 (patch) | |
tree | 3a2a298df7ef5ae64033d02bfe0dd326430f8f83 | |
parent | 08542241cf710d1b7c28c63b2213be4b7b1b3362 (diff) | |
parent | c994ead62ce9599e56344be9b3bead08f242aa79 (diff) |
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie:
"Some minor fixes from Intel and a radeon fix.
I have the nouveau fix for the i2c regression queued for next week,
its mostly a revert and seems to work on the system it was originally
introduced for thanks to some i2c core changes."
* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
drm/radeon: clarify and extend wb setup on APUs and NI+ asics
drm/i915: enable dip before writing data on gen4
fixing dmi match for hp t5745 and hp st5747 thin client
drm/i915: Only enable IPS polling for gen5
drm/i915: Do not read non-existent DPLL registers on PCH hardware
-rw-r--r-- | drivers/gpu/drm/i915/i915_debugfs.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_dma.c | 15 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 9 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_hdmi.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_lvds.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_device.c | 4 |
6 files changed, 23 insertions, 14 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index b505b70dba05..e6162a1681f0 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c | |||
@@ -1224,6 +1224,9 @@ static int i915_emon_status(struct seq_file *m, void *unused) | |||
1224 | unsigned long temp, chipset, gfx; | 1224 | unsigned long temp, chipset, gfx; |
1225 | int ret; | 1225 | int ret; |
1226 | 1226 | ||
1227 | if (!IS_GEN5(dev)) | ||
1228 | return -ENODEV; | ||
1229 | |||
1227 | ret = mutex_lock_interruptible(&dev->struct_mutex); | 1230 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
1228 | if (ret) | 1231 | if (ret) |
1229 | return ret; | 1232 | return ret; |
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 785f67f963ef..ba60f3c8f911 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c | |||
@@ -1701,6 +1701,9 @@ void i915_update_gfx_val(struct drm_i915_private *dev_priv) | |||
1701 | unsigned long diffms; | 1701 | unsigned long diffms; |
1702 | u32 count; | 1702 | u32 count; |
1703 | 1703 | ||
1704 | if (dev_priv->info->gen != 5) | ||
1705 | return; | ||
1706 | |||
1704 | getrawmonotonic(&now); | 1707 | getrawmonotonic(&now); |
1705 | diff1 = timespec_sub(now, dev_priv->last_time2); | 1708 | diff1 = timespec_sub(now, dev_priv->last_time2); |
1706 | 1709 | ||
@@ -2121,12 +2124,14 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) | |||
2121 | setup_timer(&dev_priv->hangcheck_timer, i915_hangcheck_elapsed, | 2124 | setup_timer(&dev_priv->hangcheck_timer, i915_hangcheck_elapsed, |
2122 | (unsigned long) dev); | 2125 | (unsigned long) dev); |
2123 | 2126 | ||
2124 | spin_lock(&mchdev_lock); | 2127 | if (IS_GEN5(dev)) { |
2125 | i915_mch_dev = dev_priv; | 2128 | spin_lock(&mchdev_lock); |
2126 | dev_priv->mchdev_lock = &mchdev_lock; | 2129 | i915_mch_dev = dev_priv; |
2127 | spin_unlock(&mchdev_lock); | 2130 | dev_priv->mchdev_lock = &mchdev_lock; |
2131 | spin_unlock(&mchdev_lock); | ||
2128 | 2132 | ||
2129 | ips_ping_for_i915_load(); | 2133 | ips_ping_for_i915_load(); |
2134 | } | ||
2130 | 2135 | ||
2131 | return 0; | 2136 | return 0; |
2132 | 2137 | ||
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 5908cd563400..1b1cf3b3ff51 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -7072,9 +7072,6 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc) | |||
7072 | struct drm_device *dev = crtc->dev; | 7072 | struct drm_device *dev = crtc->dev; |
7073 | drm_i915_private_t *dev_priv = dev->dev_private; | 7073 | drm_i915_private_t *dev_priv = dev->dev_private; |
7074 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 7074 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
7075 | int pipe = intel_crtc->pipe; | ||
7076 | int dpll_reg = DPLL(pipe); | ||
7077 | int dpll = I915_READ(dpll_reg); | ||
7078 | 7075 | ||
7079 | if (HAS_PCH_SPLIT(dev)) | 7076 | if (HAS_PCH_SPLIT(dev)) |
7080 | return; | 7077 | return; |
@@ -7087,10 +7084,15 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc) | |||
7087 | * the manual case. | 7084 | * the manual case. |
7088 | */ | 7085 | */ |
7089 | if (!HAS_PIPE_CXSR(dev) && intel_crtc->lowfreq_avail) { | 7086 | if (!HAS_PIPE_CXSR(dev) && intel_crtc->lowfreq_avail) { |
7087 | int pipe = intel_crtc->pipe; | ||
7088 | int dpll_reg = DPLL(pipe); | ||
7089 | u32 dpll; | ||
7090 | |||
7090 | DRM_DEBUG_DRIVER("downclocking LVDS\n"); | 7091 | DRM_DEBUG_DRIVER("downclocking LVDS\n"); |
7091 | 7092 | ||
7092 | assert_panel_unlocked(dev_priv, pipe); | 7093 | assert_panel_unlocked(dev_priv, pipe); |
7093 | 7094 | ||
7095 | dpll = I915_READ(dpll_reg); | ||
7094 | dpll |= DISPLAY_RATE_SELECT_FPA1; | 7096 | dpll |= DISPLAY_RATE_SELECT_FPA1; |
7095 | I915_WRITE(dpll_reg, dpll); | 7097 | I915_WRITE(dpll_reg, dpll); |
7096 | intel_wait_for_vblank(dev, pipe); | 7098 | intel_wait_for_vblank(dev, pipe); |
@@ -7098,7 +7100,6 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc) | |||
7098 | if (!(dpll & DISPLAY_RATE_SELECT_FPA1)) | 7100 | if (!(dpll & DISPLAY_RATE_SELECT_FPA1)) |
7099 | DRM_DEBUG_DRIVER("failed to downclock LVDS!\n"); | 7101 | DRM_DEBUG_DRIVER("failed to downclock LVDS!\n"); |
7100 | } | 7102 | } |
7101 | |||
7102 | } | 7103 | } |
7103 | 7104 | ||
7104 | /** | 7105 | /** |
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index cae3e5f17a49..2d7f47b56b6a 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c | |||
@@ -136,7 +136,7 @@ static void i9xx_write_infoframe(struct drm_encoder *encoder, | |||
136 | 136 | ||
137 | val &= ~VIDEO_DIP_SELECT_MASK; | 137 | val &= ~VIDEO_DIP_SELECT_MASK; |
138 | 138 | ||
139 | I915_WRITE(VIDEO_DIP_CTL, val | port | flags); | 139 | I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE | val | port | flags); |
140 | 140 | ||
141 | for (i = 0; i < len; i += 4) { | 141 | for (i = 0; i < len; i += 4) { |
142 | I915_WRITE(VIDEO_DIP_DATA, *data); | 142 | I915_WRITE(VIDEO_DIP_DATA, *data); |
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index 30e2c82101de..9c71183629c2 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c | |||
@@ -750,7 +750,7 @@ static const struct dmi_system_id intel_no_lvds[] = { | |||
750 | .ident = "Hewlett-Packard t5745", | 750 | .ident = "Hewlett-Packard t5745", |
751 | .matches = { | 751 | .matches = { |
752 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), | 752 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), |
753 | DMI_MATCH(DMI_BOARD_NAME, "hp t5745"), | 753 | DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"), |
754 | }, | 754 | }, |
755 | }, | 755 | }, |
756 | { | 756 | { |
@@ -758,7 +758,7 @@ static const struct dmi_system_id intel_no_lvds[] = { | |||
758 | .ident = "Hewlett-Packard st5747", | 758 | .ident = "Hewlett-Packard st5747", |
759 | .matches = { | 759 | .matches = { |
760 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), | 760 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), |
761 | DMI_MATCH(DMI_BOARD_NAME, "hp st5747"), | 761 | DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"), |
762 | }, | 762 | }, |
763 | }, | 763 | }, |
764 | { | 764 | { |
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index ea7df16e2f84..5992502a3448 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
@@ -241,8 +241,8 @@ int radeon_wb_init(struct radeon_device *rdev) | |||
241 | rdev->wb.use_event = true; | 241 | rdev->wb.use_event = true; |
242 | } | 242 | } |
243 | } | 243 | } |
244 | /* always use writeback/events on NI */ | 244 | /* always use writeback/events on NI, APUs */ |
245 | if (ASIC_IS_DCE5(rdev)) { | 245 | if (rdev->family >= CHIP_PALM) { |
246 | rdev->wb.enabled = true; | 246 | rdev->wb.enabled = true; |
247 | rdev->wb.use_event = true; | 247 | rdev->wb.use_event = true; |
248 | } | 248 | } |