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authorShawn Guo <shawn.guo@freescale.com>2011-06-01 22:57:50 -0400
committerChris Ball <cjb@laptop.org>2011-07-20 17:20:49 -0400
commitf0de836923186e1fc0acb65299c2f2089c7992af (patch)
tree4cfaf194295559500dee84646af4ded4ba94faf9
parent100e918610b7487fa18db97b3879cd8d1fdd5974 (diff)
mmc: sdhci: change sdhci-pltfm into a module
There are a couple of problems left from the sdhci pltfm and OF consolidation changes. * When building more than one sdhci-pltfm based drivers in the same image, linker will give multiple definition error on the sdhci-pltfm helper functions. For example right now, building sdhci-of-esdhc and sdhci-of-hlwd together is a valid combination from Kconfig view. * With the current build method, there is error with building the drivers as module, but module installation fails with modprobe. The patch fixes above problems by changing sdhci-pltfm into a module. To avoid EXPORT_SYMBOL on so many big endian IO accessors, it moves these accessors into sdhci-pltfm.h as the 'static inline' functions. As a result, sdhci.h needs to be included in sdhci-pltfm.h, and in turn can be removed from individual drivers which already include sdhci-pltfm.h. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
-rw-r--r--drivers/mmc/host/Kconfig37
-rw-r--r--drivers/mmc/host/Makefile7
-rw-r--r--drivers/mmc/host/sdhci-cns3xxx.c1
-rw-r--r--drivers/mmc/host/sdhci-dove.c1
-rw-r--r--drivers/mmc/host/sdhci-esdhc-imx.c1
-rw-r--r--drivers/mmc/host/sdhci-of-esdhc.c1
-rw-r--r--drivers/mmc/host/sdhci-of-hlwd.c1
-rw-r--r--drivers/mmc/host/sdhci-pltfm.c82
-rw-r--r--drivers/mmc/host/sdhci-pltfm.h67
-rw-r--r--drivers/mmc/host/sdhci-tegra.c1
10 files changed, 112 insertions, 87 deletions
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index ee4ac77b0eae..74e77c9af0f2 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -81,19 +81,32 @@ config MMC_RICOH_MMC
81 81
82 If unsure, say Y. 82 If unsure, say Y.
83 83
84config MMC_SDHCI_OF_ESDHC 84config MMC_SDHCI_PLTFM
85 bool "SDHCI OF support for the Freescale eSDHC controller" 85 tristate "SDHCI platform and OF driver helper"
86 depends on MMC_SDHCI 86 depends on MMC_SDHCI
87 help
88 This selects the common helper functions support for Secure Digital
89 Host Controller Interface based platform and OF drivers.
90
91 If you have a controller with this interface, say Y or M here.
92
93 If unsure, say N.
94
95config MMC_SDHCI_OF_ESDHC
96 tristate "SDHCI OF support for the Freescale eSDHC controller"
97 depends on MMC_SDHCI_PLTFM
87 depends on PPC_OF 98 depends on PPC_OF
88 select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER 99 select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
89 help 100 help
90 This selects the Freescale eSDHC controller support. 101 This selects the Freescale eSDHC controller support.
91 102
103 If you have a controller with this interface, say Y or M here.
104
92 If unsure, say N. 105 If unsure, say N.
93 106
94config MMC_SDHCI_OF_HLWD 107config MMC_SDHCI_OF_HLWD
95 bool "SDHCI OF support for the Nintendo Wii SDHCI controllers" 108 tristate "SDHCI OF support for the Nintendo Wii SDHCI controllers"
96 depends on MMC_SDHCI 109 depends on MMC_SDHCI_PLTFM
97 depends on PPC_OF 110 depends on PPC_OF
98 select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER 111 select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
99 help 112 help
@@ -101,43 +114,51 @@ config MMC_SDHCI_OF_HLWD
101 found in the "Hollywood" chipset of the Nintendo Wii video game 114 found in the "Hollywood" chipset of the Nintendo Wii video game
102 console. 115 console.
103 116
117 If you have a controller with this interface, say Y or M here.
118
104 If unsure, say N. 119 If unsure, say N.
105 120
106config MMC_SDHCI_CNS3XXX 121config MMC_SDHCI_CNS3XXX
107 tristate "SDHCI support on the Cavium Networks CNS3xxx SoC" 122 tristate "SDHCI support on the Cavium Networks CNS3xxx SoC"
108 depends on ARCH_CNS3XXX 123 depends on ARCH_CNS3XXX
109 depends on MMC_SDHCI 124 depends on MMC_SDHCI_PLTFM
110 help 125 help
111 This selects the SDHCI support for CNS3xxx System-on-Chip devices. 126 This selects the SDHCI support for CNS3xxx System-on-Chip devices.
112 127
128 If you have a controller with this interface, say Y or M here.
129
113 If unsure, say N. 130 If unsure, say N.
114 131
115config MMC_SDHCI_ESDHC_IMX 132config MMC_SDHCI_ESDHC_IMX
116 tristate "SDHCI platform support for the Freescale eSDHC i.MX controller" 133 tristate "SDHCI platform support for the Freescale eSDHC i.MX controller"
117 depends on ARCH_MX25 || ARCH_MX35 || ARCH_MX5 134 depends on ARCH_MX25 || ARCH_MX35 || ARCH_MX5
118 depends on MMC_SDHCI 135 depends on MMC_SDHCI_PLTFM
119 select MMC_SDHCI_IO_ACCESSORS 136 select MMC_SDHCI_IO_ACCESSORS
120 help 137 help
121 This selects the Freescale eSDHC controller support on the platform 138 This selects the Freescale eSDHC controller support on the platform
122 bus, found on platforms like mx35/51. 139 bus, found on platforms like mx35/51.
123 140
141 If you have a controller with this interface, say Y or M here.
142
124 If unsure, say N. 143 If unsure, say N.
125 144
126config MMC_SDHCI_DOVE 145config MMC_SDHCI_DOVE
127 tristate "SDHCI support on Marvell's Dove SoC" 146 tristate "SDHCI support on Marvell's Dove SoC"
128 depends on ARCH_DOVE 147 depends on ARCH_DOVE
129 depends on MMC_SDHCI 148 depends on MMC_SDHCI_PLTFM
130 select MMC_SDHCI_IO_ACCESSORS 149 select MMC_SDHCI_IO_ACCESSORS
131 help 150 help
132 This selects the Secure Digital Host Controller Interface in 151 This selects the Secure Digital Host Controller Interface in
133 Marvell's Dove SoC. 152 Marvell's Dove SoC.
134 153
154 If you have a controller with this interface, say Y or M here.
155
135 If unsure, say N. 156 If unsure, say N.
136 157
137config MMC_SDHCI_TEGRA 158config MMC_SDHCI_TEGRA
138 tristate "SDHCI platform support for the Tegra SD/MMC Controller" 159 tristate "SDHCI platform support for the Tegra SD/MMC Controller"
139 depends on ARCH_TEGRA 160 depends on ARCH_TEGRA
140 depends on MMC_SDHCI 161 depends on MMC_SDHCI_PLTFM
141 select MMC_SDHCI_IO_ACCESSORS 162 select MMC_SDHCI_IO_ACCESSORS
142 help 163 help
143 This selects the Tegra SD/MMC controller. If you have a Tegra 164 This selects the Tegra SD/MMC controller. If you have a Tegra
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index cbd89c310146..bf479ab5d33d 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -44,18 +44,13 @@ obj-$(CONFIG_MMC_JZ4740) += jz4740_mmc.o
44obj-$(CONFIG_MMC_VUB300) += vub300.o 44obj-$(CONFIG_MMC_VUB300) += vub300.o
45obj-$(CONFIG_MMC_USHC) += ushc.o 45obj-$(CONFIG_MMC_USHC) += ushc.o
46 46
47obj-$(CONFIG_MMC_SDHCI_PLTFM) += sdhci-pltfm.o
47obj-$(CONFIG_MMC_SDHCI_CNS3XXX) += sdhci-cns3xxx.o 48obj-$(CONFIG_MMC_SDHCI_CNS3XXX) += sdhci-cns3xxx.o
48sdhci-cns3xxx-objs := sdhci-pltfm.o
49obj-$(CONFIG_MMC_SDHCI_ESDHC_IMX) += sdhci-esdhc-imx.o 49obj-$(CONFIG_MMC_SDHCI_ESDHC_IMX) += sdhci-esdhc-imx.o
50sdhci-esdhc-imx-objs := sdhci-pltfm.o
51obj-$(CONFIG_MMC_SDHCI_DOVE) += sdhci-dove.o 50obj-$(CONFIG_MMC_SDHCI_DOVE) += sdhci-dove.o
52sdhci-dove-objs := sdhci-pltfm.o
53obj-$(CONFIG_MMC_SDHCI_TEGRA) += sdhci-tegra.o 51obj-$(CONFIG_MMC_SDHCI_TEGRA) += sdhci-tegra.o
54sdhci-tegra-objs := sdhci-pltfm.o
55obj-$(CONFIG_MMC_SDHCI_OF_ESDHC) += sdhci-of-esdhc.o 52obj-$(CONFIG_MMC_SDHCI_OF_ESDHC) += sdhci-of-esdhc.o
56sdhci-of-esdhc-objs := sdhci-pltfm.o
57obj-$(CONFIG_MMC_SDHCI_OF_HLWD) += sdhci-of-hlwd.o 53obj-$(CONFIG_MMC_SDHCI_OF_HLWD) += sdhci-of-hlwd.o
58sdhci-of-hlwd-objs := sdhci-pltfm.o
59 54
60ifeq ($(CONFIG_CB710_DEBUG),y) 55ifeq ($(CONFIG_CB710_DEBUG),y)
61 CFLAGS-cb710-mmc += -DDEBUG 56 CFLAGS-cb710-mmc += -DDEBUG
diff --git a/drivers/mmc/host/sdhci-cns3xxx.c b/drivers/mmc/host/sdhci-cns3xxx.c
index 025d1a5ab964..4b920b7621cf 100644
--- a/drivers/mmc/host/sdhci-cns3xxx.c
+++ b/drivers/mmc/host/sdhci-cns3xxx.c
@@ -16,7 +16,6 @@
16#include <linux/device.h> 16#include <linux/device.h>
17#include <linux/mmc/host.h> 17#include <linux/mmc/host.h>
18#include <mach/cns3xxx.h> 18#include <mach/cns3xxx.h>
19#include "sdhci.h"
20#include "sdhci-pltfm.h" 19#include "sdhci-pltfm.h"
21 20
22static unsigned int sdhci_cns3xxx_get_max_clk(struct sdhci_host *host) 21static unsigned int sdhci_cns3xxx_get_max_clk(struct sdhci_host *host)
diff --git a/drivers/mmc/host/sdhci-dove.c b/drivers/mmc/host/sdhci-dove.c
index 49aa533f23d4..f2d29dca4420 100644
--- a/drivers/mmc/host/sdhci-dove.c
+++ b/drivers/mmc/host/sdhci-dove.c
@@ -22,7 +22,6 @@
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/mmc/host.h> 23#include <linux/mmc/host.h>
24 24
25#include "sdhci.h"
26#include "sdhci-pltfm.h" 25#include "sdhci-pltfm.h"
27 26
28static u16 sdhci_dove_readw(struct sdhci_host *host, int reg) 27static u16 sdhci_dove_readw(struct sdhci_host *host, int reg)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index 977f1421ec27..7cfb768126cc 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -22,7 +22,6 @@
22#include <linux/mmc/sdio.h> 22#include <linux/mmc/sdio.h>
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <mach/esdhc.h> 24#include <mach/esdhc.h>
25#include "sdhci.h"
26#include "sdhci-pltfm.h" 25#include "sdhci-pltfm.h"
27#include "sdhci-esdhc.h" 26#include "sdhci-esdhc.h"
28 27
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
index 2db6a455d839..fe604df65011 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -17,7 +17,6 @@
17#include <linux/delay.h> 17#include <linux/delay.h>
18#include <linux/mmc/host.h> 18#include <linux/mmc/host.h>
19#include "sdhci-pltfm.h" 19#include "sdhci-pltfm.h"
20#include "sdhci.h"
21#include "sdhci-esdhc.h" 20#include "sdhci-esdhc.h"
22 21
23static u16 esdhc_readw(struct sdhci_host *host, int reg) 22static u16 esdhc_readw(struct sdhci_host *host, int reg)
diff --git a/drivers/mmc/host/sdhci-of-hlwd.c b/drivers/mmc/host/sdhci-of-hlwd.c
index faedfcec7760..735be131dca9 100644
--- a/drivers/mmc/host/sdhci-of-hlwd.c
+++ b/drivers/mmc/host/sdhci-of-hlwd.c
@@ -22,7 +22,6 @@
22#include <linux/delay.h> 22#include <linux/delay.h>
23#include <linux/mmc/host.h> 23#include <linux/mmc/host.h>
24#include "sdhci-pltfm.h" 24#include "sdhci-pltfm.h"
25#include "sdhci.h"
26 25
27/* 26/*
28 * Ops and quirks for the Nintendo Wii SDHCI controllers. 27 * Ops and quirks for the Nintendo Wii SDHCI controllers.
diff --git a/drivers/mmc/host/sdhci-pltfm.c b/drivers/mmc/host/sdhci-pltfm.c
index 041b0e2a898e..71c0ce1f6db0 100644
--- a/drivers/mmc/host/sdhci-pltfm.c
+++ b/drivers/mmc/host/sdhci-pltfm.c
@@ -33,69 +33,11 @@
33#ifdef CONFIG_PPC 33#ifdef CONFIG_PPC
34#include <asm/machdep.h> 34#include <asm/machdep.h>
35#endif 35#endif
36#include "sdhci.h"
37#include "sdhci-pltfm.h" 36#include "sdhci-pltfm.h"
38 37
39static struct sdhci_ops sdhci_pltfm_ops = { 38static struct sdhci_ops sdhci_pltfm_ops = {
40}; 39};
41 40
42#ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
43/*
44 * These accessors are designed for big endian hosts doing I/O to
45 * little endian controllers incorporating a 32-bit hardware byte swapper.
46 */
47u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
48{
49 return in_be32(host->ioaddr + reg);
50}
51
52u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
53{
54 return in_be16(host->ioaddr + (reg ^ 0x2));
55}
56
57u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
58{
59 return in_8(host->ioaddr + (reg ^ 0x3));
60}
61
62void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg)
63{
64 out_be32(host->ioaddr + reg, val);
65}
66
67void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg)
68{
69 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
70 int base = reg & ~0x3;
71 int shift = (reg & 0x2) * 8;
72
73 switch (reg) {
74 case SDHCI_TRANSFER_MODE:
75 /*
76 * Postpone this write, we must do it together with a
77 * command write that is down below.
78 */
79 pltfm_host->xfer_mode_shadow = val;
80 return;
81 case SDHCI_COMMAND:
82 sdhci_be32bs_writel(host,
83 val << 16 | pltfm_host->xfer_mode_shadow,
84 SDHCI_TRANSFER_MODE);
85 return;
86 }
87 clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift);
88}
89
90void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg)
91{
92 int base = reg & ~0x3;
93 int shift = (reg & 0x3) * 8;
94
95 clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift);
96}
97#endif /* CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER */
98
99#ifdef CONFIG_OF 41#ifdef CONFIG_OF
100static bool sdhci_of_wp_inverted(struct device_node *np) 42static bool sdhci_of_wp_inverted(struct device_node *np)
101{ 43{
@@ -136,6 +78,7 @@ void sdhci_get_of_property(struct platform_device *pdev)
136#else 78#else
137void sdhci_get_of_property(struct platform_device *pdev) {} 79void sdhci_get_of_property(struct platform_device *pdev) {}
138#endif /* CONFIG_OF */ 80#endif /* CONFIG_OF */
81EXPORT_SYMBOL_GPL(sdhci_get_of_property);
139 82
140struct sdhci_host *sdhci_pltfm_init(struct platform_device *pdev, 83struct sdhci_host *sdhci_pltfm_init(struct platform_device *pdev,
141 struct sdhci_pltfm_data *pdata) 84 struct sdhci_pltfm_data *pdata)
@@ -202,6 +145,7 @@ err:
202 dev_err(&pdev->dev, "%s failed %d\n", __func__, ret); 145 dev_err(&pdev->dev, "%s failed %d\n", __func__, ret);
203 return ERR_PTR(ret); 146 return ERR_PTR(ret);
204} 147}
148EXPORT_SYMBOL_GPL(sdhci_pltfm_init);
205 149
206void sdhci_pltfm_free(struct platform_device *pdev) 150void sdhci_pltfm_free(struct platform_device *pdev)
207{ 151{
@@ -213,6 +157,7 @@ void sdhci_pltfm_free(struct platform_device *pdev)
213 sdhci_free_host(host); 157 sdhci_free_host(host);
214 platform_set_drvdata(pdev, NULL); 158 platform_set_drvdata(pdev, NULL);
215} 159}
160EXPORT_SYMBOL_GPL(sdhci_pltfm_free);
216 161
217int sdhci_pltfm_register(struct platform_device *pdev, 162int sdhci_pltfm_register(struct platform_device *pdev,
218 struct sdhci_pltfm_data *pdata) 163 struct sdhci_pltfm_data *pdata)
@@ -232,6 +177,7 @@ int sdhci_pltfm_register(struct platform_device *pdev,
232 177
233 return ret; 178 return ret;
234} 179}
180EXPORT_SYMBOL_GPL(sdhci_pltfm_register);
235 181
236int sdhci_pltfm_unregister(struct platform_device *pdev) 182int sdhci_pltfm_unregister(struct platform_device *pdev)
237{ 183{
@@ -243,6 +189,7 @@ int sdhci_pltfm_unregister(struct platform_device *pdev)
243 189
244 return 0; 190 return 0;
245} 191}
192EXPORT_SYMBOL_GPL(sdhci_pltfm_unregister);
246 193
247#ifdef CONFIG_PM 194#ifdef CONFIG_PM
248int sdhci_pltfm_suspend(struct platform_device *dev, pm_message_t state) 195int sdhci_pltfm_suspend(struct platform_device *dev, pm_message_t state)
@@ -251,6 +198,7 @@ int sdhci_pltfm_suspend(struct platform_device *dev, pm_message_t state)
251 198
252 return sdhci_suspend_host(host, state); 199 return sdhci_suspend_host(host, state);
253} 200}
201EXPORT_SYMBOL_GPL(sdhci_pltfm_suspend);
254 202
255int sdhci_pltfm_resume(struct platform_device *dev) 203int sdhci_pltfm_resume(struct platform_device *dev)
256{ 204{
@@ -258,4 +206,22 @@ int sdhci_pltfm_resume(struct platform_device *dev)
258 206
259 return sdhci_resume_host(host); 207 return sdhci_resume_host(host);
260} 208}
209EXPORT_SYMBOL_GPL(sdhci_pltfm_resume);
261#endif /* CONFIG_PM */ 210#endif /* CONFIG_PM */
211
212static int __init sdhci_pltfm_drv_init(void)
213{
214 pr_info("sdhci-pltfm: SDHCI platform and OF driver helper\n");
215
216 return 0;
217}
218module_init(sdhci_pltfm_drv_init);
219
220static void __exit sdhci_pltfm_drv_exit(void)
221{
222}
223module_exit(sdhci_pltfm_drv_exit);
224
225MODULE_DESCRIPTION("SDHCI platform and OF driver helper");
226MODULE_AUTHOR("Intel Corporation");
227MODULE_LICENSE("GPL v2");
diff --git a/drivers/mmc/host/sdhci-pltfm.h b/drivers/mmc/host/sdhci-pltfm.h
index fd726948641a..3a9fc3f40840 100644
--- a/drivers/mmc/host/sdhci-pltfm.h
+++ b/drivers/mmc/host/sdhci-pltfm.h
@@ -12,9 +12,8 @@
12#define _DRIVERS_MMC_SDHCI_PLTFM_H 12#define _DRIVERS_MMC_SDHCI_PLTFM_H
13 13
14#include <linux/clk.h> 14#include <linux/clk.h>
15#include <linux/types.h>
16#include <linux/platform_device.h> 15#include <linux/platform_device.h>
17#include <linux/mmc/sdhci.h> 16#include "sdhci.h"
18 17
19struct sdhci_pltfm_data { 18struct sdhci_pltfm_data {
20 struct sdhci_ops *ops; 19 struct sdhci_ops *ops;
@@ -31,13 +30,63 @@ struct sdhci_pltfm_host {
31}; 30};
32 31
33#ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER 32#ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
34extern u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg); 33/*
35extern u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg); 34 * These accessors are designed for big endian hosts doing I/O to
36extern u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg); 35 * little endian controllers incorporating a 32-bit hardware byte swapper.
37extern void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg); 36 */
38extern void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg); 37static inline u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
39extern void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg); 38{
40#endif 39 return in_be32(host->ioaddr + reg);
40}
41
42static inline u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
43{
44 return in_be16(host->ioaddr + (reg ^ 0x2));
45}
46
47static inline u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
48{
49 return in_8(host->ioaddr + (reg ^ 0x3));
50}
51
52static inline void sdhci_be32bs_writel(struct sdhci_host *host,
53 u32 val, int reg)
54{
55 out_be32(host->ioaddr + reg, val);
56}
57
58static inline void sdhci_be32bs_writew(struct sdhci_host *host,
59 u16 val, int reg)
60{
61 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
62 int base = reg & ~0x3;
63 int shift = (reg & 0x2) * 8;
64
65 switch (reg) {
66 case SDHCI_TRANSFER_MODE:
67 /*
68 * Postpone this write, we must do it together with a
69 * command write that is down below.
70 */
71 pltfm_host->xfer_mode_shadow = val;
72 return;
73 case SDHCI_COMMAND:
74 sdhci_be32bs_writel(host,
75 val << 16 | pltfm_host->xfer_mode_shadow,
76 SDHCI_TRANSFER_MODE);
77 return;
78 }
79 clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift);
80}
81
82static inline void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg)
83{
84 int base = reg & ~0x3;
85 int shift = (reg & 0x3) * 8;
86
87 clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift);
88}
89#endif /* CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER */
41 90
42extern void sdhci_get_of_property(struct platform_device *pdev); 91extern void sdhci_get_of_property(struct platform_device *pdev);
43 92
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index 1f66aca5f506..18b0bd31de78 100644
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -24,7 +24,6 @@
24#include <mach/gpio.h> 24#include <mach/gpio.h>
25#include <mach/sdhci.h> 25#include <mach/sdhci.h>
26 26
27#include "sdhci.h"
28#include "sdhci-pltfm.h" 27#include "sdhci-pltfm.h"
29 28
30static u32 tegra_sdhci_readl(struct sdhci_host *host, int reg) 29static u32 tegra_sdhci_readl(struct sdhci_host *host, int reg)