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authorSascha Hauer <s.hauer@pengutronix.de>2012-05-03 06:06:14 -0400
committerMike Turquette <mturquette@linaro.org>2012-05-08 17:13:25 -0400
commitf0948f59dbc8e725a96ba16da666e8f5cdd43ba8 (patch)
tree9343cecfdb735b4b9c327edea65e71801b5c3efe
parent31df9db99549cd29bbe5e32da4492970e6f97191 (diff)
clk: add a fixed factor clock
Having fixed factors/dividers in hardware is a common pattern, so add a basic clock type doing this. It basically describes a fixed factor clock using a nominator and a denominator. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Viresh Kumar <viresh.kumar@st.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> [mturquette@linaro.org: constify parent_names in static init macro] [mturquette@linaro.org: copy/paste bug from mux in static init macro] [mturquette@linaro.org: fix error handling in clk_register_fixed_factor] [mturquette@linaro.org: improve division accuracy; thanks to Saravana] Signed-off-by: Mike Turquette <mturquette@linaro.org>
-rw-r--r--drivers/clk/Makefile2
-rw-r--r--drivers/clk/clk-fixed-factor.c95
-rw-r--r--include/linux/clk-private.h20
-rw-r--r--include/linux/clk-provider.h23
4 files changed, 139 insertions, 1 deletions
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 1f736bc11c4b..24aa7144811b 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -1,4 +1,4 @@
1 1
2obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o 2obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o
3obj-$(CONFIG_COMMON_CLK) += clk.o clk-fixed-rate.o clk-gate.o \ 3obj-$(CONFIG_COMMON_CLK) += clk.o clk-fixed-rate.o clk-gate.o \
4 clk-mux.o clk-divider.o 4 clk-mux.o clk-divider.o clk-fixed-factor.o
diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c
new file mode 100644
index 000000000000..c8c003e217ad
--- /dev/null
+++ b/drivers/clk/clk-fixed-factor.c
@@ -0,0 +1,95 @@
1/*
2 * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Standard functionality for the common clock API.
9 */
10#include <linux/module.h>
11#include <linux/clk-provider.h>
12#include <linux/slab.h>
13#include <linux/err.h>
14
15/*
16 * DOC: basic fixed multiplier and divider clock that cannot gate
17 *
18 * Traits of this clock:
19 * prepare - clk_prepare only ensures that parents are prepared
20 * enable - clk_enable only ensures that parents are enabled
21 * rate - rate is fixed. clk->rate = parent->rate / div * mult
22 * parent - fixed parent. No clk_set_parent support
23 */
24
25#define to_clk_fixed_factor(_hw) container_of(_hw, struct clk_fixed_factor, hw)
26
27static unsigned long clk_factor_recalc_rate(struct clk_hw *hw,
28 unsigned long parent_rate)
29{
30 struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);
31
32 return parent_rate * fix->mult / fix->div;
33}
34
35static long clk_factor_round_rate(struct clk_hw *hw, unsigned long rate,
36 unsigned long *prate)
37{
38 struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);
39
40 if (__clk_get_flags(hw->clk) & CLK_SET_RATE_PARENT) {
41 unsigned long best_parent;
42
43 best_parent = (rate / fix->mult) * fix->div;
44 *prate = __clk_round_rate(__clk_get_parent(hw->clk),
45 best_parent);
46 }
47
48 return (*prate / fix->div) * fix->mult;
49}
50
51static int clk_factor_set_rate(struct clk_hw *hw, unsigned long rate,
52 unsigned long parent_rate)
53{
54 return 0;
55}
56
57struct clk_ops clk_fixed_factor_ops = {
58 .round_rate = clk_factor_round_rate,
59 .set_rate = clk_factor_set_rate,
60 .recalc_rate = clk_factor_recalc_rate,
61};
62EXPORT_SYMBOL_GPL(clk_fixed_factor_ops);
63
64struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
65 const char *parent_name, unsigned long flags,
66 unsigned int mult, unsigned int div)
67{
68 struct clk_fixed_factor *fix;
69 struct clk_init_data init;
70 struct clk *clk;
71
72 fix = kmalloc(sizeof(*fix), GFP_KERNEL);
73 if (!fix) {
74 pr_err("%s: could not allocate fixed factor clk\n", __func__);
75 return ERR_PTR(-ENOMEM);
76 }
77
78 /* struct clk_fixed_factor assignments */
79 fix->mult = mult;
80 fix->div = div;
81 fix->hw.init = &init;
82
83 init.name = name;
84 init.ops = &clk_fixed_factor_ops;
85 init.flags = flags;
86 init.parent_names = &parent_name;
87 init.num_parents = 1;
88
89 clk = clk_register(dev, &fix->hw);
90
91 if (IS_ERR(clk))
92 kfree(fix);
93
94 return clk;
95}
diff --git a/include/linux/clk-private.h b/include/linux/clk-private.h
index b258532162b8..eb3f84bc5325 100644
--- a/include/linux/clk-private.h
+++ b/include/linux/clk-private.h
@@ -143,6 +143,26 @@ struct clk {
143 DEFINE_CLK(_name, clk_mux_ops, _flags, _parent_names, \ 143 DEFINE_CLK(_name, clk_mux_ops, _flags, _parent_names, \
144 _parents); 144 _parents);
145 145
146#define DEFINE_CLK_FIXED_FACTOR(_name, _parent_name, \
147 _parent_ptr, _flags, \
148 _mult, _div) \
149 static struct clk _name; \
150 static const char *_name##_parent_names[] = { \
151 _parent_name, \
152 }; \
153 static struct clk *_name##_parents[] = { \
154 _parent_ptr, \
155 }; \
156 static struct clk_fixed_factor _name##_hw = { \
157 .hw = { \
158 .clk = &_name, \
159 }, \
160 .mult = _mult, \
161 .div = _div, \
162 }; \
163 DEFINE_CLK(_name, clk_fixed_factor_ops, _flags, \
164 _name##_parent_names, _name##_parents);
165
146/** 166/**
147 * __clk_init - initialize the data structures in a struct clk 167 * __clk_init - initialize the data structures in a struct clk
148 * @dev: device initializing this clk, placeholder for now 168 * @dev: device initializing this clk, placeholder for now
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 5db3412106b3..c1c23b9ec368 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -277,6 +277,29 @@ struct clk *clk_register_mux(struct device *dev, const char *name,
277 u8 clk_mux_flags, spinlock_t *lock); 277 u8 clk_mux_flags, spinlock_t *lock);
278 278
279/** 279/**
280 * struct clk_fixed_factor - fixed multiplier and divider clock
281 *
282 * @hw: handle between common and hardware-specific interfaces
283 * @mult: multiplier
284 * @div: divider
285 *
286 * Clock with a fixed multiplier and divider. The output frequency is the
287 * parent clock rate divided by div and multiplied by mult.
288 * Implements .recalc_rate, .set_rate and .round_rate
289 */
290
291struct clk_fixed_factor {
292 struct clk_hw hw;
293 unsigned int mult;
294 unsigned int div;
295};
296
297extern struct clk_ops clk_fixed_factor_ops;
298struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
299 const char *parent_name, unsigned long flags,
300 unsigned int mult, unsigned int div);
301
302/**
280 * clk_register - allocate a new clock, register it and return an opaque cookie 303 * clk_register - allocate a new clock, register it and return an opaque cookie
281 * @dev: device that is registering this clock 304 * @dev: device that is registering this clock
282 * @hw: link to hardware-specific clock data 305 * @hw: link to hardware-specific clock data