diff options
| author | Ivo van Doorn <IvDoorn@gmail.com> | 2010-06-29 15:49:26 -0400 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2010-06-30 15:00:53 -0400 |
| commit | efc7d36f0d100eb2f2db33bc287fa17646bdcd7d (patch) | |
| tree | 3df7bf95d26aa93bb3fe6fd077f3ab371d2982d3 | |
| parent | e22557f2e3bdf0b56c2592c9aeb50f17945f71b0 (diff) | |
rt2x00: Always set BBP_CSR_CFG_BBP_RW_MODE to 1
Latest rt2870 legacy driver also sets BBP_CSR_CFG_BBP_RW_MODE to 1
when reading or writing the EEPROM. This means we can make the
BBP reading and writing completely equal on all platforms.
Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
| -rw-r--r-- | drivers/net/wireless/rt2x00/rt2800lib.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c index 0cf7796cdff5..f813b4388b63 100644 --- a/drivers/net/wireless/rt2x00/rt2800lib.c +++ b/drivers/net/wireless/rt2x00/rt2800lib.c | |||
| @@ -99,8 +99,7 @@ static void rt2800_bbp_write(struct rt2x00_dev *rt2x00dev, | |||
| 99 | rt2x00_set_field32(®, BBP_CSR_CFG_REGNUM, word); | 99 | rt2x00_set_field32(®, BBP_CSR_CFG_REGNUM, word); |
| 100 | rt2x00_set_field32(®, BBP_CSR_CFG_BUSY, 1); | 100 | rt2x00_set_field32(®, BBP_CSR_CFG_BUSY, 1); |
| 101 | rt2x00_set_field32(®, BBP_CSR_CFG_READ_CONTROL, 0); | 101 | rt2x00_set_field32(®, BBP_CSR_CFG_READ_CONTROL, 0); |
| 102 | if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev)) | 102 | rt2x00_set_field32(®, BBP_CSR_CFG_BBP_RW_MODE, 1); |
| 103 | rt2x00_set_field32(®, BBP_CSR_CFG_BBP_RW_MODE, 1); | ||
| 104 | 103 | ||
| 105 | rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg); | 104 | rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg); |
| 106 | } | 105 | } |
| @@ -128,8 +127,7 @@ static void rt2800_bbp_read(struct rt2x00_dev *rt2x00dev, | |||
| 128 | rt2x00_set_field32(®, BBP_CSR_CFG_REGNUM, word); | 127 | rt2x00_set_field32(®, BBP_CSR_CFG_REGNUM, word); |
| 129 | rt2x00_set_field32(®, BBP_CSR_CFG_BUSY, 1); | 128 | rt2x00_set_field32(®, BBP_CSR_CFG_BUSY, 1); |
| 130 | rt2x00_set_field32(®, BBP_CSR_CFG_READ_CONTROL, 1); | 129 | rt2x00_set_field32(®, BBP_CSR_CFG_READ_CONTROL, 1); |
| 131 | if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev)) | 130 | rt2x00_set_field32(®, BBP_CSR_CFG_BBP_RW_MODE, 1); |
| 132 | rt2x00_set_field32(®, BBP_CSR_CFG_BBP_RW_MODE, 1); | ||
| 133 | 131 | ||
| 134 | rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg); | 132 | rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg); |
| 135 | 133 | ||