diff options
author | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2012-03-19 12:11:40 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2012-04-10 14:23:28 -0400 |
commit | efb13c3d4d969199eaaae3b3540b919f7f149448 (patch) | |
tree | aff648f43ad2d2ff9b600eeda22632a9ecab3509 | |
parent | aa333122c9c7d11d7d8486db09869517995af0a8 (diff) |
[media] s5p-fimc: Simplify locking by removing the context data structure spinlock
Access to the memory-to-memory video node is serialized through a
mutex so now there is no point in having per device context structure
spinlock.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
-rw-r--r-- | drivers/media/video/s5p-fimc/fimc-capture.c | 28 | ||||
-rw-r--r-- | drivers/media/video/s5p-fimc/fimc-core.c | 23 | ||||
-rw-r--r-- | drivers/media/video/s5p-fimc/fimc-core.h | 12 |
3 files changed, 27 insertions, 36 deletions
diff --git a/drivers/media/video/s5p-fimc/fimc-capture.c b/drivers/media/video/s5p-fimc/fimc-capture.c index a080f0c91e35..dc18ba510986 100644 --- a/drivers/media/video/s5p-fimc/fimc-capture.c +++ b/drivers/media/video/s5p-fimc/fimc-capture.c | |||
@@ -147,21 +147,22 @@ int fimc_capture_config_update(struct fimc_ctx *ctx) | |||
147 | if (!test_bit(ST_CAPT_APPLY_CFG, &fimc->state)) | 147 | if (!test_bit(ST_CAPT_APPLY_CFG, &fimc->state)) |
148 | return 0; | 148 | return 0; |
149 | 149 | ||
150 | spin_lock(&ctx->slock); | ||
151 | fimc_hw_set_camera_offset(fimc, &ctx->s_frame); | 150 | fimc_hw_set_camera_offset(fimc, &ctx->s_frame); |
151 | |||
152 | ret = fimc_set_scaler_info(ctx); | 152 | ret = fimc_set_scaler_info(ctx); |
153 | if (ret == 0) { | 153 | if (ret) |
154 | fimc_hw_set_prescaler(ctx); | 154 | return ret; |
155 | fimc_hw_set_mainscaler(ctx); | 155 | |
156 | fimc_hw_set_target_format(ctx); | 156 | fimc_hw_set_prescaler(ctx); |
157 | fimc_hw_set_rotation(ctx); | 157 | fimc_hw_set_mainscaler(ctx); |
158 | fimc_prepare_dma_offset(ctx, &ctx->d_frame); | 158 | fimc_hw_set_target_format(ctx); |
159 | fimc_hw_set_out_dma(ctx); | 159 | fimc_hw_set_rotation(ctx); |
160 | if (fimc->variant->has_alpha) | 160 | fimc_prepare_dma_offset(ctx, &ctx->d_frame); |
161 | fimc_hw_set_rgb_alpha(ctx); | 161 | fimc_hw_set_out_dma(ctx); |
162 | clear_bit(ST_CAPT_APPLY_CFG, &fimc->state); | 162 | if (fimc->variant->has_alpha) |
163 | } | 163 | fimc_hw_set_rgb_alpha(ctx); |
164 | spin_unlock(&ctx->slock); | 164 | |
165 | clear_bit(ST_CAPT_APPLY_CFG, &fimc->state); | ||
165 | return ret; | 166 | return ret; |
166 | } | 167 | } |
167 | 168 | ||
@@ -1525,7 +1526,6 @@ int fimc_register_capture_device(struct fimc_dev *fimc, | |||
1525 | 1526 | ||
1526 | INIT_LIST_HEAD(&vid_cap->pending_buf_q); | 1527 | INIT_LIST_HEAD(&vid_cap->pending_buf_q); |
1527 | INIT_LIST_HEAD(&vid_cap->active_buf_q); | 1528 | INIT_LIST_HEAD(&vid_cap->active_buf_q); |
1528 | spin_lock_init(&ctx->slock); | ||
1529 | vid_cap->ctx = ctx; | 1529 | vid_cap->ctx = ctx; |
1530 | 1530 | ||
1531 | q = &fimc->vid_cap.vbq; | 1531 | q = &fimc->vid_cap.vbq; |
diff --git a/drivers/media/video/s5p-fimc/fimc-core.c b/drivers/media/video/s5p-fimc/fimc-core.c index e184e650022a..8a5951f54d7d 100644 --- a/drivers/media/video/s5p-fimc/fimc-core.c +++ b/drivers/media/video/s5p-fimc/fimc-core.c | |||
@@ -320,7 +320,7 @@ static int fimc_m2m_shutdown(struct fimc_ctx *ctx) | |||
320 | if (!fimc_m2m_pending(fimc)) | 320 | if (!fimc_m2m_pending(fimc)) |
321 | return 0; | 321 | return 0; |
322 | 322 | ||
323 | fimc_ctx_state_lock_set(FIMC_CTX_SHUT, ctx); | 323 | fimc_ctx_state_set(FIMC_CTX_SHUT, ctx); |
324 | 324 | ||
325 | ret = wait_event_timeout(fimc->irq_queue, | 325 | ret = wait_event_timeout(fimc->irq_queue, |
326 | !fimc_ctx_state_is_set(FIMC_CTX_SHUT, ctx), | 326 | !fimc_ctx_state_is_set(FIMC_CTX_SHUT, ctx), |
@@ -430,14 +430,12 @@ static irqreturn_t fimc_irq_handler(int irq, void *priv) | |||
430 | spin_unlock(&fimc->slock); | 430 | spin_unlock(&fimc->slock); |
431 | fimc_m2m_job_finish(ctx, VB2_BUF_STATE_DONE); | 431 | fimc_m2m_job_finish(ctx, VB2_BUF_STATE_DONE); |
432 | 432 | ||
433 | spin_lock(&ctx->slock); | ||
434 | if (ctx->state & FIMC_CTX_SHUT) { | 433 | if (ctx->state & FIMC_CTX_SHUT) { |
435 | ctx->state &= ~FIMC_CTX_SHUT; | 434 | ctx->state &= ~FIMC_CTX_SHUT; |
436 | wake_up(&fimc->irq_queue); | 435 | wake_up(&fimc->irq_queue); |
437 | } | 436 | } |
438 | spin_unlock(&ctx->slock); | 437 | return IRQ_HANDLED; |
439 | } | 438 | } |
440 | return IRQ_HANDLED; | ||
441 | } else if (test_bit(ST_CAPT_PEND, &fimc->state)) { | 439 | } else if (test_bit(ST_CAPT_PEND, &fimc->state)) { |
442 | fimc_capture_irq_handler(fimc, | 440 | fimc_capture_irq_handler(fimc, |
443 | !test_bit(ST_CAPT_JPEG, &fimc->state)); | 441 | !test_bit(ST_CAPT_JPEG, &fimc->state)); |
@@ -644,7 +642,6 @@ static void fimc_dma_run(void *priv) | |||
644 | spin_lock_irqsave(&fimc->slock, flags); | 642 | spin_lock_irqsave(&fimc->slock, flags); |
645 | set_bit(ST_M2M_PEND, &fimc->state); | 643 | set_bit(ST_M2M_PEND, &fimc->state); |
646 | 644 | ||
647 | spin_lock(&ctx->slock); | ||
648 | ctx->state |= (FIMC_SRC_ADDR | FIMC_DST_ADDR); | 645 | ctx->state |= (FIMC_SRC_ADDR | FIMC_DST_ADDR); |
649 | ret = fimc_prepare_config(ctx, ctx->state); | 646 | ret = fimc_prepare_config(ctx, ctx->state); |
650 | if (ret) | 647 | if (ret) |
@@ -661,10 +658,8 @@ static void fimc_dma_run(void *priv) | |||
661 | fimc_hw_set_input_path(ctx); | 658 | fimc_hw_set_input_path(ctx); |
662 | fimc_hw_set_in_dma(ctx); | 659 | fimc_hw_set_in_dma(ctx); |
663 | ret = fimc_set_scaler_info(ctx); | 660 | ret = fimc_set_scaler_info(ctx); |
664 | if (ret) { | 661 | if (ret) |
665 | spin_unlock(&fimc->slock); | ||
666 | goto dma_unlock; | 662 | goto dma_unlock; |
667 | } | ||
668 | fimc_hw_set_prescaler(ctx); | 663 | fimc_hw_set_prescaler(ctx); |
669 | fimc_hw_set_mainscaler(ctx); | 664 | fimc_hw_set_mainscaler(ctx); |
670 | fimc_hw_set_target_format(ctx); | 665 | fimc_hw_set_target_format(ctx); |
@@ -688,7 +683,6 @@ static void fimc_dma_run(void *priv) | |||
688 | FIMC_SRC_FMT | FIMC_DST_FMT); | 683 | FIMC_SRC_FMT | FIMC_DST_FMT); |
689 | fimc_hw_activate_input_dma(fimc, true); | 684 | fimc_hw_activate_input_dma(fimc, true); |
690 | dma_unlock: | 685 | dma_unlock: |
691 | spin_unlock(&ctx->slock); | ||
692 | spin_unlock_irqrestore(&fimc->slock, flags); | 686 | spin_unlock_irqrestore(&fimc->slock, flags); |
693 | } | 687 | } |
694 | 688 | ||
@@ -827,9 +821,9 @@ static int fimc_s_ctrl(struct v4l2_ctrl *ctrl) | |||
827 | unsigned long flags; | 821 | unsigned long flags; |
828 | int ret; | 822 | int ret; |
829 | 823 | ||
830 | spin_lock_irqsave(&ctx->slock, flags); | 824 | spin_lock_irqsave(&ctx->fimc_dev->slock, flags); |
831 | ret = __fimc_s_ctrl(ctx, ctrl); | 825 | ret = __fimc_s_ctrl(ctx, ctrl); |
832 | spin_unlock_irqrestore(&ctx->slock, flags); | 826 | spin_unlock_irqrestore(&ctx->fimc_dev->slock, flags); |
833 | 827 | ||
834 | return ret; | 828 | return ret; |
835 | } | 829 | } |
@@ -1174,9 +1168,9 @@ static int fimc_m2m_s_fmt_mplane(struct file *file, void *fh, | |||
1174 | ctx->scaler.enabled = 1; | 1168 | ctx->scaler.enabled = 1; |
1175 | 1169 | ||
1176 | if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) | 1170 | if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) |
1177 | fimc_ctx_state_lock_set(FIMC_PARAMS | FIMC_DST_FMT, ctx); | 1171 | fimc_ctx_state_set(FIMC_PARAMS | FIMC_DST_FMT, ctx); |
1178 | else | 1172 | else |
1179 | fimc_ctx_state_lock_set(FIMC_PARAMS | FIMC_SRC_FMT, ctx); | 1173 | fimc_ctx_state_set(FIMC_PARAMS | FIMC_SRC_FMT, ctx); |
1180 | 1174 | ||
1181 | dbg("f_w: %d, f_h: %d", frame->f_width, frame->f_height); | 1175 | dbg("f_w: %d, f_h: %d", frame->f_width, frame->f_height); |
1182 | 1176 | ||
@@ -1363,7 +1357,7 @@ static int fimc_m2m_s_crop(struct file *file, void *fh, struct v4l2_crop *cr) | |||
1363 | f->width = cr->c.width; | 1357 | f->width = cr->c.width; |
1364 | f->height = cr->c.height; | 1358 | f->height = cr->c.height; |
1365 | 1359 | ||
1366 | fimc_ctx_state_lock_set(FIMC_PARAMS, ctx); | 1360 | fimc_ctx_state_set(FIMC_PARAMS, ctx); |
1367 | 1361 | ||
1368 | return 0; | 1362 | return 0; |
1369 | } | 1363 | } |
@@ -1467,7 +1461,6 @@ static int fimc_m2m_open(struct file *file) | |||
1467 | ctx->flags = 0; | 1461 | ctx->flags = 0; |
1468 | ctx->in_path = FIMC_DMA; | 1462 | ctx->in_path = FIMC_DMA; |
1469 | ctx->out_path = FIMC_DMA; | 1463 | ctx->out_path = FIMC_DMA; |
1470 | spin_lock_init(&ctx->slock); | ||
1471 | 1464 | ||
1472 | ctx->m2m_ctx = v4l2_m2m_ctx_init(fimc->m2m.m2m_dev, ctx, queue_init); | 1465 | ctx->m2m_ctx = v4l2_m2m_ctx_init(fimc->m2m.m2m_dev, ctx, queue_init); |
1473 | if (IS_ERR(ctx->m2m_ctx)) { | 1466 | if (IS_ERR(ctx->m2m_ctx)) { |
diff --git a/drivers/media/video/s5p-fimc/fimc-core.h b/drivers/media/video/s5p-fimc/fimc-core.h index a18291e648e2..54198c781fe1 100644 --- a/drivers/media/video/s5p-fimc/fimc-core.h +++ b/drivers/media/video/s5p-fimc/fimc-core.h | |||
@@ -465,7 +465,6 @@ struct fimc_dev { | |||
465 | 465 | ||
466 | /** | 466 | /** |
467 | * fimc_ctx - the device context data | 467 | * fimc_ctx - the device context data |
468 | * @slock: spinlock protecting this data structure | ||
469 | * @s_frame: source frame properties | 468 | * @s_frame: source frame properties |
470 | * @d_frame: destination frame properties | 469 | * @d_frame: destination frame properties |
471 | * @out_order_1p: output 1-plane YCBCR order | 470 | * @out_order_1p: output 1-plane YCBCR order |
@@ -492,7 +491,6 @@ struct fimc_dev { | |||
492 | * @ctrls_rdy: true if the control handler is initialized | 491 | * @ctrls_rdy: true if the control handler is initialized |
493 | */ | 492 | */ |
494 | struct fimc_ctx { | 493 | struct fimc_ctx { |
495 | spinlock_t slock; | ||
496 | struct fimc_frame s_frame; | 494 | struct fimc_frame s_frame; |
497 | struct fimc_frame d_frame; | 495 | struct fimc_frame d_frame; |
498 | u32 out_order_1p; | 496 | u32 out_order_1p; |
@@ -560,13 +558,13 @@ static inline bool fimc_capture_active(struct fimc_dev *fimc) | |||
560 | return ret; | 558 | return ret; |
561 | } | 559 | } |
562 | 560 | ||
563 | static inline void fimc_ctx_state_lock_set(u32 state, struct fimc_ctx *ctx) | 561 | static inline void fimc_ctx_state_set(u32 state, struct fimc_ctx *ctx) |
564 | { | 562 | { |
565 | unsigned long flags; | 563 | unsigned long flags; |
566 | 564 | ||
567 | spin_lock_irqsave(&ctx->slock, flags); | 565 | spin_lock_irqsave(&ctx->fimc_dev->slock, flags); |
568 | ctx->state |= state; | 566 | ctx->state |= state; |
569 | spin_unlock_irqrestore(&ctx->slock, flags); | 567 | spin_unlock_irqrestore(&ctx->fimc_dev->slock, flags); |
570 | } | 568 | } |
571 | 569 | ||
572 | static inline bool fimc_ctx_state_is_set(u32 mask, struct fimc_ctx *ctx) | 570 | static inline bool fimc_ctx_state_is_set(u32 mask, struct fimc_ctx *ctx) |
@@ -574,9 +572,9 @@ static inline bool fimc_ctx_state_is_set(u32 mask, struct fimc_ctx *ctx) | |||
574 | unsigned long flags; | 572 | unsigned long flags; |
575 | bool ret; | 573 | bool ret; |
576 | 574 | ||
577 | spin_lock_irqsave(&ctx->slock, flags); | 575 | spin_lock_irqsave(&ctx->fimc_dev->slock, flags); |
578 | ret = (ctx->state & mask) == mask; | 576 | ret = (ctx->state & mask) == mask; |
579 | spin_unlock_irqrestore(&ctx->slock, flags); | 577 | spin_unlock_irqrestore(&ctx->fimc_dev->slock, flags); |
580 | return ret; | 578 | return ret; |
581 | } | 579 | } |
582 | 580 | ||