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authorMark Brown <broonie@opensource.wolfsonmicro.com>2011-06-28 23:26:49 -0400
committerDave Jones <davej@redhat.com>2011-07-13 18:29:59 -0400
commitef993ef8dcd4f3e4d058400c5bd2f7c547344e74 (patch)
treea9e38c3c04c686b283c0f0ebfc752cac93ac629f
parentfe7f1bcbff917f22e121d4b2c045fb1de80cc450 (diff)
[CPUFREQ] S3C6410: Add some lower frequencies for 800MHz base clock operation
By extension from the 667MHz based clocks currently supported add 100MHz and 200MHz operating points. Due to a lack of documentation these have not been confirmed as supported but by extension from the existing frequencies they should be OK, and I've given them quite a bit of runtime testing. The major risk is synchronization with the non-ARM clocks but as we can't currently scale the ARM PLL the risk should be relatively low. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Dave Jones <davej@redhat.com>
-rw-r--r--drivers/cpufreq/s3c64xx-cpufreq.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/cpufreq/s3c64xx-cpufreq.c b/drivers/cpufreq/s3c64xx-cpufreq.c
index e818248ab2b1..b8d1d205e1ef 100644
--- a/drivers/cpufreq/s3c64xx-cpufreq.c
+++ b/drivers/cpufreq/s3c64xx-cpufreq.c
@@ -36,7 +36,9 @@ static struct s3c64xx_dvfs s3c64xx_dvfs_table[] = {
36 36
37static struct cpufreq_frequency_table s3c64xx_freq_table[] = { 37static struct cpufreq_frequency_table s3c64xx_freq_table[] = {
38 { 0, 66000 }, 38 { 0, 66000 },
39 { 0, 100000 },
39 { 0, 133000 }, 40 { 0, 133000 },
41 { 1, 200000 },
40 { 1, 222000 }, 42 { 1, 222000 },
41 { 1, 266000 }, 43 { 1, 266000 },
42 { 2, 333000 }, 44 { 2, 333000 },