diff options
| author | Huang Shijie <b32955@freescale.com> | 2013-05-28 02:20:10 -0400 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2013-06-17 04:04:29 -0400 |
| commit | ee6ce3d9b6d3db7616f6b7013deb6ac267154ee0 (patch) | |
| tree | 6b73cedd81327c9775ee682a1d96f11912d59870 | |
| parent | 05e3f8e713fbe0d8af39525d995dc0e95cdd38fa (diff) | |
ARM: dts: imx6q: add pinctrls for WEIM NOR
Add two pinctrls for WEIM:
one for the weim nor, another for the chipselect.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| -rw-r--r-- | arch/arm/boot/dts/imx6q.dtsi | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index ed11bcf06977..d79455d226cb 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi | |||
| @@ -323,6 +323,65 @@ | |||
| 323 | >; | 323 | >; |
| 324 | }; | 324 | }; |
| 325 | }; | 325 | }; |
| 326 | |||
| 327 | weim { | ||
| 328 | pinctrl_weim_cs0_1: weim_cs0grp-1 { | ||
| 329 | fsl,pins = < | ||
| 330 | MX6Q_PAD_EIM_CS0__EIM_CS0_B 0xb0b1 | ||
| 331 | >; | ||
| 332 | }; | ||
| 333 | |||
| 334 | pinctrl_weim_nor_1: weimnorgrp-1 { | ||
| 335 | fsl,pins = < | ||
| 336 | MX6Q_PAD_EIM_OE__EIM_OE_B 0xb0b1 | ||
| 337 | MX6Q_PAD_EIM_RW__EIM_RW 0xb0b1 | ||
| 338 | MX6Q_PAD_EIM_WAIT__EIM_WAIT_B 0xb060 | ||
| 339 | /* data */ | ||
| 340 | MX6Q_PAD_EIM_D16__EIM_DATA16 0x1b0b0 | ||
| 341 | MX6Q_PAD_EIM_D17__EIM_DATA17 0x1b0b0 | ||
| 342 | MX6Q_PAD_EIM_D18__EIM_DATA18 0x1b0b0 | ||
| 343 | MX6Q_PAD_EIM_D19__EIM_DATA19 0x1b0b0 | ||
| 344 | MX6Q_PAD_EIM_D20__EIM_DATA20 0x1b0b0 | ||
| 345 | MX6Q_PAD_EIM_D21__EIM_DATA21 0x1b0b0 | ||
| 346 | MX6Q_PAD_EIM_D22__EIM_DATA22 0x1b0b0 | ||
| 347 | MX6Q_PAD_EIM_D23__EIM_DATA23 0x1b0b0 | ||
| 348 | MX6Q_PAD_EIM_D24__EIM_DATA24 0x1b0b0 | ||
| 349 | MX6Q_PAD_EIM_D25__EIM_DATA25 0x1b0b0 | ||
| 350 | MX6Q_PAD_EIM_D26__EIM_DATA26 0x1b0b0 | ||
| 351 | MX6Q_PAD_EIM_D27__EIM_DATA27 0x1b0b0 | ||
| 352 | MX6Q_PAD_EIM_D28__EIM_DATA28 0x1b0b0 | ||
| 353 | MX6Q_PAD_EIM_D29__EIM_DATA29 0x1b0b0 | ||
| 354 | MX6Q_PAD_EIM_D30__EIM_DATA30 0x1b0b0 | ||
| 355 | MX6Q_PAD_EIM_D31__EIM_DATA31 0x1b0b0 | ||
| 356 | /* address */ | ||
| 357 | MX6Q_PAD_EIM_A23__EIM_ADDR23 0xb0b1 | ||
| 358 | MX6Q_PAD_EIM_A22__EIM_ADDR22 0xb0b1 | ||
| 359 | MX6Q_PAD_EIM_A21__EIM_ADDR21 0xb0b1 | ||
| 360 | MX6Q_PAD_EIM_A20__EIM_ADDR20 0xb0b1 | ||
| 361 | MX6Q_PAD_EIM_A19__EIM_ADDR19 0xb0b1 | ||
| 362 | MX6Q_PAD_EIM_A18__EIM_ADDR18 0xb0b1 | ||
| 363 | MX6Q_PAD_EIM_A17__EIM_ADDR17 0xb0b1 | ||
| 364 | MX6Q_PAD_EIM_A16__EIM_ADDR16 0xb0b1 | ||
| 365 | MX6Q_PAD_EIM_DA15__EIM_AD15 0xb0b1 | ||
| 366 | MX6Q_PAD_EIM_DA14__EIM_AD14 0xb0b1 | ||
| 367 | MX6Q_PAD_EIM_DA13__EIM_AD13 0xb0b1 | ||
| 368 | MX6Q_PAD_EIM_DA12__EIM_AD12 0xb0b1 | ||
| 369 | MX6Q_PAD_EIM_DA11__EIM_AD11 0xb0b1 | ||
| 370 | MX6Q_PAD_EIM_DA10__EIM_AD10 0xb0b1 | ||
| 371 | MX6Q_PAD_EIM_DA9__EIM_AD09 0xb0b1 | ||
| 372 | MX6Q_PAD_EIM_DA8__EIM_AD08 0xb0b1 | ||
| 373 | MX6Q_PAD_EIM_DA7__EIM_AD07 0xb0b1 | ||
| 374 | MX6Q_PAD_EIM_DA6__EIM_AD06 0xb0b1 | ||
| 375 | MX6Q_PAD_EIM_DA5__EIM_AD05 0xb0b1 | ||
| 376 | MX6Q_PAD_EIM_DA4__EIM_AD04 0xb0b1 | ||
| 377 | MX6Q_PAD_EIM_DA3__EIM_AD03 0xb0b1 | ||
| 378 | MX6Q_PAD_EIM_DA2__EIM_AD02 0xb0b1 | ||
| 379 | MX6Q_PAD_EIM_DA1__EIM_AD01 0xb0b1 | ||
| 380 | MX6Q_PAD_EIM_DA0__EIM_AD00 0xb0b1 | ||
| 381 | >; | ||
| 382 | }; | ||
| 383 | |||
| 384 | }; | ||
| 326 | }; | 385 | }; |
| 327 | }; | 386 | }; |
| 328 | 387 | ||