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authorNicolin Chen <b42378@freescale.com>2013-06-13 07:50:58 -0400
committerShawn Guo <shawn.guo@linaro.org>2013-06-17 04:04:32 -0400
commitee531435ebaaf26ebd64a51627729ffe233b0b1b (patch)
treeecbd9b8c93284b7cbd4733194883579d441783eb
parent521b43d41cd41ac8763603a7b923703d5d368bc9 (diff)
ARM: dtsi: imx6q/imx6dl: Add a pinctrl for I2C1
Add a pinctrl for I2C1 used on imx6q/dl-sabresd. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-rw-r--r--arch/arm/boot/dts/imx6dl.dtsi9
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi7
2 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 2ecbcbcabdc2..06bd544048bc 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -112,6 +112,15 @@
112 }; 112 };
113 }; 113 };
114 114
115 i2c1 {
116 pinctrl_i2c1_2: i2c1grp-2 {
117 fsl,pins = <
118 MX6DL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
119 MX6DL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
120 >;
121 };
122 };
123
115 uart1 { 124 uart1 {
116 pinctrl_uart1_1: uart1grp-1 { 125 pinctrl_uart1_1: uart1grp-1 {
117 fsl,pins = < 126 fsl,pins = <
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 312a22e4e9b0..e7dd2c4125eb 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -211,6 +211,13 @@
211 MX6Q_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 211 MX6Q_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
212 >; 212 >;
213 }; 213 };
214
215 pinctrl_i2c1_2: i2c1grp-2 {
216 fsl,pins = <
217 MX6Q_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
218 MX6Q_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
219 >;
220 };
214 }; 221 };
215 222
216 i2c2 { 223 i2c2 {