diff options
| author | Chen-Yu Tsai <wens@csie.org> | 2014-07-15 13:15:43 -0400 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2014-07-18 16:35:56 -0400 |
| commit | ee39a3e308a418a3ff8a911335ae56fc321e3dfc (patch) | |
| tree | e7d63d64120a991e7c1a138b2f3ac5edd9074613 | |
| parent | df02dd828c4ef2311c7c271f2c95384fc555961b (diff) | |
ARM: dts: sun6i: Add pin muxing options for GMAC
The A31 SoC has a GMAC gigabit ethernet controller supporting
MII, GMII, RGMII modes. Add pin muxing options for these modes.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| -rw-r--r-- | arch/arm/boot/dts/sun6i-a31.dtsi | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index baf8eff57610..47e143aa82fe 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi | |||
| @@ -467,6 +467,48 @@ | |||
| 467 | allwinner,drive = <2>; | 467 | allwinner,drive = <2>; |
| 468 | allwinner,pull = <0>; | 468 | allwinner,pull = <0>; |
| 469 | }; | 469 | }; |
| 470 | |||
| 471 | gmac_pins_mii_a: gmac_mii@0 { | ||
| 472 | allwinner,pins = "PA0", "PA1", "PA2", "PA3", | ||
| 473 | "PA8", "PA9", "PA11", | ||
| 474 | "PA12", "PA13", "PA14", "PA19", | ||
| 475 | "PA20", "PA21", "PA22", "PA23", | ||
| 476 | "PA24", "PA26", "PA27"; | ||
| 477 | allwinner,function = "gmac"; | ||
| 478 | allwinner,drive = <0>; | ||
| 479 | allwinner,pull = <0>; | ||
| 480 | }; | ||
| 481 | |||
| 482 | gmac_pins_gmii_a: gmac_gmii@0 { | ||
| 483 | allwinner,pins = "PA0", "PA1", "PA2", "PA3", | ||
| 484 | "PA4", "PA5", "PA6", "PA7", | ||
| 485 | "PA8", "PA9", "PA10", "PA11", | ||
| 486 | "PA12", "PA13", "PA14", "PA15", | ||
| 487 | "PA16", "PA17", "PA18", "PA19", | ||
| 488 | "PA20", "PA21", "PA22", "PA23", | ||
| 489 | "PA24", "PA25", "PA26", "PA27"; | ||
| 490 | allwinner,function = "gmac"; | ||
| 491 | /* | ||
| 492 | * data lines in GMII mode run at 125MHz and | ||
| 493 | * might need a higher signal drive strength | ||
| 494 | */ | ||
| 495 | allwinner,drive = <2>; | ||
| 496 | allwinner,pull = <0>; | ||
| 497 | }; | ||
| 498 | |||
| 499 | gmac_pins_rgmii_a: gmac_rgmii@0 { | ||
| 500 | allwinner,pins = "PA0", "PA1", "PA2", "PA3", | ||
| 501 | "PA9", "PA10", "PA11", | ||
| 502 | "PA12", "PA13", "PA14", "PA19", | ||
| 503 | "PA20", "PA25", "PA26", "PA27"; | ||
| 504 | allwinner,function = "gmac"; | ||
| 505 | /* | ||
| 506 | * data lines in RGMII mode use DDR mode | ||
| 507 | * and need a higher signal drive strength | ||
| 508 | */ | ||
| 509 | allwinner,drive = <3>; | ||
| 510 | allwinner,pull = <0>; | ||
| 511 | }; | ||
| 470 | }; | 512 | }; |
| 471 | 513 | ||
| 472 | ahb1_rst: reset@01c202c0 { | 514 | ahb1_rst: reset@01c202c0 { |