diff options
| author | Kukjin Kim <kgene.kim@samsung.com> | 2011-02-09 20:57:03 -0500 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-02-16 22:52:52 -0500 |
| commit | ede38875b4c3cf069eab49f4427a07333fcaae11 (patch) | |
| tree | 73280de17ecd3c3eb308ef534a16efe97cc57678 | |
| parent | d76b782775f1a9e5cd20eabe95e49ba9e03415b0 (diff) | |
ARM: S5P64X0: Cleanup map.h file
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| -rw-r--r-- | arch/arm/mach-s5p64x0/include/mach/map.h | 83 |
1 files changed, 42 insertions, 41 deletions
diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h index a9365e5ba614..95c91257c7ca 100644 --- a/arch/arm/mach-s5p64x0/include/mach/map.h +++ b/arch/arm/mach-s5p64x0/include/mach/map.h | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/mach-s5p64x0/include/mach/map.h | 1 | /* linux/arch/arm/mach-s5p64x0/include/mach/map.h |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. |
| 4 | * http://www.samsung.com | 4 | * http://www.samsung.com |
| 5 | * | 5 | * |
| 6 | * S5P64X0 - Memory map definitions | 6 | * S5P64X0 - Memory map definitions |
| @@ -16,64 +16,46 @@ | |||
| 16 | #include <plat/map-base.h> | 16 | #include <plat/map-base.h> |
| 17 | #include <plat/map-s5p.h> | 17 | #include <plat/map-s5p.h> |
| 18 | 18 | ||
| 19 | #define S5P64X0_PA_SDRAM (0x20000000) | 19 | #define S5P64X0_PA_SDRAM 0x20000000 |
| 20 | 20 | ||
| 21 | #define S5P64X0_PA_CHIPID (0xE0000000) | 21 | #define S5P64X0_PA_CHIPID 0xE0000000 |
| 22 | #define S5P_PA_CHIPID S5P64X0_PA_CHIPID | ||
| 23 | |||
| 24 | #define S5P64X0_PA_SYSCON (0xE0100000) | ||
| 25 | #define S5P_PA_SYSCON S5P64X0_PA_SYSCON | ||
| 26 | |||
| 27 | #define S5P64X0_PA_GPIO (0xE0308000) | ||
| 28 | |||
| 29 | #define S5P64X0_PA_VIC0 (0xE4000000) | ||
| 30 | #define S5P64X0_PA_VIC1 (0xE4100000) | ||
| 31 | 22 | ||
| 32 | #define S5P64X0_PA_SROMC (0xE7000000) | 23 | #define S5P64X0_PA_SYSCON 0xE0100000 |
| 33 | #define S5P_PA_SROMC S5P64X0_PA_SROMC | ||
| 34 | |||
| 35 | #define S5P64X0_PA_PDMA (0xE9000000) | ||
| 36 | |||
| 37 | #define S5P64X0_PA_TIMER (0xEA000000) | ||
| 38 | #define S5P_PA_TIMER S5P64X0_PA_TIMER | ||
| 39 | 24 | ||
| 40 | #define S5P64X0_PA_RTC (0xEA100000) | 25 | #define S5P64X0_PA_GPIO 0xE0308000 |
| 41 | 26 | ||
| 42 | #define S5P64X0_PA_WDT (0xEA200000) | 27 | #define S5P64X0_PA_VIC0 0xE4000000 |
| 28 | #define S5P64X0_PA_VIC1 0xE4100000 | ||
| 43 | 29 | ||
| 44 | #define S5P6440_PA_UART(x) (0xEC000000 + ((x) * S3C_UART_OFFSET)) | 30 | #define S5P64X0_PA_SROMC 0xE7000000 |
| 45 | #define S5P6450_PA_UART(x) ((x < 5) ? (0xEC800000 + ((x) * S3C_UART_OFFSET)) : (0xEC000000)) | ||
| 46 | 31 | ||
| 47 | #define S5P_PA_UART0 S5P6450_PA_UART(0) | 32 | #define S5P64X0_PA_PDMA 0xE9000000 |
| 48 | #define S5P_PA_UART1 S5P6450_PA_UART(1) | ||
| 49 | #define S5P_PA_UART2 S5P6450_PA_UART(2) | ||
| 50 | #define S5P_PA_UART3 S5P6450_PA_UART(3) | ||
| 51 | #define S5P_PA_UART4 S5P6450_PA_UART(4) | ||
| 52 | #define S5P_PA_UART5 S5P6450_PA_UART(5) | ||
| 53 | 33 | ||
| 54 | #define S5P_SZ_UART SZ_256 | 34 | #define S5P64X0_PA_TIMER 0xEA000000 |
| 35 | #define S5P64X0_PA_RTC 0xEA100000 | ||
| 36 | #define S5P64X0_PA_WDT 0xEA200000 | ||
| 55 | 37 | ||
| 56 | #define S5P6440_PA_IIC0 (0xEC104000) | 38 | #define S5P6440_PA_IIC0 0xEC104000 |
| 57 | #define S5P6440_PA_IIC1 (0xEC20F000) | 39 | #define S5P6440_PA_IIC1 0xEC20F000 |
| 58 | #define S5P6450_PA_IIC0 (0xEC100000) | 40 | #define S5P6450_PA_IIC0 0xEC100000 |
| 59 | #define S5P6450_PA_IIC1 (0xEC200000) | 41 | #define S5P6450_PA_IIC1 0xEC200000 |
| 60 | 42 | ||
| 61 | #define S5P64X0_PA_SPI0 (0xEC400000) | 43 | #define S5P64X0_PA_SPI0 0xEC400000 |
| 62 | #define S5P64X0_PA_SPI1 (0xEC500000) | 44 | #define S5P64X0_PA_SPI1 0xEC500000 |
| 63 | 45 | ||
| 64 | #define S5P64X0_PA_HSOTG (0xED100000) | 46 | #define S5P64X0_PA_HSOTG 0xED100000 |
| 65 | 47 | ||
| 66 | #define S5P64X0_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) | 48 | #define S5P64X0_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) |
| 67 | 49 | ||
| 68 | #define S5P64X0_PA_I2S (0xF2000000) | 50 | #define S5P64X0_PA_I2S 0xF2000000 |
| 69 | #define S5P6450_PA_I2S1 0xF2800000 | 51 | #define S5P6450_PA_I2S1 0xF2800000 |
| 70 | #define S5P6450_PA_I2S2 0xF2900000 | 52 | #define S5P6450_PA_I2S2 0xF2900000 |
| 71 | 53 | ||
| 72 | #define S5P64X0_PA_PCM (0xF2100000) | 54 | #define S5P64X0_PA_PCM 0xF2100000 |
| 73 | 55 | ||
| 74 | #define S5P64X0_PA_ADC (0xF3000000) | 56 | #define S5P64X0_PA_ADC 0xF3000000 |
| 75 | 57 | ||
| 76 | /* compatibiltiy defines. */ | 58 | /* Compatibiltiy Defines */ |
| 77 | 59 | ||
| 78 | #define S3C_PA_HSMMC0 S5P64X0_PA_HSMMC(0) | 60 | #define S3C_PA_HSMMC0 S5P64X0_PA_HSMMC(0) |
| 79 | #define S3C_PA_HSMMC1 S5P64X0_PA_HSMMC(1) | 61 | #define S3C_PA_HSMMC1 S5P64X0_PA_HSMMC(1) |
| @@ -83,6 +65,25 @@ | |||
| 83 | #define S3C_PA_RTC S5P64X0_PA_RTC | 65 | #define S3C_PA_RTC S5P64X0_PA_RTC |
| 84 | #define S3C_PA_WDT S5P64X0_PA_WDT | 66 | #define S3C_PA_WDT S5P64X0_PA_WDT |
| 85 | 67 | ||
| 68 | #define S5P_PA_CHIPID S5P64X0_PA_CHIPID | ||
| 69 | #define S5P_PA_SROMC S5P64X0_PA_SROMC | ||
| 70 | #define S5P_PA_SYSCON S5P64X0_PA_SYSCON | ||
| 71 | #define S5P_PA_TIMER S5P64X0_PA_TIMER | ||
| 72 | |||
| 86 | #define SAMSUNG_PA_ADC S5P64X0_PA_ADC | 73 | #define SAMSUNG_PA_ADC S5P64X0_PA_ADC |
| 87 | 74 | ||
| 75 | /* UART */ | ||
| 76 | |||
| 77 | #define S5P6440_PA_UART(x) (0xEC000000 + ((x) * S3C_UART_OFFSET)) | ||
| 78 | #define S5P6450_PA_UART(x) ((x < 5) ? (0xEC800000 + ((x) * S3C_UART_OFFSET)) : (0xEC000000)) | ||
| 79 | |||
| 80 | #define S5P_PA_UART0 S5P6450_PA_UART(0) | ||
| 81 | #define S5P_PA_UART1 S5P6450_PA_UART(1) | ||
| 82 | #define S5P_PA_UART2 S5P6450_PA_UART(2) | ||
| 83 | #define S5P_PA_UART3 S5P6450_PA_UART(3) | ||
| 84 | #define S5P_PA_UART4 S5P6450_PA_UART(4) | ||
| 85 | #define S5P_PA_UART5 S5P6450_PA_UART(5) | ||
| 86 | |||
| 87 | #define S5P_SZ_UART SZ_256 | ||
| 88 | |||
| 88 | #endif /* __ASM_ARCH_MAP_H */ | 89 | #endif /* __ASM_ARCH_MAP_H */ |
