diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-04-11 14:56:40 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-04-11 14:56:40 -0400 |
| commit | ede1d63fccb7a397832ddbdee5951ec65194d93e (patch) | |
| tree | c9cda036db9a4bc125cb27b282899500e6e8cf9e | |
| parent | b42e6dc66bf379d7d44d419dda8733c890838751 (diff) | |
| parent | 98f07013149d4be18ff16cfc5b43218f3a70afd6 (diff) | |
Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull second set of ARM changes from Russell King:
"This is the remainder of the ARM changes for this merge window.
Included in this request are:
- fixes for kprobes for big-endian support
- fix tracing in soft_restart
- avoid phys address overflow in kdump code
- fix reporting of read-only pmd bits in kernel page table dump
- remove unnecessary (and possibly buggy) call to outer_flush_all()
- fix a three sparse warnings (missing header file for function
prototypes)
- fix pj4 crashing single zImage (thanks to arm-soc merging changes
which enables this with knowledge that the corresponding fix had
not even been submitted for my tree before the merge window opened)
- vfp macro cleanups
- dump register state on undefined instruction userspace faults when
debugging"
* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
Dump the registers on undefined instruction userspace faults
ARM: 8018/1: Add {inc,dec}_preempt_count asm macros
ARM: 8017/1: Move asm macro get_thread_info to asm/assembler.h
ARM: 8016/1: Check cpu id in pj4_cp0_init.
ARM: 8015/1: Add cpu_is_pj4 to distinguish PJ4 because it has some differences with V7
ARM: add missing system_misc.h include to process.c
ARM: 8009/1: dcscb.c: remove call to outer_flush_all()
ARM: 8014/1: mm: fix reporting of read-only PMD bits
ARM: 8012/1: kdump: Avoid overflow when converting pfn to physaddr
ARM: 8010/1: avoid tracers in soft_restart
ARM: kprobes-test: Workaround GAS .align bug
ARM: kprobes-test: use <asm/opcodes.h> for Thumb instruction building
ARM: kprobes-test: use <asm/opcodes.h> for ARM instruction building
ARM: kprobes-test: use <asm/opcodes.h> for instruction accesses
ARM: probes: fix instruction fetch order with <asm/opcodes.h>
| -rw-r--r-- | arch/arm/include/asm/assembler.h | 42 | ||||
| -rw-r--r-- | arch/arm/include/asm/cputype.h | 19 | ||||
| -rw-r--r-- | arch/arm/kernel/crash_dump.c | 2 | ||||
| -rw-r--r-- | arch/arm/kernel/entry-header.S | 11 | ||||
| -rw-r--r-- | arch/arm/kernel/kprobes-common.c | 4 | ||||
| -rw-r--r-- | arch/arm/kernel/kprobes-test-arm.c | 603 | ||||
| -rw-r--r-- | arch/arm/kernel/kprobes-test-thumb.c | 447 | ||||
| -rw-r--r-- | arch/arm/kernel/kprobes-test.c | 13 | ||||
| -rw-r--r-- | arch/arm/kernel/kprobes-test.h | 2 | ||||
| -rw-r--r-- | arch/arm/kernel/kprobes-thumb.c | 20 | ||||
| -rw-r--r-- | arch/arm/kernel/kprobes.c | 9 | ||||
| -rw-r--r-- | arch/arm/kernel/pj4-cp0.c | 4 | ||||
| -rw-r--r-- | arch/arm/kernel/probes.c | 15 | ||||
| -rw-r--r-- | arch/arm/kernel/process.c | 3 | ||||
| -rw-r--r-- | arch/arm/kernel/traps.c | 1 | ||||
| -rw-r--r-- | arch/arm/mach-vexpress/dcscb.c | 13 | ||||
| -rw-r--r-- | arch/arm/mm/dump.c | 47 | ||||
| -rw-r--r-- | arch/arm/vfp/entry.S | 25 | ||||
| -rw-r--r-- | arch/arm/vfp/vfphw.S | 19 |
19 files changed, 685 insertions, 614 deletions
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index 380ac4f20000..b974184f9941 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h | |||
| @@ -23,6 +23,7 @@ | |||
| 23 | #include <asm/ptrace.h> | 23 | #include <asm/ptrace.h> |
| 24 | #include <asm/domain.h> | 24 | #include <asm/domain.h> |
| 25 | #include <asm/opcodes-virt.h> | 25 | #include <asm/opcodes-virt.h> |
| 26 | #include <asm/asm-offsets.h> | ||
| 26 | 27 | ||
| 27 | #define IOMEM(x) (x) | 28 | #define IOMEM(x) (x) |
| 28 | 29 | ||
| @@ -174,6 +175,47 @@ | |||
| 174 | restore_irqs_notrace \oldcpsr | 175 | restore_irqs_notrace \oldcpsr |
| 175 | .endm | 176 | .endm |
| 176 | 177 | ||
| 178 | /* | ||
| 179 | * Get current thread_info. | ||
| 180 | */ | ||
| 181 | .macro get_thread_info, rd | ||
| 182 | ARM( mov \rd, sp, lsr #13 ) | ||
| 183 | THUMB( mov \rd, sp ) | ||
| 184 | THUMB( lsr \rd, \rd, #13 ) | ||
| 185 | mov \rd, \rd, lsl #13 | ||
| 186 | .endm | ||
| 187 | |||
| 188 | /* | ||
| 189 | * Increment/decrement the preempt count. | ||
| 190 | */ | ||
| 191 | #ifdef CONFIG_PREEMPT_COUNT | ||
| 192 | .macro inc_preempt_count, ti, tmp | ||
| 193 | ldr \tmp, [\ti, #TI_PREEMPT] @ get preempt count | ||
| 194 | add \tmp, \tmp, #1 @ increment it | ||
| 195 | str \tmp, [\ti, #TI_PREEMPT] | ||
| 196 | .endm | ||
| 197 | |||
| 198 | .macro dec_preempt_count, ti, tmp | ||
| 199 | ldr \tmp, [\ti, #TI_PREEMPT] @ get preempt count | ||
| 200 | sub \tmp, \tmp, #1 @ decrement it | ||
| 201 | str \tmp, [\ti, #TI_PREEMPT] | ||
| 202 | .endm | ||
| 203 | |||
| 204 | .macro dec_preempt_count_ti, ti, tmp | ||
| 205 | get_thread_info \ti | ||
| 206 | dec_preempt_count \ti, \tmp | ||
| 207 | .endm | ||
| 208 | #else | ||
| 209 | .macro inc_preempt_count, ti, tmp | ||
| 210 | .endm | ||
| 211 | |||
| 212 | .macro dec_preempt_count, ti, tmp | ||
| 213 | .endm | ||
| 214 | |||
| 215 | .macro dec_preempt_count_ti, ti, tmp | ||
| 216 | .endm | ||
| 217 | #endif | ||
| 218 | |||
| 177 | #define USER(x...) \ | 219 | #define USER(x...) \ |
| 178 | 9999: x; \ | 220 | 9999: x; \ |
| 179 | .pushsection __ex_table,"a"; \ | 221 | .pushsection __ex_table,"a"; \ |
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h index 42f0889f0584..c651e3b26ec7 100644 --- a/arch/arm/include/asm/cputype.h +++ b/arch/arm/include/asm/cputype.h | |||
| @@ -221,4 +221,23 @@ static inline int cpu_is_xsc3(void) | |||
| 221 | #define cpu_is_xscale() 1 | 221 | #define cpu_is_xscale() 1 |
| 222 | #endif | 222 | #endif |
| 223 | 223 | ||
| 224 | /* | ||
| 225 | * Marvell's PJ4 core is based on V7 version. It has some modification | ||
| 226 | * for coprocessor setting. For this reason, we need a way to distinguish | ||
| 227 | * it. | ||
| 228 | */ | ||
| 229 | #ifndef CONFIG_CPU_PJ4 | ||
| 230 | #define cpu_is_pj4() 0 | ||
| 231 | #else | ||
| 232 | static inline int cpu_is_pj4(void) | ||
| 233 | { | ||
| 234 | unsigned int id; | ||
| 235 | |||
| 236 | id = read_cpuid_id(); | ||
| 237 | if ((id & 0xfffffff0) == 0x562f5840) | ||
| 238 | return 1; | ||
| 239 | |||
| 240 | return 0; | ||
| 241 | } | ||
| 242 | #endif | ||
| 224 | #endif | 243 | #endif |
diff --git a/arch/arm/kernel/crash_dump.c b/arch/arm/kernel/crash_dump.c index 90c50d4b43f7..5d1286d51154 100644 --- a/arch/arm/kernel/crash_dump.c +++ b/arch/arm/kernel/crash_dump.c | |||
| @@ -39,7 +39,7 @@ ssize_t copy_oldmem_page(unsigned long pfn, char *buf, | |||
| 39 | if (!csize) | 39 | if (!csize) |
| 40 | return 0; | 40 | return 0; |
| 41 | 41 | ||
| 42 | vaddr = ioremap(pfn << PAGE_SHIFT, PAGE_SIZE); | 42 | vaddr = ioremap(__pfn_to_phys(pfn), PAGE_SIZE); |
| 43 | if (!vaddr) | 43 | if (!vaddr) |
| 44 | return -ENOMEM; | 44 | return -ENOMEM; |
| 45 | 45 | ||
diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S index 39f89fbd5111..1420725142ca 100644 --- a/arch/arm/kernel/entry-header.S +++ b/arch/arm/kernel/entry-header.S | |||
| @@ -236,11 +236,6 @@ | |||
| 236 | movs pc, lr @ return & move spsr_svc into cpsr | 236 | movs pc, lr @ return & move spsr_svc into cpsr |
| 237 | .endm | 237 | .endm |
| 238 | 238 | ||
| 239 | .macro get_thread_info, rd | ||
| 240 | mov \rd, sp, lsr #13 | ||
| 241 | mov \rd, \rd, lsl #13 | ||
| 242 | .endm | ||
| 243 | |||
| 244 | @ | 239 | @ |
| 245 | @ 32-bit wide "mov pc, reg" | 240 | @ 32-bit wide "mov pc, reg" |
| 246 | @ | 241 | @ |
| @@ -306,12 +301,6 @@ | |||
| 306 | .endm | 301 | .endm |
| 307 | #endif /* ifdef CONFIG_CPU_V7M / else */ | 302 | #endif /* ifdef CONFIG_CPU_V7M / else */ |
| 308 | 303 | ||
| 309 | .macro get_thread_info, rd | ||
| 310 | mov \rd, sp | ||
| 311 | lsr \rd, \rd, #13 | ||
| 312 | mov \rd, \rd, lsl #13 | ||
| 313 | .endm | ||
| 314 | |||
| 315 | @ | 304 | @ |
| 316 | @ 32-bit wide "mov pc, reg" | 305 | @ 32-bit wide "mov pc, reg" |
| 317 | @ | 306 | @ |
diff --git a/arch/arm/kernel/kprobes-common.c b/arch/arm/kernel/kprobes-common.c index c311ed94ff1c..0bf5d64eba1d 100644 --- a/arch/arm/kernel/kprobes-common.c +++ b/arch/arm/kernel/kprobes-common.c | |||
| @@ -13,6 +13,7 @@ | |||
| 13 | 13 | ||
| 14 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
| 15 | #include <linux/kprobes.h> | 15 | #include <linux/kprobes.h> |
| 16 | #include <asm/opcodes.h> | ||
| 16 | 17 | ||
| 17 | #include "kprobes.h" | 18 | #include "kprobes.h" |
| 18 | 19 | ||
| @@ -153,7 +154,8 @@ kprobe_decode_ldmstm(probes_opcode_t insn, struct arch_probes_insn *asi, | |||
| 153 | 154 | ||
| 154 | if (handler) { | 155 | if (handler) { |
| 155 | /* We can emulate the instruction in (possibly) modified form */ | 156 | /* We can emulate the instruction in (possibly) modified form */ |
| 156 | asi->insn[0] = (insn & 0xfff00000) | (rn << 16) | reglist; | 157 | asi->insn[0] = __opcode_to_mem_arm((insn & 0xfff00000) | |
| 158 | (rn << 16) | reglist); | ||
| 157 | asi->insn_handler = handler; | 159 | asi->insn_handler = handler; |
| 158 | return INSN_GOOD; | 160 | return INSN_GOOD; |
| 159 | } | 161 | } |
diff --git a/arch/arm/kernel/kprobes-test-arm.c b/arch/arm/kernel/kprobes-test-arm.c index 87839de77e5f..9db4b659d03e 100644 --- a/arch/arm/kernel/kprobes-test-arm.c +++ b/arch/arm/kernel/kprobes-test-arm.c | |||
| @@ -11,6 +11,7 @@ | |||
| 11 | #include <linux/kernel.h> | 11 | #include <linux/kernel.h> |
| 12 | #include <linux/module.h> | 12 | #include <linux/module.h> |
| 13 | #include <asm/system_info.h> | 13 | #include <asm/system_info.h> |
| 14 | #include <asm/opcodes.h> | ||
| 14 | 15 | ||
| 15 | #include "kprobes-test.h" | 16 | #include "kprobes-test.h" |
| 16 | 17 | ||
| @@ -159,9 +160,9 @@ void kprobe_arm_test_cases(void) | |||
| 159 | TEST_SUPPORTED("cmp sp, #0x1000"); | 160 | TEST_SUPPORTED("cmp sp, #0x1000"); |
| 160 | 161 | ||
| 161 | /* Data-processing with PC as shift*/ | 162 | /* Data-processing with PC as shift*/ |
| 162 | TEST_UNSUPPORTED(".word 0xe15c0f1e @ cmp r12, r14, asl pc") | 163 | TEST_UNSUPPORTED(__inst_arm(0xe15c0f1e) " @ cmp r12, r14, asl pc") |
| 163 | TEST_UNSUPPORTED(".word 0xe1a0cf1e @ mov r12, r14, asl pc") | 164 | TEST_UNSUPPORTED(__inst_arm(0xe1a0cf1e) " @ mov r12, r14, asl pc") |
| 164 | TEST_UNSUPPORTED(".word 0xe08caf1e @ add r10, r12, r14, asl pc") | 165 | TEST_UNSUPPORTED(__inst_arm(0xe08caf1e) " @ add r10, r12, r14, asl pc") |
| 165 | 166 | ||
| 166 | /* Data-processing with PC as shift*/ | 167 | /* Data-processing with PC as shift*/ |
| 167 | TEST_UNSUPPORTED("movs pc, r1") | 168 | TEST_UNSUPPORTED("movs pc, r1") |
| @@ -203,7 +204,7 @@ void kprobe_arm_test_cases(void) | |||
| 203 | TEST("mrs r0, cpsr") | 204 | TEST("mrs r0, cpsr") |
| 204 | TEST("mrspl r7, cpsr") | 205 | TEST("mrspl r7, cpsr") |
| 205 | TEST("mrs r14, cpsr") | 206 | TEST("mrs r14, cpsr") |
| 206 | TEST_UNSUPPORTED(".word 0xe10ff000 @ mrs r15, cpsr") | 207 | TEST_UNSUPPORTED(__inst_arm(0xe10ff000) " @ mrs r15, cpsr") |
| 207 | TEST_UNSUPPORTED("mrs r0, spsr") | 208 | TEST_UNSUPPORTED("mrs r0, spsr") |
| 208 | TEST_UNSUPPORTED("mrs lr, spsr") | 209 | TEST_UNSUPPORTED("mrs lr, spsr") |
| 209 | 210 | ||
| @@ -219,8 +220,8 @@ void kprobe_arm_test_cases(void) | |||
| 219 | TEST_R("clzeq r7, r",14,0x1,"") | 220 | TEST_R("clzeq r7, r",14,0x1,"") |
| 220 | TEST_R("clz lr, r",7, 0xffffffff,"") | 221 | TEST_R("clz lr, r",7, 0xffffffff,"") |
| 221 | TEST( "clz r4, sp") | 222 | TEST( "clz r4, sp") |
| 222 | TEST_UNSUPPORTED(".word 0x016fff10 @ clz pc, r0") | 223 | TEST_UNSUPPORTED(__inst_arm(0x016fff10) " @ clz pc, r0") |
| 223 | TEST_UNSUPPORTED(".word 0x016f0f1f @ clz r0, pc") | 224 | TEST_UNSUPPORTED(__inst_arm(0x016f0f1f) " @ clz r0, pc") |
| 224 | 225 | ||
| 225 | #if __LINUX_ARM_ARCH__ >= 6 | 226 | #if __LINUX_ARM_ARCH__ >= 6 |
| 226 | TEST_UNSUPPORTED("bxj r0") | 227 | TEST_UNSUPPORTED("bxj r0") |
| @@ -229,7 +230,7 @@ void kprobe_arm_test_cases(void) | |||
| 229 | TEST_BF_R("blx r",0,2f,"") | 230 | TEST_BF_R("blx r",0,2f,"") |
| 230 | TEST_BB_R("blx r",7,2f,"") | 231 | TEST_BB_R("blx r",7,2f,"") |
| 231 | TEST_BF_R("blxeq r",14,2f,"") | 232 | TEST_BF_R("blxeq r",14,2f,"") |
| 232 | TEST_UNSUPPORTED(".word 0x0120003f @ blx pc") | 233 | TEST_UNSUPPORTED(__inst_arm(0x0120003f) " @ blx pc") |
| 233 | 234 | ||
| 234 | TEST_RR( "qadd r0, r",1, VAL1,", r",2, VAL2,"") | 235 | TEST_RR( "qadd r0, r",1, VAL1,", r",2, VAL2,"") |
| 235 | TEST_RR( "qaddvs lr, r",9, VAL2,", r",8, VAL1,"") | 236 | TEST_RR( "qaddvs lr, r",9, VAL2,", r",8, VAL1,"") |
| @@ -243,190 +244,190 @@ void kprobe_arm_test_cases(void) | |||
| 243 | TEST_RR( "qdsub r0, r",1, VAL1,", r",2, VAL2,"") | 244 | TEST_RR( "qdsub r0, r",1, VAL1,", r",2, VAL2,"") |
| 244 | TEST_RR( "qdsubvs lr, r",9, VAL2,", r",8, VAL1,"") | 245 | TEST_RR( "qdsubvs lr, r",9, VAL2,", r",8, VAL1,"") |
| 245 | TEST_R( "qdsub lr, r",9, VAL2,", r13") | 246 | TEST_R( "qdsub lr, r",9, VAL2,", r13") |
| 246 | TEST_UNSUPPORTED(".word 0xe101f050 @ qadd pc, r0, r1") | 247 | TEST_UNSUPPORTED(__inst_arm(0xe101f050) " @ qadd pc, r0, r1") |
| 247 | TEST_UNSUPPORTED(".word 0xe121f050 @ qsub pc, r0, r1") | 248 | TEST_UNSUPPORTED(__inst_arm(0xe121f050) " @ qsub pc, r0, r1") |
| 248 | TEST_UNSUPPORTED(".word 0xe141f050 @ qdadd pc, r0, r1") | 249 | TEST_UNSUPPORTED(__inst_arm(0xe141f050) " @ qdadd pc, r0, r1") |
| 249 | TEST_UNSUPPORTED(".word 0xe161f050 @ qdsub pc, r0, r1") | 250 | TEST_UNSUPPORTED(__inst_arm(0xe161f050) " @ qdsub pc, r0, r1") |
| 250 | TEST_UNSUPPORTED(".word 0xe16f2050 @ qdsub r2, r0, pc") | 251 | TEST_UNSUPPORTED(__inst_arm(0xe16f2050) " @ qdsub r2, r0, pc") |
| 251 | TEST_UNSUPPORTED(".word 0xe161205f @ qdsub r2, pc, r1") | 252 | TEST_UNSUPPORTED(__inst_arm(0xe161205f) " @ qdsub r2, pc, r1") |
| 252 | 253 | ||
| 253 | TEST_UNSUPPORTED("bkpt 0xffff") | 254 | TEST_UNSUPPORTED("bkpt 0xffff") |
| 254 | TEST_UNSUPPORTED("bkpt 0x0000") | 255 | TEST_UNSUPPORTED("bkpt 0x0000") |
| 255 | 256 | ||
| 256 | TEST_UNSUPPORTED(".word 0xe1600070 @ smc #0") | 257 | TEST_UNSUPPORTED(__inst_arm(0xe1600070) " @ smc #0") |
| 257 | 258 | ||
| 258 | TEST_GROUP("Halfword multiply and multiply-accumulate") | 259 | TEST_GROUP("Halfword multiply and multiply-accumulate") |
| 259 | 260 | ||
| 260 | TEST_RRR( "smlabb r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") | 261 | TEST_RRR( "smlabb r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") |
| 261 | TEST_RRR( "smlabbge r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") | 262 | TEST_RRR( "smlabbge r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") |
| 262 | TEST_RR( "smlabb lr, r",1, VAL2,", r",2, VAL3,", r13") | 263 | TEST_RR( "smlabb lr, r",1, VAL2,", r",2, VAL3,", r13") |
| 263 | TEST_UNSUPPORTED(".word 0xe10f3281 @ smlabb pc, r1, r2, r3") | 264 | TEST_UNSUPPORTED(__inst_arm(0xe10f3281) " @ smlabb pc, r1, r2, r3") |
| 264 | TEST_RRR( "smlatb r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") | 265 | TEST_RRR( "smlatb r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") |
| 265 | TEST_RRR( "smlatbge r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") | 266 | TEST_RRR( "smlatbge r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") |
| 266 | TEST_RR( "smlatb lr, r",1, VAL2,", r",2, VAL3,", r13") | 267 | TEST_RR( "smlatb lr, r",1, VAL2,", r",2, VAL3,", r13") |
| 267 | TEST_UNSUPPORTED(".word 0xe10f32a1 @ smlatb pc, r1, r2, r3") | 268 | TEST_UNSUPPORTED(__inst_arm(0xe10f32a1) " @ smlatb pc, r1, r2, r3") |
| 268 | TEST_RRR( "smlabt r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") | 269 | TEST_RRR( "smlabt r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") |
| 269 | TEST_RRR( "smlabtge r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") | 270 | TEST_RRR( "smlabtge r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") |
| 270 | TEST_RR( "smlabt lr, r",1, VAL2,", r",2, VAL3,", r13") | 271 | TEST_RR( "smlabt lr, r",1, VAL2,", r",2, VAL3,", r13") |
| 271 | TEST_UNSUPPORTED(".word 0xe10f32c1 @ smlabt pc, r1, r2, r3") | 272 | TEST_UNSUPPORTED(__inst_arm(0xe10f32c1) " @ smlabt pc, r1, r2, r3") |
| 272 | TEST_RRR( "smlatt r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") | 273 | TEST_RRR( "smlatt r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") |
| 273 | TEST_RRR( "smlattge r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") | 274 | TEST_RRR( "smlattge r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") |
| 274 | TEST_RR( "smlatt lr, r",1, VAL2,", r",2, VAL3,", r13") | 275 | TEST_RR( "smlatt lr, r",1, VAL2,", r",2, VAL3,", r13") |
| 275 | TEST_UNSUPPORTED(".word 0xe10f32e1 @ smlatt pc, r1, r2, r3") | 276 | TEST_UNSUPPORTED(__inst_arm(0xe10f32e1) " @ smlatt pc, r1, r2, r3") |
| 276 | 277 | ||
| 277 | TEST_RRR( "smlawb r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") | 278 | TEST_RRR( "smlawb r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") |
| 278 | TEST_RRR( "smlawbge r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") | 279 | TEST_RRR( "smlawbge r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") |
| 279 | TEST_RR( "smlawb lr, r",1, VAL2,", r",2, VAL3,", r13") | 280 | TEST_RR( "smlawb lr, r",1, VAL2,", r",2, VAL3,", r13") |
| 280 | TEST_UNSUPPORTED(".word 0xe12f3281 @ smlawb pc, r1, r2, r3") | 281 | TEST_UNSUPPORTED(__inst_arm(0xe12f3281) " @ smlawb pc, r1, r2, r3") |
| 281 | TEST_RRR( "smlawt r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") | 282 | TEST_RRR( "smlawt r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") |
| 282 | TEST_RRR( "smlawtge r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") | 283 | TEST_RRR( "smlawtge r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") |
| 283 | TEST_RR( "smlawt lr, r",1, VAL2,", r",2, VAL3,", r13") | 284 | TEST_RR( "smlawt lr, r",1, VAL2,", r",2, VAL3,", r13") |
| 284 | TEST_UNSUPPORTED(".word 0xe12f32c1 @ smlawt pc, r1, r2, r3") | 285 | TEST_UNSUPPORTED(__inst_arm(0xe12f32c1) " @ smlawt pc, r1, r2, r3") |
| 285 | TEST_UNSUPPORTED(".word 0xe12032cf @ smlawt r0, pc, r2, r3") | 286 | TEST_UNSUPPORTED(__inst_arm(0xe12032cf) " @ smlawt r0, pc, r2, r3") |
| 286 | TEST_UNSUPPORTED(".word 0xe1203fc1 @ smlawt r0, r1, pc, r3") | 287 | TEST_UNSUPPORTED(__inst_arm(0xe1203fc1) " @ smlawt r0, r1, pc, r3") |
| 287 | TEST_UNSUPPORTED(".word 0xe120f2c1 @ smlawt r0, r1, r2, pc") | 288 | TEST_UNSUPPORTED(__inst_arm(0xe120f2c1) " @ smlawt r0, r1, r2, pc") |
| 288 | 289 | ||
| 289 | TEST_RR( "smulwb r0, r",1, VAL1,", r",2, VAL2,"") | 290 | TEST_RR( "smulwb r0, r",1, VAL1,", r",2, VAL2,"") |
| 290 | TEST_RR( "smulwbge r7, r",8, VAL3,", r",9, VAL1,"") | 291 | TEST_RR( "smulwbge r7, r",8, VAL3,", r",9, VAL1,"") |
| 291 | TEST_R( "smulwb lr, r",1, VAL2,", r13") | 292 | TEST_R( "smulwb lr, r",1, VAL2,", r13") |
| 292 | TEST_UNSUPPORTED(".word 0xe12f02a1 @ smulwb pc, r1, r2") | 293 | TEST_UNSUPPORTED(__inst_arm(0xe12f02a1) " @ smulwb pc, r1, r2") |
| 293 | TEST_RR( "smulwt r0, r",1, VAL1,", r",2, VAL2,"") | 294 | TEST_RR( "smulwt r0, r",1, VAL1,", r",2, VAL2,"") |
| 294 | TEST_RR( "smulwtge r7, r",8, VAL3,", r",9, VAL1,"") | 295 | TEST_RR( "smulwtge r7, r",8, VAL3,", r",9, VAL1,"") |
| 295 | TEST_R( "smulwt lr, r",1, VAL2,", r13") | 296 | TEST_R( "smulwt lr, r",1, VAL2,", r13") |
| 296 | TEST_UNSUPPORTED(".word 0xe12f02e1 @ smulwt pc, r1, r2") | 297 | TEST_UNSUPPORTED(__inst_arm(0xe12f02e1) " @ smulwt pc, r1, r2") |
| 297 | 298 | ||
| 298 | TEST_RRRR( "smlalbb r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4) | 299 | TEST_RRRR( "smlalbb r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4) |
| 299 | TEST_RRRR( "smlalbble r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3) | 300 | TEST_RRRR( "smlalbble r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3) |
| 300 | TEST_RRR( "smlalbb r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13") | 301 | TEST_RRR( "smlalbb r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13") |
| 301 | TEST_UNSUPPORTED(".word 0xe14f1382 @ smlalbb pc, r1, r2, r3") | 302 | TEST_UNSUPPORTED(__inst_arm(0xe14f1382) " @ smlalbb pc, r1, r2, r3") |
| 302 | TEST_UNSUPPORTED(".word 0xe141f382 @ smlalbb r1, pc, r2, r3") | 303 | TEST_UNSUPPORTED(__inst_arm(0xe141f382) " @ smlalbb r1, pc, r2, r3") |
| 303 | TEST_RRRR( "smlaltb r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4) | 304 | TEST_RRRR( "smlaltb r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4) |
| 304 | TEST_RRRR( "smlaltble r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3) | 305 | TEST_RRRR( "smlaltble r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3) |
| 305 | TEST_RRR( "smlaltb r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13") | 306 | TEST_RRR( "smlaltb r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13") |
| 306 | TEST_UNSUPPORTED(".word 0xe14f13a2 @ smlaltb pc, r1, r2, r3") | 307 | TEST_UNSUPPORTED(__inst_arm(0xe14f13a2) " @ smlaltb pc, r1, r2, r3") |
| 307 | TEST_UNSUPPORTED(".word 0xe141f3a2 @ smlaltb r1, pc, r2, r3") | 308 | TEST_UNSUPPORTED(__inst_arm(0xe141f3a2) " @ smlaltb r1, pc, r2, r3") |
| 308 | TEST_RRRR( "smlalbt r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4) | 309 | TEST_RRRR( "smlalbt r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4) |
| 309 | TEST_RRRR( "smlalbtle r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3) | 310 | TEST_RRRR( "smlalbtle r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3) |
| 310 | TEST_RRR( "smlalbt r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13") | 311 | TEST_RRR( "smlalbt r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13") |
| 311 | TEST_UNSUPPORTED(".word 0xe14f13c2 @ smlalbt pc, r1, r2, r3") | 312 | TEST_UNSUPPORTED(__inst_arm(0xe14f13c2) " @ smlalbt pc, r1, r2, r3") |
| 312 | TEST_UNSUPPORTED(".word 0xe141f3c2 @ smlalbt r1, pc, r2, r3") | 313 | TEST_UNSUPPORTED(__inst_arm(0xe141f3c2) " @ smlalbt r1, pc, r2, r3") |
| 313 | TEST_RRRR( "smlaltt r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4) | 314 | TEST_RRRR( "smlaltt r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4) |
| 314 | TEST_RRRR( "smlalttle r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3) | 315 | TEST_RRRR( "smlalttle r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3) |
| 315 | TEST_RRR( "smlaltt r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13") | 316 | TEST_RRR( "smlaltt r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13") |
| 316 | TEST_UNSUPPORTED(".word 0xe14f13e2 @ smlalbb pc, r1, r2, r3") | 317 | TEST_UNSUPPORTED(__inst_arm(0xe14f13e2) " @ smlalbb pc, r1, r2, r3") |
| 317 | TEST_UNSUPPORTED(".word 0xe140f3e2 @ smlalbb r0, pc, r2, r3") | 318 | TEST_UNSUPPORTED(__inst_arm(0xe140f3e2) " @ smlalbb r0, pc, r2, r3") |
| 318 | TEST_UNSUPPORTED(".word 0xe14013ef @ smlalbb r0, r1, pc, r3") | 319 | TEST_UNSUPPORTED(__inst_arm(0xe14013ef) " @ smlalbb r0, r1, pc, r3") |
| 319 | TEST_UNSUPPORTED(".word 0xe1401fe2 @ smlalbb r0, r1, r2, pc") | 320 | TEST_UNSUPPORTED(__inst_arm(0xe1401fe2) " @ smlalbb r0, r1, r2, pc") |
| 320 | 321 | ||
| 321 | TEST_RR( "smulbb r0, r",1, VAL1,", r",2, VAL2,"") | 322 | TEST_RR( "smulbb r0, r",1, VAL1,", r",2, VAL2,"") |
| 322 | TEST_RR( "smulbbge r7, r",8, VAL3,", r",9, VAL1,"") | 323 | TEST_RR( "smulbbge r7, r",8, VAL3,", r",9, VAL1,"") |
| 323 | TEST_R( "smulbb lr, r",1, VAL2,", r13") | 324 | TEST_R( "smulbb lr, r",1, VAL2,", r13") |
| 324 | TEST_UNSUPPORTED(".word 0xe16f0281 @ smulbb pc, r1, r2") | 325 | TEST_UNSUPPORTED(__inst_arm(0xe16f0281) " @ smulbb pc, r1, r2") |
| 325 | TEST_RR( "smultb r0, r",1, VAL1,", r",2, VAL2,"") | 326 | TEST_RR( "smultb r0, r",1, VAL1,", r",2, VAL2,"") |
| 326 | TEST_RR( "smultbge r7, r",8, VAL3,", r",9, VAL1,"") | 327 | TEST_RR( "smultbge r7, r",8, VAL3,", r",9, VAL1,"") |
| 327 | TEST_R( "smultb lr, r",1, VAL2,", r13") | 328 | TEST_R( "smultb lr, r",1, VAL2,", r13") |
| 328 | TEST_UNSUPPORTED(".word 0xe16f02a1 @ smultb pc, r1, r2") | 329 | TEST_UNSUPPORTED(__inst_arm(0xe16f02a1) " @ smultb pc, r1, r2") |
| 329 | TEST_RR( "smulbt r0, r",1, VAL1,", r",2, VAL2,"") | 330 | TEST_RR( "smulbt r0, r",1, VAL1,", r",2, VAL2,"") |
| 330 | TEST_RR( "smulbtge r7, r",8, VAL3,", r",9, VAL1,"") | 331 | TEST_RR( "smulbtge r7, r",8, VAL3,", r",9, VAL1,"") |
| 331 | TEST_R( "smulbt lr, r",1, VAL2,", r13") | 332 | TEST_R( "smulbt lr, r",1, VAL2,", r13") |
| 332 | TEST_UNSUPPORTED(".word 0xe16f02c1 @ smultb pc, r1, r2") | 333 | TEST_UNSUPPORTED(__inst_arm(0xe16f02c1) " @ smultb pc, r1, r2") |
| 333 | TEST_RR( "smultt r0, r",1, VAL1,", r",2, VAL2,"") | 334 | TEST_RR( "smultt r0, r",1, VAL1,", r",2, VAL2,"") |
| 334 | TEST_RR( "smulttge r7, r",8, VAL3,", r",9, VAL1,"") | 335 | TEST_RR( "smulttge r7, r",8, VAL3,", r",9, VAL1,"") |
| 335 | TEST_R( "smultt lr, r",1, VAL2,", r13") | 336 | TEST_R( "smultt lr, r",1, VAL2,", r13") |
| 336 | TEST_UNSUPPORTED(".word 0xe16f02e1 @ smultt pc, r1, r2") | 337 | TEST_UNSUPPORTED(__inst_arm(0xe16f02e1) " @ smultt pc, r1, r2") |
| 337 | TEST_UNSUPPORTED(".word 0xe16002ef @ smultt r0, pc, r2") | 338 | TEST_UNSUPPORTED(__inst_arm(0xe16002ef) " @ smultt r0, pc, r2") |
| 338 | TEST_UNSUPPORTED(".word 0xe1600fe1 @ smultt r0, r1, pc") | 339 | TEST_UNSUPPORTED(__inst_arm(0xe1600fe1) " @ smultt r0, r1, pc") |
| 339 | 340 | ||
| 340 | TEST_GROUP("Multiply and multiply-accumulate") | 341 | TEST_GROUP("Multiply and multiply-accumulate") |
| 341 | 342 | ||
| 342 | TEST_RR( "mul r0, r",1, VAL1,", r",2, VAL2,"") | 343 | TEST_RR( "mul r0, r",1, VAL1,", r",2, VAL2,"") |
| 343 | TEST_RR( "mulls r7, r",8, VAL2,", r",9, VAL2,"") | 344 | TEST_RR( "mulls r7, r",8, VAL2,", r",9, VAL2,"") |
| 344 | TEST_R( "mul lr, r",4, VAL3,", r13") | 345 | TEST_R( "mul lr, r",4, VAL3,", r13") |
| 345 | TEST_UNSUPPORTED(".word 0xe00f0291 @ mul pc, r1, r2") | 346 | TEST_UNSUPPORTED(__inst_arm(0xe00f0291) " @ mul pc, r1, r2") |
| 346 | TEST_UNSUPPORTED(".word 0xe000029f @ mul r0, pc, r2") | 347 | TEST_UNSUPPORTED(__inst_arm(0xe000029f) " @ mul r0, pc, r2") |
| 347 | TEST_UNSUPPORTED(".word 0xe0000f91 @ mul r0, r1, pc") | 348 | TEST_UNSUPPORTED(__inst_arm(0xe0000f91) " @ mul r0, r1, pc") |
| 348 | TEST_RR( "muls r0, r",1, VAL1,", r",2, VAL2,"") | 349 | TEST_RR( "muls r0, r",1, VAL1,", r",2, VAL2,"") |
| 349 | TEST_RR( "mullss r7, r",8, VAL2,", r",9, VAL2,"") | 350 | TEST_RR( "mullss r7, r",8, VAL2,", r",9, VAL2,"") |
| 350 | TEST_R( "muls lr, r",4, VAL3,", r13") | 351 | TEST_R( "muls lr, r",4, VAL3,", r13") |
| 351 | TEST_UNSUPPORTED(".word 0xe01f0291 @ muls pc, r1, r2") | 352 | TEST_UNSUPPORTED(__inst_arm(0xe01f0291) " @ muls pc, r1, r2") |
| 352 | 353 | ||
| 353 | TEST_RRR( "mla r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") | 354 | TEST_RRR( "mla r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") |
| 354 | TEST_RRR( "mlahi r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") | 355 | TEST_RRR( "mlahi r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") |
| 355 | TEST_RR( "mla lr, r",1, VAL2,", r",2, VAL3,", r13") | 356 | TEST_RR( "mla lr, r",1, VAL2,", r",2, VAL3,", r13") |
| 356 | TEST_UNSUPPORTED(".word 0xe02f3291 @ mla pc, r1, r2, r3") | 357 | TEST_UNSUPPORTED(__inst_arm(0xe02f3291) " @ mla pc, r1, r2, r3") |
| 357 | TEST_RRR( "mlas r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") | 358 | TEST_RRR( "mlas r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") |
| 358 | TEST_RRR( "mlahis r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") | 359 | TEST_RRR( "mlahis r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") |
| 359 | TEST_RR( "mlas lr, r",1, VAL2,", r",2, VAL3,", r13") | 360 | TEST_RR( "mlas lr, r",1, VAL2,", r",2, VAL3,", r13") |
| 360 | TEST_UNSUPPORTED(".word 0xe03f3291 @ mlas pc, r1, r2, r3") | 361 | TEST_UNSUPPORTED(__inst_arm(0xe03f3291) " @ mlas pc, r1, r2, r3") |
| 361 | 362 | ||
| 362 | #if __LINUX_ARM_ARCH__ >= 6 | 363 | #if __LINUX_ARM_ARCH__ >= 6 |
| 363 | TEST_RR( "umaal r0, r1, r",2, VAL1,", r",3, VAL2,"") | 364 | TEST_RR( "umaal r0, r1, r",2, VAL1,", r",3, VAL2,"") |
| 364 | TEST_RR( "umaalls r7, r8, r",9, VAL2,", r",10, VAL1,"") | 365 | TEST_RR( "umaalls r7, r8, r",9, VAL2,", r",10, VAL1,"") |
| 365 | TEST_R( "umaal lr, r12, r",11,VAL3,", r13") | 366 | TEST_R( "umaal lr, r12, r",11,VAL3,", r13") |
| 366 | TEST_UNSUPPORTED(".word 0xe041f392 @ umaal pc, r1, r2, r3") | 367 | TEST_UNSUPPORTED(__inst_arm(0xe041f392) " @ umaal pc, r1, r2, r3") |
| 367 | TEST_UNSUPPORTED(".word 0xe04f0392 @ umaal r0, pc, r2, r3") | 368 | TEST_UNSUPPORTED(__inst_arm(0xe04f0392) " @ umaal r0, pc, r2, r3") |
| 368 | TEST_UNSUPPORTED(".word 0xe0500090 @ undef") | 369 | TEST_UNSUPPORTED(__inst_arm(0xe0500090) " @ undef") |
| 369 | TEST_UNSUPPORTED(".word 0xe05fff9f @ undef") | 370 | TEST_UNSUPPORTED(__inst_arm(0xe05fff9f) " @ undef") |
| 370 | #endif | 371 | #endif |
| 371 | 372 | ||
| 372 | #if __LINUX_ARM_ARCH__ >= 7 | 373 | #if __LINUX_ARM_ARCH__ >= 7 |
| 373 | TEST_RRR( "mls r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") | 374 | TEST_RRR( "mls r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") |
| 374 | TEST_RRR( "mlshi r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") | 375 | TEST_RRR( "mlshi r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") |
| 375 | TEST_RR( "mls lr, r",1, VAL2,", r",2, VAL3,", r13") | 376 | TEST_RR( "mls lr, r",1, VAL2,", r",2, VAL3,", r13") |
| 376 | TEST_UNSUPPORTED(".word 0xe06f3291 @ mls pc, r1, r2, r3") | 377 | TEST_UNSUPPORTED(__inst_arm(0xe06f3291) " @ mls pc, r1, r2, r3") |
| 377 | TEST_UNSUPPORTED(".word 0xe060329f @ mls r0, pc, r2, r3") | 378 | TEST_UNSUPPORTED(__inst_arm(0xe060329f) " @ mls r0, pc, r2, r3") |
| 378 | TEST_UNSUPPORTED(".word 0xe0603f91 @ mls r0, r1, pc, r3") | 379 | TEST_UNSUPPORTED(__inst_arm(0xe0603f91) " @ mls r0, r1, pc, r3") |
| 379 | TEST_UNSUPPORTED(".word 0xe060f291 @ mls r0, r1, r2, pc") | 380 | TEST_UNSUPPORTED(__inst_arm(0xe060f291) " @ mls r0, r1, r2, pc") |
| 380 | #endif | 381 | #endif |
| 381 | 382 | ||
| 382 | TEST_UNSUPPORTED(".word 0xe0700090 @ undef") | 383 | TEST_UNSUPPORTED(__inst_arm(0xe0700090) " @ undef") |
| 383 | TEST_UNSUPPORTED(".word 0xe07fff9f @ undef") | 384 | TEST_UNSUPPORTED(__inst_arm(0xe07fff9f) " @ undef") |
| 384 | 385 | ||
| 385 | TEST_RR( "umull r0, r1, r",2, VAL1,", r",3, VAL2,"") | 386 | TEST_RR( "umull r0, r1, r",2, VAL1,", r",3, VAL2,"") |
| 386 | TEST_RR( "umullls r7, r8, r",9, VAL2,", r",10, VAL1,"") | 387 | TEST_RR( "umullls r7, r8, r",9, VAL2,", r",10, VAL1,"") |
| 387 | TEST_R( "umull lr, r12, r",11,VAL3,", r13") | 388 | TEST_R( "umull lr, r12, r",11,VAL3,", r13") |
| 388 | TEST_UNSUPPORTED(".word 0xe081f392 @ umull pc, r1, r2, r3") | 389 | TEST_UNSUPPORTED(__inst_arm(0xe081f392) " @ umull pc, r1, r2, r3") |
| 389 | TEST_UNSUPPORTED(".word 0xe08f1392 @ umull r1, pc, r2, r3") | 390 | TEST_UNSUPPORTED(__inst_arm(0xe08f1392) " @ umull r1, pc, r2, r3") |
| 390 | TEST_RR( "umulls r0, r1, r",2, VAL1,", r",3, VAL2,"") | 391 | TEST_RR( "umulls r0, r1, r",2, VAL1,", r",3, VAL2,"") |
| 391 | TEST_RR( "umulllss r7, r8, r",9, VAL2,", r",10, VAL1,"") | 392 | TEST_RR( "umulllss r7, r8, r",9, VAL2,", r",10, VAL1,"") |
| 392 | TEST_R( "umulls lr, r12, r",11,VAL3,", r13") | 393 | TEST_R( "umulls lr, r12, r",11,VAL3,", r13") |
| 393 | TEST_UNSUPPORTED(".word 0xe091f392 @ umulls pc, r1, r2, r3") | 394 | TEST_UNSUPPORTED(__inst_arm(0xe091f392) " @ umulls pc, r1, r2, r3") |
| 394 | TEST_UNSUPPORTED(".word 0xe09f1392 @ umulls r1, pc, r2, r3") | 395 | TEST_UNSUPPORTED(__inst_arm(0xe09f1392) " @ umulls r1, pc, r2, r3") |
| 395 | 396 | ||
| 396 | TEST_RRRR( "umlal r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4) | 397 | TEST_RRRR( "umlal r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4) |
| 397 | TEST_RRRR( "umlalle r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3) | 398 | TEST_RRRR( "umlalle r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3) |
| 398 | TEST_RRR( "umlal r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13") | 399 | TEST_RRR( "umlal r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13") |
| 399 | TEST_UNSUPPORTED(".word 0xe0af1392 @ umlal pc, r1, r2, r3") | 400 | TEST_UNSUPPORTED(__inst_arm(0xe0af1392) " @ umlal pc, r1, r2, r3") |
| 400 | TEST_UNSUPPORTED(".word 0xe0a1f392 @ umlal r1, pc, r2, r3") | 401 | TEST_UNSUPPORTED(__inst_arm(0xe0a1f392) " @ umlal r1, pc, r2, r3") |
| 401 | TEST_RRRR( "umlals r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4) | 402 | TEST_RRRR( "umlals r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4) |
| 402 | TEST_RRRR( "umlalles r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3) | 403 | TEST_RRRR( "umlalles r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3) |
| 403 | TEST_RRR( "umlals r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13") | 404 | TEST_RRR( "umlals r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13") |
| 404 | TEST_UNSUPPORTED(".word 0xe0bf1392 @ umlals pc, r1, r2, r3") | 405 | TEST_UNSUPPORTED(__inst_arm(0xe0bf1392) " @ umlals pc, r1, r2, r3") |
| 405 | TEST_UNSUPPORTED(".word 0xe0b1f392 @ umlals r1, pc, r2, r3") | 406 | TEST_UNSUPPORTED(__inst_arm(0xe0b1f392) " @ umlals r1, pc, r2, r3") |
| 406 | 407 | ||
| 407 | TEST_RR( "smull r0, r1, r",2, VAL1,", r",3, VAL2,"") | 408 | TEST_RR( "smull r0, r1, r",2, VAL1,", r",3, VAL2,"") |
| 408 | TEST_RR( "smullls r7, r8, r",9, VAL2,", r",10, VAL1,"") | 409 | TEST_RR( "smullls r7, r8, r",9, VAL2,", r",10, VAL1,"") |
| 409 | TEST_R( "smull lr, r12, r",11,VAL3,", r13") | 410 | TEST_R( "smull lr, r12, r",11,VAL3,", r13") |
| 410 | TEST_UNSUPPORTED(".word 0xe0c1f392 @ smull pc, r1, r2, r3") | 411 | TEST_UNSUPPORTED(__inst_arm(0xe0c1f392) " @ smull pc, r1, r2, r3") |
| 411 | TEST_UNSUPPORTED(".word 0xe0cf1392 @ smull r1, pc, r2, r3") | 412 | TEST_UNSUPPORTED(__inst_arm(0xe0cf1392) " @ smull r1, pc, r2, r3") |
| 412 | TEST_RR( "smulls r0, r1, r",2, VAL1,", r",3, VAL2,"") | 413 | TEST_RR( "smulls r0, r1, r",2, VAL1,", r",3, VAL2,"") |
| 413 | TEST_RR( "smulllss r7, r8, r",9, VAL2,", r",10, VAL1,"") | 414 | TEST_RR( "smulllss r7, r8, r",9, VAL2,", r",10, VAL1,"") |
| 414 | TEST_R( "smulls lr, r12, r",11,VAL3,", r13") | 415 | TEST_R( "smulls lr, r12, r",11,VAL3,", r13") |
| 415 | TEST_UNSUPPORTED(".word 0xe0d1f392 @ smulls pc, r1, r2, r3") | 416 | TEST_UNSUPPORTED(__inst_arm(0xe0d1f392) " @ smulls pc, r1, r2, r3") |
| 416 | TEST_UNSUPPORTED(".word 0xe0df1392 @ smulls r1, pc, r2, r3") | 417 | TEST_UNSUPPORTED(__inst_arm(0xe0df1392) " @ smulls r1, pc, r2, r3") |
| 417 | 418 | ||
| 418 | TEST_RRRR( "smlal r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4) | 419 | TEST_RRRR( "smlal r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4) |
| 419 | TEST_RRRR( "smlalle r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3) | 420 | TEST_RRRR( "smlalle r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3) |
| 420 | TEST_RRR( "smlal r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13") | 421 | TEST_RRR( "smlal r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13") |
| 421 | TEST_UNSUPPORTED(".word 0xe0ef1392 @ smlal pc, r1, r2, r3") | 422 | TEST_UNSUPPORTED(__inst_arm(0xe0ef1392) " @ smlal pc, r1, r2, r3") |
| 422 | TEST_UNSUPPORTED(".word 0xe0e1f392 @ smlal r1, pc, r2, r3") | 423 | TEST_UNSUPPORTED(__inst_arm(0xe0e1f392) " @ smlal r1, pc, r2, r3") |
| 423 | TEST_RRRR( "smlals r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4) | 424 | TEST_RRRR( "smlals r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4) |
| 424 | TEST_RRRR( "smlalles r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3) | 425 | TEST_RRRR( "smlalles r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3) |
| 425 | TEST_RRR( "smlals r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13") | 426 | TEST_RRR( "smlals r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13") |
| 426 | TEST_UNSUPPORTED(".word 0xe0ff1392 @ smlals pc, r1, r2, r3") | 427 | TEST_UNSUPPORTED(__inst_arm(0xe0ff1392) " @ smlals pc, r1, r2, r3") |
| 427 | TEST_UNSUPPORTED(".word 0xe0f0f392 @ smlals r0, pc, r2, r3") | 428 | TEST_UNSUPPORTED(__inst_arm(0xe0f0f392) " @ smlals r0, pc, r2, r3") |
| 428 | TEST_UNSUPPORTED(".word 0xe0f0139f @ smlals r0, r1, pc, r3") | 429 | TEST_UNSUPPORTED(__inst_arm(0xe0f0139f) " @ smlals r0, r1, pc, r3") |
| 429 | TEST_UNSUPPORTED(".word 0xe0f01f92 @ smlals r0, r1, r2, pc") | 430 | TEST_UNSUPPORTED(__inst_arm(0xe0f01f92) " @ smlals r0, r1, r2, pc") |
| 430 | 431 | ||
| 431 | TEST_GROUP("Synchronization primitives") | 432 | TEST_GROUP("Synchronization primitives") |
| 432 | 433 | ||
| @@ -435,28 +436,28 @@ void kprobe_arm_test_cases(void) | |||
| 435 | TEST_R( "swpvs r0, r",1,VAL1,", [sp]") | 436 | TEST_R( "swpvs r0, r",1,VAL1,", [sp]") |
| 436 | TEST_RP("swp sp, r",14,VAL2,", [r",12,13*4,"]") | 437 | TEST_RP("swp sp, r",14,VAL2,", [r",12,13*4,"]") |
| 437 | #else | 438 | #else |
| 438 | TEST_UNSUPPORTED(".word 0xe108e097 @ swp lr, r7, [r8]") | 439 | TEST_UNSUPPORTED(__inst_arm(0xe108e097) " @ swp lr, r7, [r8]") |
| 439 | TEST_UNSUPPORTED(".word 0x610d0091 @ swpvs r0, r1, [sp]") | 440 | TEST_UNSUPPORTED(__inst_arm(0x610d0091) " @ swpvs r0, r1, [sp]") |
| 440 | TEST_UNSUPPORTED(".word 0xe10cd09e @ swp sp, r14 [r12]") | 441 | TEST_UNSUPPORTED(__inst_arm(0xe10cd09e) " @ swp sp, r14 [r12]") |
| 441 | #endif | 442 | #endif |
| 442 | TEST_UNSUPPORTED(".word 0xe102f091 @ swp pc, r1, [r2]") | 443 | TEST_UNSUPPORTED(__inst_arm(0xe102f091) " @ swp pc, r1, [r2]") |
| 443 | TEST_UNSUPPORTED(".word 0xe102009f @ swp r0, pc, [r2]") | 444 | TEST_UNSUPPORTED(__inst_arm(0xe102009f) " @ swp r0, pc, [r2]") |
| 444 | TEST_UNSUPPORTED(".word 0xe10f0091 @ swp r0, r1, [pc]") | 445 | TEST_UNSUPPORTED(__inst_arm(0xe10f0091) " @ swp r0, r1, [pc]") |
| 445 | #if __LINUX_ARM_ARCH__ < 6 | 446 | #if __LINUX_ARM_ARCH__ < 6 |
| 446 | TEST_RP("swpb lr, r",7,VAL2,", [r",8,0,"]") | 447 | TEST_RP("swpb lr, r",7,VAL2,", [r",8,0,"]") |
| 447 | TEST_R( "swpvsb r0, r",1,VAL1,", [sp]") | 448 | TEST_R( "swpvsb r0, r",1,VAL1,", [sp]") |
| 448 | #else | 449 | #else |
| 449 | TEST_UNSUPPORTED(".word 0xe148e097 @ swpb lr, r7, [r8]") | 450 | TEST_UNSUPPORTED(__inst_arm(0xe148e097) " @ swpb lr, r7, [r8]") |
| 450 | TEST_UNSUPPORTED(".word 0x614d0091 @ swpvsb r0, r1, [sp]") | 451 | TEST_UNSUPPORTED(__inst_arm(0x614d0091) " @ swpvsb r0, r1, [sp]") |
| 451 | #endif | 452 | #endif |
| 452 | TEST_UNSUPPORTED(".word 0xe142f091 @ swpb pc, r1, [r2]") | 453 | TEST_UNSUPPORTED(__inst_arm(0xe142f091) " @ swpb pc, r1, [r2]") |
| 453 | 454 | ||
| 454 | TEST_UNSUPPORTED(".word 0xe1100090") /* Unallocated space */ | 455 | TEST_UNSUPPORTED(__inst_arm(0xe1100090)) /* Unallocated space */ |
| 455 | TEST_UNSUPPORTED(".word 0xe1200090") /* Unallocated space */ | 456 | TEST_UNSUPPORTED(__inst_arm(0xe1200090)) /* Unallocated space */ |
| 456 | TEST_UNSUPPORTED(".word 0xe1300090") /* Unallocated space */ | 457 | TEST_UNSUPPORTED(__inst_arm(0xe1300090)) /* Unallocated space */ |
| 457 | TEST_UNSUPPORTED(".word 0xe1500090") /* Unallocated space */ | 458 | TEST_UNSUPPORTED(__inst_arm(0xe1500090)) /* Unallocated space */ |
| 458 | TEST_UNSUPPORTED(".word 0xe1600090") /* Unallocated space */ | 459 | TEST_UNSUPPORTED(__inst_arm(0xe1600090)) /* Unallocated space */ |
| 459 | TEST_UNSUPPORTED(".word 0xe1700090") /* Unallocated space */ | 460 | TEST_UNSUPPORTED(__inst_arm(0xe1700090)) /* Unallocated space */ |
| 460 | #if __LINUX_ARM_ARCH__ >= 6 | 461 | #if __LINUX_ARM_ARCH__ >= 6 |
| 461 | TEST_UNSUPPORTED("ldrex r2, [sp]") | 462 | TEST_UNSUPPORTED("ldrex r2, [sp]") |
| 462 | #endif | 463 | #endif |
| @@ -476,9 +477,9 @@ void kprobe_arm_test_cases(void) | |||
| 476 | TEST_RPR( "strneh r",12,VAL2,", [r",11,48,", -r",10,24,"]!") | 477 | TEST_RPR( "strneh r",12,VAL2,", [r",11,48,", -r",10,24,"]!") |
| 477 | TEST_RPR( "strh r",2, VAL1,", [r",3, 24,"], r",4, 48,"") | 478 | TEST_RPR( "strh r",2, VAL1,", [r",3, 24,"], r",4, 48,"") |
| 478 | TEST_RPR( "strh r",10,VAL2,", [r",9, 48,"], -r",11,24,"") | 479 | TEST_RPR( "strh r",10,VAL2,", [r",9, 48,"], -r",11,24,"") |
| 479 | TEST_UNSUPPORTED(".word 0xe1afc0ba @ strh r12, [pc, r10]!") | 480 | TEST_UNSUPPORTED(__inst_arm(0xe1afc0ba) " @ strh r12, [pc, r10]!") |
| 480 | TEST_UNSUPPORTED(".word 0xe089f0bb @ strh pc, [r9], r11") | 481 | TEST_UNSUPPORTED(__inst_arm(0xe089f0bb) " @ strh pc, [r9], r11") |
| 481 | TEST_UNSUPPORTED(".word 0xe089a0bf @ strh r10, [r9], pc") | 482 | TEST_UNSUPPORTED(__inst_arm(0xe089a0bf) " @ strh r10, [r9], pc") |
| 482 | 483 | ||
| 483 | TEST_PR( "ldrh r0, [r",0, 48,", -r",2, 24,"]") | 484 | TEST_PR( "ldrh r0, [r",0, 48,", -r",2, 24,"]") |
| 484 | TEST_PR( "ldrcsh r14, [r",13,0, ", r",12, 48,"]") | 485 | TEST_PR( "ldrcsh r14, [r",13,0, ", r",12, 48,"]") |
| @@ -486,9 +487,9 @@ void kprobe_arm_test_cases(void) | |||
| 486 | TEST_PR( "ldrcch r12, [r",11,48,", -r",10,24,"]!") | 487 | TEST_PR( "ldrcch r12, [r",11,48,", -r",10,24,"]!") |
| 487 | TEST_PR( "ldrh r2, [r",3, 24,"], r",4, 48,"") | 488 | TEST_PR( "ldrh r2, [r",3, 24,"], r",4, 48,"") |
| 488 | TEST_PR( "ldrh r10, [r",9, 48,"], -r",11,24,"") | 489 | TEST_PR( "ldrh r10, [r",9, 48,"], -r",11,24,"") |
| 489 | TEST_UNSUPPORTED(".word 0xe1bfc0ba @ ldrh r12, [pc, r10]!") | 490 | TEST_UNSUPPORTED(__inst_arm(0xe1bfc0ba) " @ ldrh r12, [pc, r10]!") |
| 490 | TEST_UNSUPPORTED(".word 0xe099f0bb @ ldrh pc, [r9], r11") | 491 | TEST_UNSUPPORTED(__inst_arm(0xe099f0bb) " @ ldrh pc, [r9], r11") |
| 491 | TEST_UNSUPPORTED(".word 0xe099a0bf @ ldrh r10, [r9], pc") | 492 | TEST_UNSUPPORTED(__inst_arm(0xe099a0bf) " @ ldrh r10, [r9], pc") |
| 492 | 493 | ||
| 493 | TEST_RP( "strh r",0, VAL1,", [r",1, 24,", #-2]") | 494 | TEST_RP( "strh r",0, VAL1,", [r",1, 24,", #-2]") |
| 494 | TEST_RP( "strmih r",14,VAL2,", [r",13,0, ", #2]") | 495 | TEST_RP( "strmih r",14,VAL2,", [r",13,0, ", #2]") |
| @@ -496,8 +497,8 @@ void kprobe_arm_test_cases(void) | |||
| 496 | TEST_RP( "strplh r",12,VAL2,", [r",11,24,", #-4]!") | 497 | TEST_RP( "strplh r",12,VAL2,", [r",11,24,", #-4]!") |
| 497 | TEST_RP( "strh r",2, VAL1,", [r",3, 24,"], #48") | 498 | TEST_RP( "strh r",2, VAL1,", [r",3, 24,"], #48") |
| 498 | TEST_RP( "strh r",10,VAL2,", [r",9, 64,"], #-48") | 499 | TEST_RP( "strh r",10,VAL2,", [r",9, 64,"], #-48") |
| 499 | TEST_UNSUPPORTED(".word 0xe1efc3b0 @ strh r12, [pc, #48]!") | 500 | TEST_UNSUPPORTED(__inst_arm(0xe1efc3b0) " @ strh r12, [pc, #48]!") |
| 500 | TEST_UNSUPPORTED(".word 0xe0c9f3b0 @ strh pc, [r9], #48") | 501 | TEST_UNSUPPORTED(__inst_arm(0xe0c9f3b0) " @ strh pc, [r9], #48") |
| 501 | 502 | ||
| 502 | TEST_P( "ldrh r0, [r",0, 24,", #-2]") | 503 | TEST_P( "ldrh r0, [r",0, 24,", #-2]") |
| 503 | TEST_P( "ldrvsh r14, [r",13,0, ", #2]") | 504 | TEST_P( "ldrvsh r14, [r",13,0, ", #2]") |
| @@ -506,8 +507,8 @@ void kprobe_arm_test_cases(void) | |||
| 506 | TEST_P( "ldrh r2, [r",3, 24,"], #48") | 507 | TEST_P( "ldrh r2, [r",3, 24,"], #48") |
| 507 | TEST_P( "ldrh r10, [r",9, 64,"], #-48") | 508 | TEST_P( "ldrh r10, [r",9, 64,"], #-48") |
| 508 | TEST( "ldrh r0, [pc, #0]") | 509 | TEST( "ldrh r0, [pc, #0]") |
| 509 | TEST_UNSUPPORTED(".word 0xe1ffc3b0 @ ldrh r12, [pc, #48]!") | 510 | TEST_UNSUPPORTED(__inst_arm(0xe1ffc3b0) " @ ldrh r12, [pc, #48]!") |
| 510 | TEST_UNSUPPORTED(".word 0xe0d9f3b0 @ ldrh pc, [r9], #48") | 511 | TEST_UNSUPPORTED(__inst_arm(0xe0d9f3b0) " @ ldrh pc, [r9], #48") |
| 511 | 512 | ||
| 512 | TEST_PR( "ldrsb r0, [r",0, 48,", -r",2, 24,"]") | 513 | TEST_PR( "ldrsb r0, [r",0, 48,", -r",2, 24,"]") |
| 513 | TEST_PR( "ldrhisb r14, [r",13,0,", r",12, 48,"]") | 514 | TEST_PR( "ldrhisb r14, [r",13,0,", r",12, 48,"]") |
| @@ -515,8 +516,8 @@ void kprobe_arm_test_cases(void) | |||
| 515 | TEST_PR( "ldrlssb r12, [r",11,48,", -r",10,24,"]!") | 516 | TEST_PR( "ldrlssb r12, [r",11,48,", -r",10,24,"]!") |
| 516 | TEST_PR( "ldrsb r2, [r",3, 24,"], r",4, 48,"") | 517 | TEST_PR( "ldrsb r2, [r",3, 24,"], r",4, 48,"") |
| 517 | TEST_PR( "ldrsb r10, [r",9, 48,"], -r",11,24,"") | 518 | TEST_PR( "ldrsb r10, [r",9, 48,"], -r",11,24,"") |
| 518 | TEST_UNSUPPORTED(".word 0xe1bfc0da @ ldrsb r12, [pc, r10]!") | 519 | TEST_UNSUPPORTED(__inst_arm(0xe1bfc0da) " @ ldrsb r12, [pc, r10]!") |
| 519 | TEST_UNSUPPORTED(".word 0xe099f0db @ ldrsb pc, [r9], r11") | 520 | TEST_UNSUPPORTED(__inst_arm(0xe099f0db) " @ ldrsb pc, [r9], r11") |
| 520 | 521 | ||
| 521 | TEST_P( "ldrsb r0, [r",0, 24,", #-1]") | 522 | TEST_P( "ldrsb r0, [r",0, 24,", #-1]") |
| 522 | TEST_P( "ldrgesb r14, [r",13,0, ", #1]") | 523 | TEST_P( "ldrgesb r14, [r",13,0, ", #1]") |
| @@ -525,8 +526,8 @@ void kprobe_arm_test_cases(void) | |||
| 525 | TEST_P( "ldrsb r2, [r",3, 24,"], #48") | 526 | TEST_P( "ldrsb r2, [r",3, 24,"], #48") |
| 526 | TEST_P( "ldrsb r10, [r",9, 64,"], #-48") | 527 | TEST_P( "ldrsb r10, [r",9, 64,"], #-48") |
| 527 | TEST( "ldrsb r0, [pc, #0]") | 528 | TEST( "ldrsb r0, [pc, #0]") |
| 528 | TEST_UNSUPPORTED(".word 0xe1ffc3d0 @ ldrsb r12, [pc, #48]!") | 529 | TEST_UNSUPPORTED(__inst_arm(0xe1ffc3d0) " @ ldrsb r12, [pc, #48]!") |
| 529 | TEST_UNSUPPORTED(".word 0xe0d9f3d0 @ ldrsb pc, [r9], #48") | 530 | TEST_UNSUPPORTED(__inst_arm(0xe0d9f3d0) " @ ldrsb pc, [r9], #48") |
| 530 | 531 | ||
| 531 | TEST_PR( "ldrsh r0, [r",0, 48,", -r",2, 24,"]") | 532 | TEST_PR( "ldrsh r0, [r",0, 48,", -r",2, 24,"]") |
| 532 | TEST_PR( "ldrgtsh r14, [r",13,0, ", r",12, 48,"]") | 533 | TEST_PR( "ldrgtsh r14, [r",13,0, ", r",12, 48,"]") |
| @@ -534,8 +535,8 @@ void kprobe_arm_test_cases(void) | |||
| 534 | TEST_PR( "ldrlesh r12, [r",11,48,", -r",10,24,"]!") | 535 | TEST_PR( "ldrlesh r12, [r",11,48,", -r",10,24,"]!") |
| 535 | TEST_PR( "ldrsh r2, [r",3, 24,"], r",4, 48,"") | 536 | TEST_PR( "ldrsh r2, [r",3, 24,"], r",4, 48,"") |
| 536 | TEST_PR( "ldrsh r10, [r",9, 48,"], -r",11,24,"") | 537 | TEST_PR( "ldrsh r10, [r",9, 48,"], -r",11,24,"") |
| 537 | TEST_UNSUPPORTED(".word 0xe1bfc0fa @ ldrsh r12, [pc, r10]!") | 538 | TEST_UNSUPPORTED(__inst_arm(0xe1bfc0fa) " @ ldrsh r12, [pc, r10]!") |
| 538 | TEST_UNSUPPORTED(".word 0xe099f0fb @ ldrsh pc, [r9], r11") | 539 | TEST_UNSUPPORTED(__inst_arm(0xe099f0fb) " @ ldrsh pc, [r9], r11") |
| 539 | 540 | ||
| 540 | TEST_P( "ldrsh r0, [r",0, 24,", #-1]") | 541 | TEST_P( "ldrsh r0, [r",0, 24,", #-1]") |
| 541 | TEST_P( "ldreqsh r14, [r",13,0 ,", #1]") | 542 | TEST_P( "ldreqsh r14, [r",13,0 ,", #1]") |
| @@ -544,8 +545,8 @@ void kprobe_arm_test_cases(void) | |||
| 544 | TEST_P( "ldrsh r2, [r",3, 24,"], #48") | 545 | TEST_P( "ldrsh r2, [r",3, 24,"], #48") |
| 545 | TEST_P( "ldrsh r10, [r",9, 64,"], #-48") | 546 | TEST_P( "ldrsh r10, [r",9, 64,"], #-48") |
| 546 | TEST( "ldrsh r0, [pc, #0]") | 547 | TEST( "ldrsh r0, [pc, #0]") |
| 547 | TEST_UNSUPPORTED(".word 0xe1ffc3f0 @ ldrsh r12, [pc, #48]!") | 548 | TEST_UNSUPPORTED(__inst_arm(0xe1ffc3f0) " @ ldrsh r12, [pc, #48]!") |
| 548 | TEST_UNSUPPORTED(".word 0xe0d9f3f0 @ ldrsh pc, [r9], #48") | 549 | TEST_UNSUPPORTED(__inst_arm(0xe0d9f3f0) " @ ldrsh pc, [r9], #48") |
| 549 | 550 | ||
| 550 | #if __LINUX_ARM_ARCH__ >= 7 | 551 | #if __LINUX_ARM_ARCH__ >= 7 |
| 551 | TEST_UNSUPPORTED("strht r1, [r2], r3") | 552 | TEST_UNSUPPORTED("strht r1, [r2], r3") |
| @@ -564,7 +565,7 @@ void kprobe_arm_test_cases(void) | |||
| 564 | TEST_RPR( "strcsd r",12,VAL2,", [r",11,48,", -r",10,24,"]!") | 565 | TEST_RPR( "strcsd r",12,VAL2,", [r",11,48,", -r",10,24,"]!") |
| 565 | TEST_RPR( "strd r",2, VAL1,", [r",5, 24,"], r",4,48,"") | 566 | TEST_RPR( "strd r",2, VAL1,", [r",5, 24,"], r",4,48,"") |
| 566 | TEST_RPR( "strd r",10,VAL2,", [r",9, 48,"], -r",7,24,"") | 567 | TEST_RPR( "strd r",10,VAL2,", [r",9, 48,"], -r",7,24,"") |
| 567 | TEST_UNSUPPORTED(".word 0xe1afc0fa @ strd r12, [pc, r10]!") | 568 | TEST_UNSUPPORTED(__inst_arm(0xe1afc0fa) " @ strd r12, [pc, r10]!") |
| 568 | 569 | ||
| 569 | TEST_PR( "ldrd r0, [r",0, 48,", -r",2,24,"]") | 570 | TEST_PR( "ldrd r0, [r",0, 48,", -r",2,24,"]") |
| 570 | TEST_PR( "ldrmid r8, [r",13,0, ", r",12,48,"]") | 571 | TEST_PR( "ldrmid r8, [r",13,0, ", r",12,48,"]") |
| @@ -572,10 +573,10 @@ void kprobe_arm_test_cases(void) | |||
| 572 | TEST_PR( "ldrpld r6, [r",11,48,", -r",10,24,"]!") | 573 | TEST_PR( "ldrpld r6, [r",11,48,", -r",10,24,"]!") |
| 573 | TEST_PR( "ldrd r2, [r",5, 24,"], r",4,48,"") | 574 | TEST_PR( "ldrd r2, [r",5, 24,"], r",4,48,"") |
| 574 | TEST_PR( "ldrd r10, [r",9,48,"], -r",7,24,"") | 575 | TEST_PR( "ldrd r10, [r",9,48,"], -r",7,24,"") |
| 575 | TEST_UNSUPPORTED(".word 0xe1afc0da @ ldrd r12, [pc, r10]!") | 576 | TEST_UNSUPPORTED(__inst_arm(0xe1afc0da) " @ ldrd r12, [pc, r10]!") |
| 576 | TEST_UNSUPPORTED(".word 0xe089f0db @ ldrd pc, [r9], r11") | 577 | TEST_UNSUPPORTED(__inst_arm(0xe089f0db) " @ ldrd pc, [r9], r11") |
| 577 | TEST_UNSUPPORTED(".word 0xe089e0db @ ldrd lr, [r9], r11") | 578 | TEST_UNSUPPORTED(__inst_arm(0xe089e0db) " @ ldrd lr, [r9], r11") |
| 578 | TEST_UNSUPPORTED(".word 0xe089c0df @ ldrd r12, [r9], pc") | 579 | TEST_UNSUPPORTED(__inst_arm(0xe089c0df) " @ ldrd r12, [r9], pc") |
| 579 | 580 | ||
| 580 | TEST_RP( "strd r",0, VAL1,", [r",1, 24,", #-8]") | 581 | TEST_RP( "strd r",0, VAL1,", [r",1, 24,", #-8]") |
| 581 | TEST_RP( "strvsd r",8, VAL2,", [r",13,0, ", #8]") | 582 | TEST_RP( "strvsd r",8, VAL2,", [r",13,0, ", #8]") |
| @@ -583,7 +584,7 @@ void kprobe_arm_test_cases(void) | |||
| 583 | TEST_RP( "strvcd r",12,VAL2,", [r",11,24,", #-16]!") | 584 | TEST_RP( "strvcd r",12,VAL2,", [r",11,24,", #-16]!") |
| 584 | TEST_RP( "strd r",2, VAL1,", [r",4, 24,"], #48") | 585 | TEST_RP( "strd r",2, VAL1,", [r",4, 24,"], #48") |
| 585 | TEST_RP( "strd r",10,VAL2,", [r",9, 64,"], #-48") | 586 | TEST_RP( "strd r",10,VAL2,", [r",9, 64,"], #-48") |
| 586 | TEST_UNSUPPORTED(".word 0xe1efc3f0 @ strd r12, [pc, #48]!") | 587 | TEST_UNSUPPORTED(__inst_arm(0xe1efc3f0) " @ strd r12, [pc, #48]!") |
| 587 | 588 | ||
| 588 | TEST_P( "ldrd r0, [r",0, 24,", #-8]") | 589 | TEST_P( "ldrd r0, [r",0, 24,", #-8]") |
| 589 | TEST_P( "ldrhid r8, [r",13,0, ", #8]") | 590 | TEST_P( "ldrhid r8, [r",13,0, ", #8]") |
| @@ -591,9 +592,9 @@ void kprobe_arm_test_cases(void) | |||
| 591 | TEST_P( "ldrlsd r6, [r",11,24,", #-16]!") | 592 | TEST_P( "ldrlsd r6, [r",11,24,", #-16]!") |
| 592 | TEST_P( "ldrd r2, [r",5, 24,"], #48") | 593 | TEST_P( "ldrd r2, [r",5, 24,"], #48") |
| 593 | TEST_P( "ldrd r10, [r",9,6,"], #-48") | 594 | TEST_P( "ldrd r10, [r",9,6,"], #-48") |
| 594 | TEST_UNSUPPORTED(".word 0xe1efc3d0 @ ldrd r12, [pc, #48]!") | 595 | TEST_UNSUPPORTED(__inst_arm(0xe1efc3d0) " @ ldrd r12, [pc, #48]!") |
| 595 | TEST_UNSUPPORTED(".word 0xe0c9f3d0 @ ldrd pc, [r9], #48") | 596 | TEST_UNSUPPORTED(__inst_arm(0xe0c9f3d0) " @ ldrd pc, [r9], #48") |
| 596 | TEST_UNSUPPORTED(".word 0xe0c9e3d0 @ ldrd lr, [r9], #48") | 597 | TEST_UNSUPPORTED(__inst_arm(0xe0c9e3d0) " @ ldrd lr, [r9], #48") |
| 597 | 598 | ||
| 598 | TEST_GROUP("Miscellaneous") | 599 | TEST_GROUP("Miscellaneous") |
| 599 | 600 | ||
| @@ -601,11 +602,11 @@ void kprobe_arm_test_cases(void) | |||
| 601 | TEST("movw r0, #0") | 602 | TEST("movw r0, #0") |
| 602 | TEST("movw r0, #0xffff") | 603 | TEST("movw r0, #0xffff") |
| 603 | TEST("movw lr, #0xffff") | 604 | TEST("movw lr, #0xffff") |
| 604 | TEST_UNSUPPORTED(".word 0xe300f000 @ movw pc, #0") | 605 | TEST_UNSUPPORTED(__inst_arm(0xe300f000) " @ movw pc, #0") |
| 605 | TEST_R("movt r",0, VAL1,", #0") | 606 | TEST_R("movt r",0, VAL1,", #0") |
| 606 | TEST_R("movt r",0, VAL2,", #0xffff") | 607 | TEST_R("movt r",0, VAL2,", #0xffff") |
| 607 | TEST_R("movt r",14,VAL1,", #0xffff") | 608 | TEST_R("movt r",14,VAL1,", #0xffff") |
| 608 | TEST_UNSUPPORTED(".word 0xe340f000 @ movt pc, #0") | 609 | TEST_UNSUPPORTED(__inst_arm(0xe340f000) " @ movt pc, #0") |
| 609 | #endif | 610 | #endif |
| 610 | 611 | ||
| 611 | TEST_UNSUPPORTED("msr cpsr, 0x13") | 612 | TEST_UNSUPPORTED("msr cpsr, 0x13") |
| @@ -673,20 +674,20 @@ void kprobe_arm_test_cases(void) | |||
| 673 | #ifdef CONFIG_THUMB2_KERNEL | 674 | #ifdef CONFIG_THUMB2_KERNEL |
| 674 | TEST_ARM_TO_THUMB_INTERWORK_P("ldr pc, [r",0,0,", #15*4]") | 675 | TEST_ARM_TO_THUMB_INTERWORK_P("ldr pc, [r",0,0,", #15*4]") |
| 675 | #endif | 676 | #endif |
| 676 | TEST_UNSUPPORTED(".word 0xe5af6008 @ str r6, [pc, #8]!") | 677 | TEST_UNSUPPORTED(__inst_arm(0xe5af6008) " @ str r6, [pc, #8]!") |
| 677 | TEST_UNSUPPORTED(".word 0xe7af6008 @ str r6, [pc, r8]!") | 678 | TEST_UNSUPPORTED(__inst_arm(0xe7af6008) " @ str r6, [pc, r8]!") |
| 678 | TEST_UNSUPPORTED(".word 0xe5bf6008 @ ldr r6, [pc, #8]!") | 679 | TEST_UNSUPPORTED(__inst_arm(0xe5bf6008) " @ ldr r6, [pc, #8]!") |
| 679 | TEST_UNSUPPORTED(".word 0xe7bf6008 @ ldr r6, [pc, r8]!") | 680 | TEST_UNSUPPORTED(__inst_arm(0xe7bf6008) " @ ldr r6, [pc, r8]!") |
| 680 | TEST_UNSUPPORTED(".word 0xe788600f @ str r6, [r8, pc]") | 681 | TEST_UNSUPPORTED(__inst_arm(0xe788600f) " @ str r6, [r8, pc]") |
| 681 | TEST_UNSUPPORTED(".word 0xe798600f @ ldr r6, [r8, pc]") | 682 | TEST_UNSUPPORTED(__inst_arm(0xe798600f) " @ ldr r6, [r8, pc]") |
| 682 | 683 | ||
| 683 | LOAD_STORE("b") | 684 | LOAD_STORE("b") |
| 684 | TEST_UNSUPPORTED(".word 0xe5f7f008 @ ldrb pc, [r7, #8]!") | 685 | TEST_UNSUPPORTED(__inst_arm(0xe5f7f008) " @ ldrb pc, [r7, #8]!") |
| 685 | TEST_UNSUPPORTED(".word 0xe7f7f008 @ ldrb pc, [r7, r8]!") | 686 | TEST_UNSUPPORTED(__inst_arm(0xe7f7f008) " @ ldrb pc, [r7, r8]!") |
| 686 | TEST_UNSUPPORTED(".word 0xe5ef6008 @ strb r6, [pc, #8]!") | 687 | TEST_UNSUPPORTED(__inst_arm(0xe5ef6008) " @ strb r6, [pc, #8]!") |
| 687 | TEST_UNSUPPORTED(".word 0xe7ef6008 @ strb r6, [pc, r3]!") | 688 | TEST_UNSUPPORTED(__inst_arm(0xe7ef6008) " @ strb r6, [pc, r3]!") |
| 688 | TEST_UNSUPPORTED(".word 0xe5ff6008 @ ldrb r6, [pc, #8]!") | 689 | TEST_UNSUPPORTED(__inst_arm(0xe5ff6008) " @ ldrb r6, [pc, #8]!") |
| 689 | TEST_UNSUPPORTED(".word 0xe7ff6008 @ ldrb r6, [pc, r3]!") | 690 | TEST_UNSUPPORTED(__inst_arm(0xe7ff6008) " @ ldrb r6, [pc, r3]!") |
| 690 | 691 | ||
| 691 | TEST_UNSUPPORTED("ldrt r0, [r1], #4") | 692 | TEST_UNSUPPORTED("ldrt r0, [r1], #4") |
| 692 | TEST_UNSUPPORTED("ldrt r1, [r2], r3") | 693 | TEST_UNSUPPORTED("ldrt r1, [r2], r3") |
| @@ -700,153 +701,153 @@ void kprobe_arm_test_cases(void) | |||
| 700 | #if __LINUX_ARM_ARCH__ >= 7 | 701 | #if __LINUX_ARM_ARCH__ >= 7 |
| 701 | TEST_GROUP("Parallel addition and subtraction, signed") | 702 | TEST_GROUP("Parallel addition and subtraction, signed") |
| 702 | 703 | ||
| 703 | TEST_UNSUPPORTED(".word 0xe6000010") /* Unallocated space */ | 704 | TEST_UNSUPPORTED(__inst_arm(0xe6000010) "") /* Unallocated space */ |
| 704 | TEST_UNSUPPORTED(".word 0xe60fffff") /* Unallocated space */ | 705 | TEST_UNSUPPORTED(__inst_arm(0xe60fffff) "") /* Unallocated space */ |
| 705 | 706 | ||
| 706 | TEST_RR( "sadd16 r0, r",0, HH1,", r",1, HH2,"") | 707 | TEST_RR( "sadd16 r0, r",0, HH1,", r",1, HH2,"") |
| 707 | TEST_RR( "sadd16 r14, r",12,HH2,", r",10,HH1,"") | 708 | TEST_RR( "sadd16 r14, r",12,HH2,", r",10,HH1,"") |
| 708 | TEST_UNSUPPORTED(".word 0xe61cff1a @ sadd16 pc, r12, r10") | 709 | TEST_UNSUPPORTED(__inst_arm(0xe61cff1a) " @ sadd16 pc, r12, r10") |
| 709 | TEST_RR( "sasx r0, r",0, HH1,", r",1, HH2,"") | 710 | TEST_RR( "sasx r0, r",0, HH1,", r",1, HH2,"") |
| 710 | TEST_RR( "sasx r14, r",12,HH2,", r",10,HH1,"") | 711 | TEST_RR( "sasx r14, r",12,HH2,", r",10,HH1,"") |
| 711 | TEST_UNSUPPORTED(".word 0xe61cff3a @ sasx pc, r12, r10") | 712 | TEST_UNSUPPORTED(__inst_arm(0xe61cff3a) " @ sasx pc, r12, r10") |
| 712 | TEST_RR( "ssax r0, r",0, HH1,", r",1, HH2,"") | 713 | TEST_RR( "ssax r0, r",0, HH1,", r",1, HH2,"") |
| 713 | TEST_RR( "ssax r14, r",12,HH2,", r",10,HH1,"") | 714 | TEST_RR( "ssax r14, r",12,HH2,", r",10,HH1,"") |
| 714 | TEST_UNSUPPORTED(".word 0xe61cff5a @ ssax pc, r12, r10") | 715 | TEST_UNSUPPORTED(__inst_arm(0xe61cff5a) " @ ssax pc, r12, r10") |
| 715 | TEST_RR( "ssub16 r0, r",0, HH1,", r",1, HH2,"") | 716 | TEST_RR( "ssub16 r0, r",0, HH1,", r",1, HH2,"") |
| 716 | TEST_RR( "ssub16 r14, r",12,HH2,", r",10,HH1,"") | 717 | TEST_RR( "ssub16 r14, r",12,HH2,", r",10,HH1,"") |
| 717 | TEST_UNSUPPORTED(".word 0xe61cff7a @ ssub16 pc, r12, r10") | 718 | TEST_UNSUPPORTED(__inst_arm(0xe61cff7a) " @ ssub16 pc, r12, r10") |
| 718 | TEST_RR( "sadd8 r0, r",0, HH1,", r",1, HH2,"") | 719 | TEST_RR( "sadd8 r0, r",0, HH1,", r",1, HH2,"") |
| 719 | TEST_RR( "sadd8 r14, r",12,HH2,", r",10,HH1,"") | 720 | TEST_RR( "sadd8 r14, r",12,HH2,", r",10,HH1,"") |
| 720 | TEST_UNSUPPORTED(".word 0xe61cff9a @ sadd8 pc, r12, r10") | 721 | TEST_UNSUPPORTED(__inst_arm(0xe61cff9a) " @ sadd8 pc, r12, r10") |
| 721 | TEST_UNSUPPORTED(".word 0xe61000b0") /* Unallocated space */ | 722 | TEST_UNSUPPORTED(__inst_arm(0xe61000b0) "") /* Unallocated space */ |
| 722 | TEST_UNSUPPORTED(".word 0xe61fffbf") /* Unallocated space */ | 723 | TEST_UNSUPPORTED(__inst_arm(0xe61fffbf) "") /* Unallocated space */ |
| 723 | TEST_UNSUPPORTED(".word 0xe61000d0") /* Unallocated space */ | 724 | TEST_UNSUPPORTED(__inst_arm(0xe61000d0) "") /* Unallocated space */ |
| 724 | TEST_UNSUPPORTED(".word 0xe61fffdf") /* Unallocated space */ | 725 | TEST_UNSUPPORTED(__inst_arm(0xe61fffdf) "") /* Unallocated space */ |
| 725 | TEST_RR( "ssub8 r0, r",0, HH1,", r",1, HH2,"") | 726 | TEST_RR( "ssub8 r0, r",0, HH1,", r",1, HH2,"") |
| 726 | TEST_RR( "ssub8 r14, r",12,HH2,", r",10,HH1,"") | 727 | TEST_RR( "ssub8 r14, r",12,HH2,", r",10,HH1,"") |
| 727 | TEST_UNSUPPORTED(".word 0xe61cfffa @ ssub8 pc, r12, r10") | 728 | TEST_UNSUPPORTED(__inst_arm(0xe61cfffa) " @ ssub8 pc, r12, r10") |
| 728 | 729 | ||
| 729 | TEST_RR( "qadd16 r0, r",0, HH1,", r",1, HH2,"") | 730 | TEST_RR( "qadd16 r0, r",0, HH1,", r",1, HH2,"") |
| 730 | TEST_RR( "qadd16 r14, r",12,HH2,", r",10,HH1,"") | 731 | TEST_RR( "qadd16 r14, r",12,HH2,", r",10,HH1,"") |
| 731 | TEST_UNSUPPORTED(".word 0xe62cff1a @ qadd16 pc, r12, r10") | 732 | TEST_UNSUPPORTED(__inst_arm(0xe62cff1a) " @ qadd16 pc, r12, r10") |
| 732 | TEST_RR( "qasx r0, r",0, HH1,", r",1, HH2,"") | 733 | TEST_RR( "qasx r0, r",0, HH1,", r",1, HH2,"") |
| 733 | TEST_RR( "qasx r14, r",12,HH2,", r",10,HH1,"") | 734 | TEST_RR( "qasx r14, r",12,HH2,", r",10,HH1,"") |
| 734 | TEST_UNSUPPORTED(".word 0xe62cff3a @ qasx pc, r12, r10") | 735 | TEST_UNSUPPORTED(__inst_arm(0xe62cff3a) " @ qasx pc, r12, r10") |
| 735 | TEST_RR( "qsax r0, r",0, HH1,", r",1, HH2,"") | 736 | TEST_RR( "qsax r0, r",0, HH1,", r",1, HH2,"") |
| 736 | TEST_RR( "qsax r14, r",12,HH2,", r",10,HH1,"") | 737 | TEST_RR( "qsax r14, r",12,HH2,", r",10,HH1,"") |
| 737 | TEST_UNSUPPORTED(".word 0xe62cff5a @ qsax pc, r12, r10") | 738 | TEST_UNSUPPORTED(__inst_arm(0xe62cff5a) " @ qsax pc, r12, r10") |
| 738 | TEST_RR( "qsub16 r0, r",0, HH1,", r",1, HH2,"") | 739 | TEST_RR( "qsub16 r0, r",0, HH1,", r",1, HH2,"") |
| 739 | TEST_RR( "qsub16 r14, r",12,HH2,", r",10,HH1,"") | 740 | TEST_RR( "qsub16 r14, r",12,HH2,", r",10,HH1,"") |
| 740 | TEST_UNSUPPORTED(".word 0xe62cff7a @ qsub16 pc, r12, r10") | 741 | TEST_UNSUPPORTED(__inst_arm(0xe62cff7a) " @ qsub16 pc, r12, r10") |
| 741 | TEST_RR( "qadd8 r0, r",0, HH1,", r",1, HH2,"") | 742 | TEST_RR( "qadd8 r0, r",0, HH1,", r",1, HH2,"") |
| 742 | TEST_RR( "qadd8 r14, r",12,HH2,", r",10,HH1,"") | 743 | TEST_RR( "qadd8 r14, r",12,HH2,", r",10,HH1,"") |
| 743 | TEST_UNSUPPORTED(".word 0xe62cff9a @ qadd8 pc, r12, r10") | 744 | TEST_UNSUPPORTED(__inst_arm(0xe62cff9a) " @ qadd8 pc, r12, r10") |
| 744 | TEST_UNSUPPORTED(".word 0xe62000b0") /* Unallocated space */ | 745 | TEST_UNSUPPORTED(__inst_arm(0xe62000b0) "") /* Unallocated space */ |
| 745 | TEST_UNSUPPORTED(".word 0xe62fffbf") /* Unallocated space */ | 746 | TEST_UNSUPPORTED(__inst_arm(0xe62fffbf) "") /* Unallocated space */ |
| 746 | TEST_UNSUPPORTED(".word 0xe62000d0") /* Unallocated space */ | 747 | TEST_UNSUPPORTED(__inst_arm(0xe62000d0) "") /* Unallocated space */ |
| 747 | TEST_UNSUPPORTED(".word 0xe62fffdf") /* Unallocated space */ | 748 | TEST_UNSUPPORTED(__inst_arm(0xe62fffdf) "") /* Unallocated space */ |
| 748 | TEST_RR( "qsub8 r0, r",0, HH1,", r",1, HH2,"") | 749 | TEST_RR( "qsub8 r0, r",0, HH1,", r",1, HH2,"") |
| 749 | TEST_RR( "qsub8 r14, r",12,HH2,", r",10,HH1,"") | 750 | TEST_RR( "qsub8 r14, r",12,HH2,", r",10,HH1,"") |
| 750 | TEST_UNSUPPORTED(".word 0xe62cfffa @ qsub8 pc, r12, r10") | 751 | TEST_UNSUPPORTED(__inst_arm(0xe62cfffa) " @ qsub8 pc, r12, r10") |
| 751 | 752 | ||
| 752 | TEST_RR( "shadd16 r0, r",0, HH1,", r",1, HH2,"") | 753 | TEST_RR( "shadd16 r0, r",0, HH1,", r",1, HH2,"") |
| 753 | TEST_RR( "shadd16 r14, r",12,HH2,", r",10,HH1,"") | 754 | TEST_RR( "shadd16 r14, r",12,HH2,", r",10,HH1,"") |
| 754 | TEST_UNSUPPORTED(".word 0xe63cff1a @ shadd16 pc, r12, r10") | 755 | TEST_UNSUPPORTED(__inst_arm(0xe63cff1a) " @ shadd16 pc, r12, r10") |
| 755 | TEST_RR( "shasx r0, r",0, HH1,", r",1, HH2,"") | 756 | TEST_RR( "shasx r0, r",0, HH1,", r",1, HH2,"") |
| 756 | TEST_RR( "shasx r14, r",12,HH2,", r",10,HH1,"") | 757 | TEST_RR( "shasx r14, r",12,HH2,", r",10,HH1,"") |
| 757 | TEST_UNSUPPORTED(".word 0xe63cff3a @ shasx pc, r12, r10") | 758 | TEST_UNSUPPORTED(__inst_arm(0xe63cff3a) " @ shasx pc, r12, r10") |
| 758 | TEST_RR( "shsax r0, r",0, HH1,", r",1, HH2,"") | 759 | TEST_RR( "shsax r0, r",0, HH1,", r",1, HH2,"") |
| 759 | TEST_RR( "shsax r14, r",12,HH2,", r",10,HH1,"") | 760 | TEST_RR( "shsax r14, r",12,HH2,", r",10,HH1,"") |
| 760 | TEST_UNSUPPORTED(".word 0xe63cff5a @ shsax pc, r12, r10") | 761 | TEST_UNSUPPORTED(__inst_arm(0xe63cff5a) " @ shsax pc, r12, r10") |
| 761 | TEST_RR( "shsub16 r0, r",0, HH1,", r",1, HH2,"") | 762 | TEST_RR( "shsub16 r0, r",0, HH1,", r",1, HH2,"") |
| 762 | TEST_RR( "shsub16 r14, r",12,HH2,", r",10,HH1,"") | 763 | TEST_RR( "shsub16 r14, r",12,HH2,", r",10,HH1,"") |
| 763 | TEST_UNSUPPORTED(".word 0xe63cff7a @ shsub16 pc, r12, r10") | 764 | TEST_UNSUPPORTED(__inst_arm(0xe63cff7a) " @ shsub16 pc, r12, r10") |
| 764 | TEST_RR( "shadd8 r0, r",0, HH1,", r",1, HH2,"") | 765 | TEST_RR( "shadd8 r0, r",0, HH1,", r",1, HH2,"") |
| 765 | TEST_RR( "shadd8 r14, r",12,HH2,", r",10,HH1,"") | 766 | TEST_RR( "shadd8 r14, r",12,HH2,", r",10,HH1,"") |
| 766 | TEST_UNSUPPORTED(".word 0xe63cff9a @ shadd8 pc, r12, r10") | 767 | TEST_UNSUPPORTED(__inst_arm(0xe63cff9a) " @ shadd8 pc, r12, r10") |
| 767 | TEST_UNSUPPORTED(".word 0xe63000b0") /* Unallocated space */ | 768 | TEST_UNSUPPORTED(__inst_arm(0xe63000b0) "") /* Unallocated space */ |
| 768 | TEST_UNSUPPORTED(".word 0xe63fffbf") /* Unallocated space */ | 769 | TEST_UNSUPPORTED(__inst_arm(0xe63fffbf) "") /* Unallocated space */ |
| 769 | TEST_UNSUPPORTED(".word 0xe63000d0") /* Unallocated space */ | 770 | TEST_UNSUPPORTED(__inst_arm(0xe63000d0) "") /* Unallocated space */ |
| 770 | TEST_UNSUPPORTED(".word 0xe63fffdf") /* Unallocated space */ | 771 | TEST_UNSUPPORTED(__inst_arm(0xe63fffdf) "") /* Unallocated space */ |
| 771 | TEST_RR( "shsub8 r0, r",0, HH1,", r",1, HH2,"") | 772 | TEST_RR( "shsub8 r0, r",0, HH1,", r",1, HH2,"") |
| 772 | TEST_RR( "shsub8 r14, r",12,HH2,", r",10,HH1,"") | 773 | TEST_RR( "shsub8 r14, r",12,HH2,", r",10,HH1,"") |
| 773 | TEST_UNSUPPORTED(".word 0xe63cfffa @ shsub8 pc, r12, r10") | 774 | TEST_UNSUPPORTED(__inst_arm(0xe63cfffa) " @ shsub8 pc, r12, r10") |
| 774 | 775 | ||
| 775 | TEST_GROUP("Parallel addition and subtraction, unsigned") | 776 | TEST_GROUP("Parallel addition and subtraction, unsigned") |
| 776 | 777 | ||
| 777 | TEST_UNSUPPORTED(".word 0xe6400010") /* Unallocated space */ | 778 | TEST_UNSUPPORTED(__inst_arm(0xe6400010) "") /* Unallocated space */ |
| 778 | TEST_UNSUPPORTED(".word 0xe64fffff") /* Unallocated space */ | 779 | TEST_UNSUPPORTED(__inst_arm(0xe64fffff) "") /* Unallocated space */ |
| 779 | 780 | ||
| 780 | TEST_RR( "uadd16 r0, r",0, HH1,", r",1, HH2,"") | 781 | TEST_RR( "uadd16 r0, r",0, HH1,", r",1, HH2,"") |
| 781 | TEST_RR( "uadd16 r14, r",12,HH2,", r",10,HH1,"") | 782 | TEST_RR( "uadd16 r14, r",12,HH2,", r",10,HH1,"") |
| 782 | TEST_UNSUPPORTED(".word 0xe65cff1a @ uadd16 pc, r12, r10") | 783 | TEST_UNSUPPORTED(__inst_arm(0xe65cff1a) " @ uadd16 pc, r12, r10") |
| 783 | TEST_RR( "uasx r0, r",0, HH1,", r",1, HH2,"") | 784 | TEST_RR( "uasx r0, r",0, HH1,", r",1, HH2,"") |
| 784 | TEST_RR( "uasx r14, r",12,HH2,", r",10,HH1,"") | 785 | TEST_RR( "uasx r14, r",12,HH2,", r",10,HH1,"") |
| 785 | TEST_UNSUPPORTED(".word 0xe65cff3a @ uasx pc, r12, r10") | 786 | TEST_UNSUPPORTED(__inst_arm(0xe65cff3a) " @ uasx pc, r12, r10") |
| 786 | TEST_RR( "usax r0, r",0, HH1,", r",1, HH2,"") | 787 | TEST_RR( "usax r0, r",0, HH1,", r",1, HH2,"") |
| 787 | TEST_RR( "usax r14, r",12,HH2,", r",10,HH1,"") | 788 | TEST_RR( "usax r14, r",12,HH2,", r",10,HH1,"") |
| 788 | TEST_UNSUPPORTED(".word 0xe65cff5a @ usax pc, r12, r10") | 789 | TEST_UNSUPPORTED(__inst_arm(0xe65cff5a) " @ usax pc, r12, r10") |
| 789 | TEST_RR( "usub16 r0, r",0, HH1,", r",1, HH2,"") | 790 | TEST_RR( "usub16 r0, r",0, HH1,", r",1, HH2,"") |
| 790 | TEST_RR( "usub16 r14, r",12,HH2,", r",10,HH1,"") | 791 | TEST_RR( "usub16 r14, r",12,HH2,", r",10,HH1,"") |
| 791 | TEST_UNSUPPORTED(".word 0xe65cff7a @ usub16 pc, r12, r10") | 792 | TEST_UNSUPPORTED(__inst_arm(0xe65cff7a) " @ usub16 pc, r12, r10") |
| 792 | TEST_RR( "uadd8 r0, r",0, HH1,", r",1, HH2,"") | 793 | TEST_RR( "uadd8 r0, r",0, HH1,", r",1, HH2,"") |
| 793 | TEST_RR( "uadd8 r14, r",12,HH2,", r",10,HH1,"") | 794 | TEST_RR( "uadd8 r14, r",12,HH2,", r",10,HH1,"") |
| 794 | TEST_UNSUPPORTED(".word 0xe65cff9a @ uadd8 pc, r12, r10") | 795 | TEST_UNSUPPORTED(__inst_arm(0xe65cff9a) " @ uadd8 pc, r12, r10") |
| 795 | TEST_UNSUPPORTED(".word 0xe65000b0") /* Unallocated space */ | 796 | TEST_UNSUPPORTED(__inst_arm(0xe65000b0) "") /* Unallocated space */ |
| 796 | TEST_UNSUPPORTED(".word 0xe65fffbf") /* Unallocated space */ | 797 | TEST_UNSUPPORTED(__inst_arm(0xe65fffbf) "") /* Unallocated space */ |
| 797 | TEST_UNSUPPORTED(".word 0xe65000d0") /* Unallocated space */ | 798 | TEST_UNSUPPORTED(__inst_arm(0xe65000d0) "") /* Unallocated space */ |
| 798 | TEST_UNSUPPORTED(".word 0xe65fffdf") /* Unallocated space */ | 799 | TEST_UNSUPPORTED(__inst_arm(0xe65fffdf) "") /* Unallocated space */ |
| 799 | TEST_RR( "usub8 r0, r",0, HH1,", r",1, HH2,"") | 800 | TEST_RR( "usub8 r0, r",0, HH1,", r",1, HH2,"") |
| 800 | TEST_RR( "usub8 r14, r",12,HH2,", r",10,HH1,"") | 801 | TEST_RR( "usub8 r14, r",12,HH2,", r",10,HH1,"") |
| 801 | TEST_UNSUPPORTED(".word 0xe65cfffa @ usub8 pc, r12, r10") | 802 | TEST_UNSUPPORTED(__inst_arm(0xe65cfffa) " @ usub8 pc, r12, r10") |
| 802 | 803 | ||
| 803 | TEST_RR( "uqadd16 r0, r",0, HH1,", r",1, HH2,"") | 804 | TEST_RR( "uqadd16 r0, r",0, HH1,", r",1, HH2,"") |
| 804 | TEST_RR( "uqadd16 r14, r",12,HH2,", r",10,HH1,"") | 805 | TEST_RR( "uqadd16 r14, r",12,HH2,", r",10,HH1,"") |
| 805 | TEST_UNSUPPORTED(".word 0xe66cff1a @ uqadd16 pc, r12, r10") | 806 | TEST_UNSUPPORTED(__inst_arm(0xe66cff1a) " @ uqadd16 pc, r12, r10") |
| 806 | TEST_RR( "uqasx r0, r",0, HH1,", r",1, HH2,"") | 807 | TEST_RR( "uqasx r0, r",0, HH1,", r",1, HH2,"") |
| 807 | TEST_RR( "uqasx r14, r",12,HH2,", r",10,HH1,"") | 808 | TEST_RR( "uqasx r14, r",12,HH2,", r",10,HH1,"") |
| 808 | TEST_UNSUPPORTED(".word 0xe66cff3a @ uqasx pc, r12, r10") | 809 | TEST_UNSUPPORTED(__inst_arm(0xe66cff3a) " @ uqasx pc, r12, r10") |
| 809 | TEST_RR( "uqsax r0, r",0, HH1,", r",1, HH2,"") | 810 | TEST_RR( "uqsax r0, r",0, HH1,", r",1, HH2,"") |
| 810 | TEST_RR( "uqsax r14, r",12,HH2,", r",10,HH1,"") | 811 | TEST_RR( "uqsax r14, r",12,HH2,", r",10,HH1,"") |
| 811 | TEST_UNSUPPORTED(".word 0xe66cff5a @ uqsax pc, r12, r10") | 812 | TEST_UNSUPPORTED(__inst_arm(0xe66cff5a) " @ uqsax pc, r12, r10") |
| 812 | TEST_RR( "uqsub16 r0, r",0, HH1,", r",1, HH2,"") | 813 | TEST_RR( "uqsub16 r0, r",0, HH1,", r",1, HH2,"") |
| 813 | TEST_RR( "uqsub16 r14, r",12,HH2,", r",10,HH1,"") | 814 | TEST_RR( "uqsub16 r14, r",12,HH2,", r",10,HH1,"") |
| 814 | TEST_UNSUPPORTED(".word 0xe66cff7a @ uqsub16 pc, r12, r10") | 815 | TEST_UNSUPPORTED(__inst_arm(0xe66cff7a) " @ uqsub16 pc, r12, r10") |
| 815 | TEST_RR( "uqadd8 r0, r",0, HH1,", r",1, HH2,"") | 816 | TEST_RR( "uqadd8 r0, r",0, HH1,", r",1, HH2,"") |
| 816 | TEST_RR( "uqadd8 r14, r",12,HH2,", r",10,HH1,"") | 817 | TEST_RR( "uqadd8 r14, r",12,HH2,", r",10,HH1,"") |
| 817 | TEST_UNSUPPORTED(".word 0xe66cff9a @ uqadd8 pc, r12, r10") | 818 | TEST_UNSUPPORTED(__inst_arm(0xe66cff9a) " @ uqadd8 pc, r12, r10") |
| 818 | TEST_UNSUPPORTED(".word 0xe66000b0") /* Unallocated space */ | 819 | TEST_UNSUPPORTED(__inst_arm(0xe66000b0) "") /* Unallocated space */ |
| 819 | TEST_UNSUPPORTED(".word 0xe66fffbf") /* Unallocated space */ | 820 | TEST_UNSUPPORTED(__inst_arm(0xe66fffbf) "") /* Unallocated space */ |
| 820 | TEST_UNSUPPORTED(".word 0xe66000d0") /* Unallocated space */ | 821 | TEST_UNSUPPORTED(__inst_arm(0xe66000d0) "") /* Unallocated space */ |
| 821 | TEST_UNSUPPORTED(".word 0xe66fffdf") /* Unallocated space */ | 822 | TEST_UNSUPPORTED(__inst_arm(0xe66fffdf) "") /* Unallocated space */ |
| 822 | TEST_RR( "uqsub8 r0, r",0, HH1,", r",1, HH2,"") | 823 | TEST_RR( "uqsub8 r0, r",0, HH1,", r",1, HH2,"") |
| 823 | TEST_RR( "uqsub8 r14, r",12,HH2,", r",10,HH1,"") | 824 | TEST_RR( "uqsub8 r14, r",12,HH2,", r",10,HH1,"") |
| 824 | TEST_UNSUPPORTED(".word 0xe66cfffa @ uqsub8 pc, r12, r10") | 825 | TEST_UNSUPPORTED(__inst_arm(0xe66cfffa) " @ uqsub8 pc, r12, r10") |
| 825 | 826 | ||
| 826 | TEST_RR( "uhadd16 r0, r",0, HH1,", r",1, HH2,"") | 827 | TEST_RR( "uhadd16 r0, r",0, HH1,", r",1, HH2,"") |
| 827 | TEST_RR( "uhadd16 r14, r",12,HH2,", r",10,HH1,"") | 828 | TEST_RR( "uhadd16 r14, r",12,HH2,", r",10,HH1,"") |
| 828 | TEST_UNSUPPORTED(".word 0xe67cff1a @ uhadd16 pc, r12, r10") | 829 | TEST_UNSUPPORTED(__inst_arm(0xe67cff1a) " @ uhadd16 pc, r12, r10") |
| 829 | TEST_RR( "uhasx r0, r",0, HH1,", r",1, HH2,"") | 830 | TEST_RR( "uhasx r0, r",0, HH1,", r",1, HH2,"") |
| 830 | TEST_RR( "uhasx r14, r",12,HH2,", r",10,HH1,"") | 831 | TEST_RR( "uhasx r14, r",12,HH2,", r",10,HH1,"") |
| 831 | TEST_UNSUPPORTED(".word 0xe67cff3a @ uhasx pc, r12, r10") | 832 | TEST_UNSUPPORTED(__inst_arm(0xe67cff3a) " @ uhasx pc, r12, r10") |
| 832 | TEST_RR( "uhsax r0, r",0, HH1,", r",1, HH2,"") | 833 | TEST_RR( "uhsax r0, r",0, HH1,", r",1, HH2,"") |
| 833 | TEST_RR( "uhsax r14, r",12,HH2,", r",10,HH1,"") | 834 | TEST_RR( "uhsax r14, r",12,HH2,", r",10,HH1,"") |
| 834 | TEST_UNSUPPORTED(".word 0xe67cff5a @ uhsax pc, r12, r10") | 835 | TEST_UNSUPPORTED(__inst_arm(0xe67cff5a) " @ uhsax pc, r12, r10") |
| 835 | TEST_RR( "uhsub16 r0, r",0, HH1,", r",1, HH2,"") | 836 | TEST_RR( "uhsub16 r0, r",0, HH1,", r",1, HH2,"") |
| 836 | TEST_RR( "uhsub16 r14, r",12,HH2,", r",10,HH1,"") | 837 | TEST_RR( "uhsub16 r14, r",12,HH2,", r",10,HH1,"") |
| 837 | TEST_UNSUPPORTED(".word 0xe67cff7a @ uhsub16 pc, r12, r10") | 838 | TEST_UNSUPPORTED(__inst_arm(0xe67cff7a) " @ uhsub16 pc, r12, r10") |
| 838 | TEST_RR( "uhadd8 r0, r",0, HH1,", r",1, HH2,"") | 839 | TEST_RR( "uhadd8 r0, r",0, HH1,", r",1, HH2,"") |
| 839 | TEST_RR( "uhadd8 r14, r",12,HH2,", r",10,HH1,"") | 840 | TEST_RR( "uhadd8 r14, r",12,HH2,", r",10,HH1,"") |
| 840 | TEST_UNSUPPORTED(".word 0xe67cff9a @ uhadd8 pc, r12, r10") | 841 | TEST_UNSUPPORTED(__inst_arm(0xe67cff9a) " @ uhadd8 pc, r12, r10") |
| 841 | TEST_UNSUPPORTED(".word 0xe67000b0") /* Unallocated space */ | 842 | TEST_UNSUPPORTED(__inst_arm(0xe67000b0) "") /* Unallocated space */ |
| 842 | TEST_UNSUPPORTED(".word 0xe67fffbf") /* Unallocated space */ | 843 | TEST_UNSUPPORTED(__inst_arm(0xe67fffbf) "") /* Unallocated space */ |
| 843 | TEST_UNSUPPORTED(".word 0xe67000d0") /* Unallocated space */ | 844 | TEST_UNSUPPORTED(__inst_arm(0xe67000d0) "") /* Unallocated space */ |
| 844 | TEST_UNSUPPORTED(".word 0xe67fffdf") /* Unallocated space */ | 845 | TEST_UNSUPPORTED(__inst_arm(0xe67fffdf) "") /* Unallocated space */ |
| 845 | TEST_RR( "uhsub8 r0, r",0, HH1,", r",1, HH2,"") | 846 | TEST_RR( "uhsub8 r0, r",0, HH1,", r",1, HH2,"") |
| 846 | TEST_RR( "uhsub8 r14, r",12,HH2,", r",10,HH1,"") | 847 | TEST_RR( "uhsub8 r14, r",12,HH2,", r",10,HH1,"") |
| 847 | TEST_UNSUPPORTED(".word 0xe67cfffa @ uhsub8 pc, r12, r10") | 848 | TEST_UNSUPPORTED(__inst_arm(0xe67cfffa) " @ uhsub8 pc, r12, r10") |
| 848 | TEST_UNSUPPORTED(".word 0xe67feffa @ uhsub8 r14, pc, r10") | 849 | TEST_UNSUPPORTED(__inst_arm(0xe67feffa) " @ uhsub8 r14, pc, r10") |
| 849 | TEST_UNSUPPORTED(".word 0xe67cefff @ uhsub8 r14, r12, pc") | 850 | TEST_UNSUPPORTED(__inst_arm(0xe67cefff) " @ uhsub8 r14, r12, pc") |
| 850 | #endif /* __LINUX_ARM_ARCH__ >= 7 */ | 851 | #endif /* __LINUX_ARM_ARCH__ >= 7 */ |
| 851 | 852 | ||
| 852 | #if __LINUX_ARM_ARCH__ >= 6 | 853 | #if __LINUX_ARM_ARCH__ >= 6 |
| @@ -854,99 +855,99 @@ void kprobe_arm_test_cases(void) | |||
| 854 | 855 | ||
| 855 | TEST_RR( "pkhbt r0, r",0, HH1,", r",1, HH2,"") | 856 | TEST_RR( "pkhbt r0, r",0, HH1,", r",1, HH2,"") |
| 856 | TEST_RR( "pkhbt r14,r",12, HH1,", r",10,HH2,", lsl #2") | 857 | TEST_RR( "pkhbt r14,r",12, HH1,", r",10,HH2,", lsl #2") |
| 857 | TEST_UNSUPPORTED(".word 0xe68cf11a @ pkhbt pc, r12, r10, lsl #2") | 858 | TEST_UNSUPPORTED(__inst_arm(0xe68cf11a) " @ pkhbt pc, r12, r10, lsl #2") |
| 858 | TEST_RR( "pkhtb r0, r",0, HH1,", r",1, HH2,"") | 859 | TEST_RR( "pkhtb r0, r",0, HH1,", r",1, HH2,"") |
| 859 | TEST_RR( "pkhtb r14,r",12, HH1,", r",10,HH2,", asr #2") | 860 | TEST_RR( "pkhtb r14,r",12, HH1,", r",10,HH2,", asr #2") |
| 860 | TEST_UNSUPPORTED(".word 0xe68cf15a @ pkhtb pc, r12, r10, asr #2") | 861 | TEST_UNSUPPORTED(__inst_arm(0xe68cf15a) " @ pkhtb pc, r12, r10, asr #2") |
| 861 | TEST_UNSUPPORTED(".word 0xe68fe15a @ pkhtb r14, pc, r10, asr #2") | 862 | TEST_UNSUPPORTED(__inst_arm(0xe68fe15a) " @ pkhtb r14, pc, r10, asr #2") |
| 862 | TEST_UNSUPPORTED(".word 0xe68ce15f @ pkhtb r14, r12, pc, asr #2") | 863 | TEST_UNSUPPORTED(__inst_arm(0xe68ce15f) " @ pkhtb r14, r12, pc, asr #2") |
| 863 | TEST_UNSUPPORTED(".word 0xe6900010") /* Unallocated space */ | 864 | TEST_UNSUPPORTED(__inst_arm(0xe6900010) "") /* Unallocated space */ |
| 864 | TEST_UNSUPPORTED(".word 0xe69fffdf") /* Unallocated space */ | 865 | TEST_UNSUPPORTED(__inst_arm(0xe69fffdf) "") /* Unallocated space */ |
| 865 | 866 | ||
| 866 | TEST_R( "ssat r0, #24, r",0, VAL1,"") | 867 | TEST_R( "ssat r0, #24, r",0, VAL1,"") |
| 867 | TEST_R( "ssat r14, #24, r",12, VAL2,"") | 868 | TEST_R( "ssat r14, #24, r",12, VAL2,"") |
| 868 | TEST_R( "ssat r0, #24, r",0, VAL1,", lsl #8") | 869 | TEST_R( "ssat r0, #24, r",0, VAL1,", lsl #8") |
| 869 | TEST_R( "ssat r14, #24, r",12, VAL2,", asr #8") | 870 | TEST_R( "ssat r14, #24, r",12, VAL2,", asr #8") |
| 870 | TEST_UNSUPPORTED(".word 0xe6b7f01c @ ssat pc, #24, r12") | 871 | TEST_UNSUPPORTED(__inst_arm(0xe6b7f01c) " @ ssat pc, #24, r12") |
| 871 | 872 | ||
| 872 | TEST_R( "usat r0, #24, r",0, VAL1,"") | 873 | TEST_R( "usat r0, #24, r",0, VAL1,"") |
| 873 | TEST_R( "usat r14, #24, r",12, VAL2,"") | 874 | TEST_R( "usat r14, #24, r",12, VAL2,"") |
| 874 | TEST_R( "usat r0, #24, r",0, VAL1,", lsl #8") | 875 | TEST_R( "usat r0, #24, r",0, VAL1,", lsl #8") |
| 875 | TEST_R( "usat r14, #24, r",12, VAL2,", asr #8") | 876 | TEST_R( "usat r14, #24, r",12, VAL2,", asr #8") |
| 876 | TEST_UNSUPPORTED(".word 0xe6f7f01c @ usat pc, #24, r12") | 877 | TEST_UNSUPPORTED(__inst_arm(0xe6f7f01c) " @ usat pc, #24, r12") |
| 877 | 878 | ||
| 878 | TEST_RR( "sxtab16 r0, r",0, HH1,", r",1, HH2,"") | 879 | TEST_RR( "sxtab16 r0, r",0, HH1,", r",1, HH2,"") |
| 879 | TEST_RR( "sxtab16 r14,r",12, HH2,", r",10,HH1,", ror #8") | 880 | TEST_RR( "sxtab16 r14,r",12, HH2,", r",10,HH1,", ror #8") |
| 880 | TEST_R( "sxtb16 r8, r",7, HH1,"") | 881 | TEST_R( "sxtb16 r8, r",7, HH1,"") |
| 881 | TEST_UNSUPPORTED(".word 0xe68cf47a @ sxtab16 pc,r12, r10, ror #8") | 882 | TEST_UNSUPPORTED(__inst_arm(0xe68cf47a) " @ sxtab16 pc,r12, r10, ror #8") |
| 882 | 883 | ||
| 883 | TEST_RR( "sel r0, r",0, VAL1,", r",1, VAL2,"") | 884 | TEST_RR( "sel r0, r",0, VAL1,", r",1, VAL2,"") |
| 884 | TEST_RR( "sel r14, r",12,VAL1,", r",10, VAL2,"") | 885 | TEST_RR( "sel r14, r",12,VAL1,", r",10, VAL2,"") |
| 885 | TEST_UNSUPPORTED(".word 0xe68cffba @ sel pc, r12, r10") | 886 | TEST_UNSUPPORTED(__inst_arm(0xe68cffba) " @ sel pc, r12, r10") |
| 886 | TEST_UNSUPPORTED(".word 0xe68fefba @ sel r14, pc, r10") | 887 | TEST_UNSUPPORTED(__inst_arm(0xe68fefba) " @ sel r14, pc, r10") |
| 887 | TEST_UNSUPPORTED(".word 0xe68cefbf @ sel r14, r12, pc") | 888 | TEST_UNSUPPORTED(__inst_arm(0xe68cefbf) " @ sel r14, r12, pc") |
| 888 | 889 | ||
| 889 | TEST_R( "ssat16 r0, #12, r",0, HH1,"") | 890 | TEST_R( "ssat16 r0, #12, r",0, HH1,"") |
| 890 | TEST_R( "ssat16 r14, #12, r",12, HH2,"") | 891 | TEST_R( "ssat16 r14, #12, r",12, HH2,"") |
| 891 | TEST_UNSUPPORTED(".word 0xe6abff3c @ ssat16 pc, #12, r12") | 892 | TEST_UNSUPPORTED(__inst_arm(0xe6abff3c) " @ ssat16 pc, #12, r12") |
| 892 | 893 | ||
| 893 | TEST_RR( "sxtab r0, r",0, HH1,", r",1, HH2,"") | 894 | TEST_RR( "sxtab r0, r",0, HH1,", r",1, HH2,"") |
| 894 | TEST_RR( "sxtab r14,r",12, HH2,", r",10,HH1,", ror #8") | 895 | TEST_RR( "sxtab r14,r",12, HH2,", r",10,HH1,", ror #8") |
| 895 | TEST_R( "sxtb r8, r",7, HH1,"") | 896 | TEST_R( "sxtb r8, r",7, HH1,"") |
| 896 | TEST_UNSUPPORTED(".word 0xe6acf47a @ sxtab pc,r12, r10, ror #8") | 897 | TEST_UNSUPPORTED(__inst_arm(0xe6acf47a) " @ sxtab pc,r12, r10, ror #8") |
| 897 | 898 | ||
| 898 | TEST_R( "rev r0, r",0, VAL1,"") | 899 | TEST_R( "rev r0, r",0, VAL1,"") |
| 899 | TEST_R( "rev r14, r",12, VAL2,"") | 900 | TEST_R( "rev r14, r",12, VAL2,"") |
| 900 | TEST_UNSUPPORTED(".word 0xe6bfff3c @ rev pc, r12") | 901 | TEST_UNSUPPORTED(__inst_arm(0xe6bfff3c) " @ rev pc, r12") |
| 901 | 902 | ||
| 902 | TEST_RR( "sxtah r0, r",0, HH1,", r",1, HH2,"") | 903 | TEST_RR( "sxtah r0, r",0, HH1,", r",1, HH2,"") |
| 903 | TEST_RR( "sxtah r14,r",12, HH2,", r",10,HH1,", ror #8") | 904 | TEST_RR( "sxtah r14,r",12, HH2,", r",10,HH1,", ror #8") |
| 904 | TEST_R( "sxth r8, r",7, HH1,"") | 905 | TEST_R( "sxth r8, r",7, HH1,"") |
| 905 | TEST_UNSUPPORTED(".word 0xe6bcf47a @ sxtah pc,r12, r10, ror #8") | 906 | TEST_UNSUPPORTED(__inst_arm(0xe6bcf47a) " @ sxtah pc,r12, r10, ror #8") |
| 906 | 907 | ||
| 907 | TEST_R( "rev16 r0, r",0, VAL1,"") | 908 | TEST_R( "rev16 r0, r",0, VAL1,"") |
| 908 | TEST_R( "rev16 r14, r",12, VAL2,"") | 909 | TEST_R( "rev16 r14, r",12, VAL2,"") |
| 909 | TEST_UNSUPPORTED(".word 0xe6bfffbc @ rev16 pc, r12") | 910 | TEST_UNSUPPORTED(__inst_arm(0xe6bfffbc) " @ rev16 pc, r12") |
| 910 | 911 | ||
| 911 | TEST_RR( "uxtab16 r0, r",0, HH1,", r",1, HH2,"") | 912 | TEST_RR( "uxtab16 r0, r",0, HH1,", r",1, HH2,"") |
| 912 | TEST_RR( "uxtab16 r14,r",12, HH2,", r",10,HH1,", ror #8") | 913 | TEST_RR( "uxtab16 r14,r",12, HH2,", r",10,HH1,", ror #8") |
| 913 | TEST_R( "uxtb16 r8, r",7, HH1,"") | 914 | TEST_R( "uxtb16 r8, r",7, HH1,"") |
| 914 | TEST_UNSUPPORTED(".word 0xe6ccf47a @ uxtab16 pc,r12, r10, ror #8") | 915 | TEST_UNSUPPORTED(__inst_arm(0xe6ccf47a) " @ uxtab16 pc,r12, r10, ror #8") |
| 915 | 916 | ||
| 916 | TEST_R( "usat16 r0, #12, r",0, HH1,"") | 917 | TEST_R( "usat16 r0, #12, r",0, HH1,"") |
| 917 | TEST_R( "usat16 r14, #12, r",12, HH2,"") | 918 | TEST_R( "usat16 r14, #12, r",12, HH2,"") |
| 918 | TEST_UNSUPPORTED(".word 0xe6ecff3c @ usat16 pc, #12, r12") | 919 | TEST_UNSUPPORTED(__inst_arm(0xe6ecff3c) " @ usat16 pc, #12, r12") |
| 919 | TEST_UNSUPPORTED(".word 0xe6ecef3f @ usat16 r14, #12, pc") | 920 | TEST_UNSUPPORTED(__inst_arm(0xe6ecef3f) " @ usat16 r14, #12, pc") |
| 920 | 921 | ||
| 921 | TEST_RR( "uxtab r0, r",0, HH1,", r",1, HH2,"") | 922 | TEST_RR( "uxtab r0, r",0, HH1,", r",1, HH2,"") |
| 922 | TEST_RR( "uxtab r14,r",12, HH2,", r",10,HH1,", ror #8") | 923 | TEST_RR( "uxtab r14,r",12, HH2,", r",10,HH1,", ror #8") |
| 923 | TEST_R( "uxtb r8, r",7, HH1,"") | 924 | TEST_R( "uxtb r8, r",7, HH1,"") |
| 924 | TEST_UNSUPPORTED(".word 0xe6ecf47a @ uxtab pc,r12, r10, ror #8") | 925 | TEST_UNSUPPORTED(__inst_arm(0xe6ecf47a) " @ uxtab pc,r12, r10, ror #8") |
| 925 | 926 | ||
| 926 | #if __LINUX_ARM_ARCH__ >= 7 | 927 | #if __LINUX_ARM_ARCH__ >= 7 |
| 927 | TEST_R( "rbit r0, r",0, VAL1,"") | 928 | TEST_R( "rbit r0, r",0, VAL1,"") |
| 928 | TEST_R( "rbit r14, r",12, VAL2,"") | 929 | TEST_R( "rbit r14, r",12, VAL2,"") |
| 929 | TEST_UNSUPPORTED(".word 0xe6ffff3c @ rbit pc, r12") | 930 | TEST_UNSUPPORTED(__inst_arm(0xe6ffff3c) " @ rbit pc, r12") |
| 930 | #endif | 931 | #endif |
| 931 | 932 | ||
| 932 | TEST_RR( "uxtah r0, r",0, HH1,", r",1, HH2,"") | 933 | TEST_RR( "uxtah r0, r",0, HH1,", r",1, HH2,"") |
| 933 | TEST_RR( "uxtah r14,r",12, HH2,", r",10,HH1,", ror #8") | 934 | TEST_RR( "uxtah r14,r",12, HH2,", r",10,HH1,", ror #8") |
| 934 | TEST_R( "uxth r8, r",7, HH1,"") | 935 | TEST_R( "uxth r8, r",7, HH1,"") |
| 935 | TEST_UNSUPPORTED(".word 0xe6fff077 @ uxth pc, r7") | 936 | TEST_UNSUPPORTED(__inst_arm(0xe6fff077) " @ uxth pc, r7") |
| 936 | TEST_UNSUPPORTED(".word 0xe6ff807f @ uxth r8, pc") | 937 | TEST_UNSUPPORTED(__inst_arm(0xe6ff807f) " @ uxth r8, pc") |
| 937 | TEST_UNSUPPORTED(".word 0xe6fcf47a @ uxtah pc, r12, r10, ror #8") | 938 | TEST_UNSUPPORTED(__inst_arm(0xe6fcf47a) " @ uxtah pc, r12, r10, ror #8") |
| 938 | TEST_UNSUPPORTED(".word 0xe6fce47f @ uxtah r14, r12, pc, ror #8") | 939 | TEST_UNSUPPORTED(__inst_arm(0xe6fce47f) " @ uxtah r14, r12, pc, ror #8") |
| 939 | 940 | ||
| 940 | TEST_R( "revsh r0, r",0, VAL1,"") | 941 | TEST_R( "revsh r0, r",0, VAL1,"") |
| 941 | TEST_R( "revsh r14, r",12, VAL2,"") | 942 | TEST_R( "revsh r14, r",12, VAL2,"") |
| 942 | TEST_UNSUPPORTED(".word 0xe6ffff3c @ revsh pc, r12") | 943 | TEST_UNSUPPORTED(__inst_arm(0xe6ffff3c) " @ revsh pc, r12") |
| 943 | TEST_UNSUPPORTED(".word 0xe6ffef3f @ revsh r14, pc") | 944 | TEST_UNSUPPORTED(__inst_arm(0xe6ffef3f) " @ revsh r14, pc") |
| 944 | 945 | ||
| 945 | TEST_UNSUPPORTED(".word 0xe6900070") /* Unallocated space */ | 946 | TEST_UNSUPPORTED(__inst_arm(0xe6900070) "") /* Unallocated space */ |
| 946 | TEST_UNSUPPORTED(".word 0xe69fff7f") /* Unallocated space */ | 947 | TEST_UNSUPPORTED(__inst_arm(0xe69fff7f) "") /* Unallocated space */ |
| 947 | 948 | ||
| 948 | TEST_UNSUPPORTED(".word 0xe6d00070") /* Unallocated space */ | 949 | TEST_UNSUPPORTED(__inst_arm(0xe6d00070) "") /* Unallocated space */ |
| 949 | TEST_UNSUPPORTED(".word 0xe6dfff7f") /* Unallocated space */ | 950 | TEST_UNSUPPORTED(__inst_arm(0xe6dfff7f) "") /* Unallocated space */ |
| 950 | #endif /* __LINUX_ARM_ARCH__ >= 6 */ | 951 | #endif /* __LINUX_ARM_ARCH__ >= 6 */ |
| 951 | 952 | ||
| 952 | #if __LINUX_ARM_ARCH__ >= 6 | 953 | #if __LINUX_ARM_ARCH__ >= 6 |
| @@ -954,79 +955,79 @@ void kprobe_arm_test_cases(void) | |||
| 954 | 955 | ||
| 955 | TEST_RRR( "smlad r0, r",0, HH1,", r",1, HH2,", r",2, VAL1,"") | 956 | TEST_RRR( "smlad r0, r",0, HH1,", r",1, HH2,", r",2, VAL1,"") |
| 956 | TEST_RRR( "smlad r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"") | 957 | TEST_RRR( "smlad r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"") |
| 957 | TEST_UNSUPPORTED(".word 0xe70f8a1c @ smlad pc, r12, r10, r8") | 958 | TEST_UNSUPPORTED(__inst_arm(0xe70f8a1c) " @ smlad pc, r12, r10, r8") |
| 958 | TEST_RRR( "smladx r0, r",0, HH1,", r",1, HH2,", r",2, VAL1,"") | 959 | TEST_RRR( "smladx r0, r",0, HH1,", r",1, HH2,", r",2, VAL1,"") |
| 959 | TEST_RRR( "smladx r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"") | 960 | TEST_RRR( "smladx r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"") |
| 960 | TEST_UNSUPPORTED(".word 0xe70f8a3c @ smladx pc, r12, r10, r8") | 961 | TEST_UNSUPPORTED(__inst_arm(0xe70f8a3c) " @ smladx pc, r12, r10, r8") |
| 961 | 962 | ||
| 962 | TEST_RR( "smuad r0, r",0, HH1,", r",1, HH2,"") | 963 | TEST_RR( "smuad r0, r",0, HH1,", r",1, HH2,"") |
| 963 | TEST_RR( "smuad r14, r",12,HH2,", r",10,HH1,"") | 964 | TEST_RR( "smuad r14, r",12,HH2,", r",10,HH1,"") |
| 964 | TEST_UNSUPPORTED(".word 0xe70ffa1c @ smuad pc, r12, r10") | 965 | TEST_UNSUPPORTED(__inst_arm(0xe70ffa1c) " @ smuad pc, r12, r10") |
| 965 | TEST_RR( "smuadx r0, r",0, HH1,", r",1, HH2,"") | 966 | TEST_RR( "smuadx r0, r",0, HH1,", r",1, HH2,"") |
| 966 | TEST_RR( "smuadx r14, r",12,HH2,", r",10,HH1,"") | 967 | TEST_RR( "smuadx r14, r",12,HH2,", r",10,HH1,"") |
| 967 | TEST_UNSUPPORTED(".word 0xe70ffa3c @ smuadx pc, r12, r10") | 968 | TEST_UNSUPPORTED(__inst_arm(0xe70ffa3c) " @ smuadx pc, r12, r10") |
| 968 | 969 | ||
| 969 | TEST_RRR( "smlsd r0, r",0, HH1,", r",1, HH2,", r",2, VAL1,"") | 970 | TEST_RRR( "smlsd r0, r",0, HH1,", r",1, HH2,", r",2, VAL1,"") |
| 970 | TEST_RRR( "smlsd r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"") | 971 | TEST_RRR( "smlsd r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"") |
| 971 | TEST_UNSUPPORTED(".word 0xe70f8a5c @ smlsd pc, r12, r10, r8") | 972 | TEST_UNSUPPORTED(__inst_arm(0xe70f8a5c) " @ smlsd pc, r12, r10, r8") |
| 972 | TEST_RRR( "smlsdx r0, r",0, HH1,", r",1, HH2,", r",2, VAL1,"") | 973 | TEST_RRR( "smlsdx r0, r",0, HH1,", r",1, HH2,", r",2, VAL1,"") |
| 973 | TEST_RRR( "smlsdx r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"") | 974 | TEST_RRR( "smlsdx r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"") |
| 974 | TEST_UNSUPPORTED(".word 0xe70f8a7c @ smlsdx pc, r12, r10, r8") | 975 | TEST_UNSUPPORTED(__inst_arm(0xe70f8a7c) " @ smlsdx pc, r12, r10, r8") |
| 975 | 976 | ||
| 976 | TEST_RR( "smusd r0, r",0, HH1,", r",1, HH2,"") | 977 | TEST_RR( "smusd r0, r",0, HH1,", r",1, HH2,"") |
| 977 | TEST_RR( "smusd r14, r",12,HH2,", r",10,HH1,"") | 978 | TEST_RR( "smusd r14, r",12,HH2,", r",10,HH1,"") |
| 978 | TEST_UNSUPPORTED(".word 0xe70ffa5c @ smusd pc, r12, r10") | 979 | TEST_UNSUPPORTED(__inst_arm(0xe70ffa5c) " @ smusd pc, r12, r10") |
| 979 | TEST_RR( "smusdx r0, r",0, HH1,", r",1, HH2,"") | 980 | TEST_RR( "smusdx r0, r",0, HH1,", r",1, HH2,"") |
| 980 | TEST_RR( "smusdx r14, r",12,HH2,", r",10,HH1,"") | 981 | TEST_RR( "smusdx r14, r",12,HH2,", r",10,HH1,"") |
| 981 | TEST_UNSUPPORTED(".word 0xe70ffa7c @ smusdx pc, r12, r10") | 982 | TEST_UNSUPPORTED(__inst_arm(0xe70ffa7c) " @ smusdx pc, r12, r10") |
| 982 | 983 | ||
| 983 | TEST_RRRR( "smlald r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2) | 984 | TEST_RRRR( "smlald r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2) |
| 984 | TEST_RRRR( "smlald r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1) | 985 | TEST_RRRR( "smlald r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1) |
| 985 | TEST_UNSUPPORTED(".word 0xe74af819 @ smlald pc, r10, r9, r8") | 986 | TEST_UNSUPPORTED(__inst_arm(0xe74af819) " @ smlald pc, r10, r9, r8") |
| 986 | TEST_UNSUPPORTED(".word 0xe74fb819 @ smlald r11, pc, r9, r8") | 987 | TEST_UNSUPPORTED(__inst_arm(0xe74fb819) " @ smlald r11, pc, r9, r8") |
| 987 | TEST_UNSUPPORTED(".word 0xe74ab81f @ smlald r11, r10, pc, r8") | 988 | TEST_UNSUPPORTED(__inst_arm(0xe74ab81f) " @ smlald r11, r10, pc, r8") |
| 988 | TEST_UNSUPPORTED(".word 0xe74abf19 @ smlald r11, r10, r9, pc") | 989 | TEST_UNSUPPORTED(__inst_arm(0xe74abf19) " @ smlald r11, r10, r9, pc") |
| 989 | 990 | ||
| 990 | TEST_RRRR( "smlaldx r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2) | 991 | TEST_RRRR( "smlaldx r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2) |
| 991 | TEST_RRRR( "smlaldx r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1) | 992 | TEST_RRRR( "smlaldx r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1) |
| 992 | TEST_UNSUPPORTED(".word 0xe74af839 @ smlaldx pc, r10, r9, r8") | 993 | TEST_UNSUPPORTED(__inst_arm(0xe74af839) " @ smlaldx pc, r10, r9, r8") |
| 993 | TEST_UNSUPPORTED(".word 0xe74fb839 @ smlaldx r11, pc, r9, r8") | 994 | TEST_UNSUPPORTED(__inst_arm(0xe74fb839) " @ smlaldx r11, pc, r9, r8") |
| 994 | 995 | ||
| 995 | TEST_RRR( "smmla r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL1,"") | 996 | TEST_RRR( "smmla r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL1,"") |
| 996 | TEST_RRR( "smmla r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"") | 997 | TEST_RRR( "smmla r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"") |
| 997 | TEST_UNSUPPORTED(".word 0xe75f8a1c @ smmla pc, r12, r10, r8") | 998 | TEST_UNSUPPORTED(__inst_arm(0xe75f8a1c) " @ smmla pc, r12, r10, r8") |
| 998 | TEST_RRR( "smmlar r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL1,"") | 999 | TEST_RRR( "smmlar r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL1,"") |
| 999 | TEST_RRR( "smmlar r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"") | 1000 | TEST_RRR( "smmlar r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"") |
| 1000 | TEST_UNSUPPORTED(".word 0xe75f8a3c @ smmlar pc, r12, r10, r8") | 1001 | TEST_UNSUPPORTED(__inst_arm(0xe75f8a3c) " @ smmlar pc, r12, r10, r8") |
| 1001 | 1002 | ||
| 1002 | TEST_RR( "smmul r0, r",0, VAL1,", r",1, VAL2,"") | 1003 | TEST_RR( "smmul r0, r",0, VAL1,", r",1, VAL2,"") |
| 1003 | TEST_RR( "smmul r14, r",12,VAL2,", r",10,VAL1,"") | 1004 | TEST_RR( "smmul r14, r",12,VAL2,", r",10,VAL1,"") |
| 1004 | TEST_UNSUPPORTED(".word 0xe75ffa1c @ smmul pc, r12, r10") | 1005 | TEST_UNSUPPORTED(__inst_arm(0xe75ffa1c) " @ smmul pc, r12, r10") |
| 1005 | TEST_RR( "smmulr r0, r",0, VAL1,", r",1, VAL2,"") | 1006 | TEST_RR( "smmulr r0, r",0, VAL1,", r",1, VAL2,"") |
| 1006 | TEST_RR( "smmulr r14, r",12,VAL2,", r",10,VAL1,"") | 1007 | TEST_RR( "smmulr r14, r",12,VAL2,", r",10,VAL1,"") |
| 1007 | TEST_UNSUPPORTED(".word 0xe75ffa3c @ smmulr pc, r12, r10") | 1008 | TEST_UNSUPPORTED(__inst_arm(0xe75ffa3c) " @ smmulr pc, r12, r10") |
| 1008 | 1009 | ||
| 1009 | TEST_RRR( "smmls r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL1,"") | 1010 | TEST_RRR( "smmls r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL1,"") |
| 1010 | TEST_RRR( "smmls r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"") | 1011 | TEST_RRR( "smmls r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"") |
| 1011 | TEST_UNSUPPORTED(".word 0xe75f8adc @ smmls pc, r12, r10, r8") | 1012 | TEST_UNSUPPORTED(__inst_arm(0xe75f8adc) " @ smmls pc, r12, r10, r8") |
| 1012 | TEST_RRR( "smmlsr r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL1,"") | 1013 | TEST_RRR( "smmlsr r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL1,"") |
| 1013 | TEST_RRR( "smmlsr r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"") | 1014 | TEST_RRR( "smmlsr r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"") |
| 1014 | TEST_UNSUPPORTED(".word 0xe75f8afc @ smmlsr pc, r12, r10, r8") | 1015 | TEST_UNSUPPORTED(__inst_arm(0xe75f8afc) " @ smmlsr pc, r12, r10, r8") |
| 1015 | TEST_UNSUPPORTED(".word 0xe75e8aff @ smmlsr r14, pc, r10, r8") | 1016 | TEST_UNSUPPORTED(__inst_arm(0xe75e8aff) " @ smmlsr r14, pc, r10, r8") |
| 1016 | TEST_UNSUPPORTED(".word 0xe75e8ffc @ smmlsr r14, r12, pc, r8") | 1017 | TEST_UNSUPPORTED(__inst_arm(0xe75e8ffc) " @ smmlsr r14, r12, pc, r8") |
| 1017 | TEST_UNSUPPORTED(".word 0xe75efafc @ smmlsr r14, r12, r10, pc") | 1018 | TEST_UNSUPPORTED(__inst_arm(0xe75efafc) " @ smmlsr r14, r12, r10, pc") |
| 1018 | 1019 | ||
| 1019 | TEST_RR( "usad8 r0, r",0, VAL1,", r",1, VAL2,"") | 1020 | TEST_RR( "usad8 r0, r",0, VAL1,", r",1, VAL2,"") |
| 1020 | TEST_RR( "usad8 r14, r",12,VAL2,", r",10,VAL1,"") | 1021 | TEST_RR( "usad8 r14, r",12,VAL2,", r",10,VAL1,"") |
| 1021 | TEST_UNSUPPORTED(".word 0xe75ffa1c @ usad8 pc, r12, r10") | 1022 | TEST_UNSUPPORTED(__inst_arm(0xe75ffa1c) " @ usad8 pc, r12, r10") |
| 1022 | TEST_UNSUPPORTED(".word 0xe75efa1f @ usad8 r14, pc, r10") | 1023 | TEST_UNSUPPORTED(__inst_arm(0xe75efa1f) " @ usad8 r14, pc, r10") |
| 1023 | TEST_UNSUPPORTED(".word 0xe75eff1c @ usad8 r14, r12, pc") | 1024 | TEST_UNSUPPORTED(__inst_arm(0xe75eff1c) " @ usad8 r14, r12, pc") |
| 1024 | 1025 | ||
| 1025 | TEST_RRR( "usada8 r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL3,"") | 1026 | TEST_RRR( "usada8 r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL3,"") |
| 1026 | TEST_RRR( "usada8 r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL3,"") | 1027 | TEST_RRR( "usada8 r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL3,"") |
| 1027 | TEST_UNSUPPORTED(".word 0xe78f8a1c @ usada8 pc, r12, r10, r8") | 1028 | TEST_UNSUPPORTED(__inst_arm(0xe78f8a1c) " @ usada8 pc, r12, r10, r8") |
| 1028 | TEST_UNSUPPORTED(".word 0xe78e8a1f @ usada8 r14, pc, r10, r8") | 1029 | TEST_UNSUPPORTED(__inst_arm(0xe78e8a1f) " @ usada8 r14, pc, r10, r8") |
| 1029 | TEST_UNSUPPORTED(".word 0xe78e8f1c @ usada8 r14, r12, pc, r8") | 1030 | TEST_UNSUPPORTED(__inst_arm(0xe78e8f1c) " @ usada8 r14, r12, pc, r8") |
| 1030 | #endif /* __LINUX_ARM_ARCH__ >= 6 */ | 1031 | #endif /* __LINUX_ARM_ARCH__ >= 6 */ |
| 1031 | 1032 | ||
| 1032 | #if __LINUX_ARM_ARCH__ >= 7 | 1033 | #if __LINUX_ARM_ARCH__ >= 7 |
| @@ -1035,26 +1036,26 @@ void kprobe_arm_test_cases(void) | |||
| 1035 | TEST_R( "sbfx r0, r",0 , VAL1,", #0, #31") | 1036 | TEST_R( "sbfx r0, r",0 , VAL1,", #0, #31") |
| 1036 | TEST_R( "sbfxeq r14, r",12, VAL2,", #8, #16") | 1037 | TEST_R( "sbfxeq r14, r",12, VAL2,", #8, #16") |
| 1037 | TEST_R( "sbfx r4, r",10, VAL1,", #16, #15") | 1038 | TEST_R( "sbfx r4, r",10, VAL1,", #16, #15") |
| 1038 | TEST_UNSUPPORTED(".word 0xe7aff45c @ sbfx pc, r12, #8, #16") | 1039 | TEST_UNSUPPORTED(__inst_arm(0xe7aff45c) " @ sbfx pc, r12, #8, #16") |
| 1039 | 1040 | ||
| 1040 | TEST_R( "ubfx r0, r",0 , VAL1,", #0, #31") | 1041 | TEST_R( "ubfx r0, r",0 , VAL1,", #0, #31") |
| 1041 | TEST_R( "ubfxcs r14, r",12, VAL2,", #8, #16") | 1042 | TEST_R( "ubfxcs r14, r",12, VAL2,", #8, #16") |
| 1042 | TEST_R( "ubfx r4, r",10, VAL1,", #16, #15") | 1043 | TEST_R( "ubfx r4, r",10, VAL1,", #16, #15") |
| 1043 | TEST_UNSUPPORTED(".word 0xe7eff45c @ ubfx pc, r12, #8, #16") | 1044 | TEST_UNSUPPORTED(__inst_arm(0xe7eff45c) " @ ubfx pc, r12, #8, #16") |
| 1044 | TEST_UNSUPPORTED(".word 0xe7efc45f @ ubfx r12, pc, #8, #16") | 1045 | TEST_UNSUPPORTED(__inst_arm(0xe7efc45f) " @ ubfx r12, pc, #8, #16") |
| 1045 | 1046 | ||
| 1046 | TEST_R( "bfc r",0, VAL1,", #4, #20") | 1047 | TEST_R( "bfc r",0, VAL1,", #4, #20") |
| 1047 | TEST_R( "bfcvs r",14,VAL2,", #4, #20") | 1048 | TEST_R( "bfcvs r",14,VAL2,", #4, #20") |
| 1048 | TEST_R( "bfc r",7, VAL1,", #0, #31") | 1049 | TEST_R( "bfc r",7, VAL1,", #0, #31") |
| 1049 | TEST_R( "bfc r",8, VAL2,", #0, #31") | 1050 | TEST_R( "bfc r",8, VAL2,", #0, #31") |
| 1050 | TEST_UNSUPPORTED(".word 0xe7def01f @ bfc pc, #0, #31"); | 1051 | TEST_UNSUPPORTED(__inst_arm(0xe7def01f) " @ bfc pc, #0, #31"); |
| 1051 | 1052 | ||
| 1052 | TEST_RR( "bfi r",0, VAL1,", r",0 , VAL2,", #0, #31") | 1053 | TEST_RR( "bfi r",0, VAL1,", r",0 , VAL2,", #0, #31") |
| 1053 | TEST_RR( "bfipl r",12,VAL1,", r",14 , VAL2,", #4, #20") | 1054 | TEST_RR( "bfipl r",12,VAL1,", r",14 , VAL2,", #4, #20") |
| 1054 | TEST_UNSUPPORTED(".word 0xe7d7f21e @ bfi pc, r14, #4, #20") | 1055 | TEST_UNSUPPORTED(__inst_arm(0xe7d7f21e) " @ bfi pc, r14, #4, #20") |
| 1055 | 1056 | ||
| 1056 | TEST_UNSUPPORTED(".word 0x07f000f0") /* Permanently UNDEFINED */ | 1057 | TEST_UNSUPPORTED(__inst_arm(0x07f000f0) "") /* Permanently UNDEFINED */ |
| 1057 | TEST_UNSUPPORTED(".word 0x07ffffff") /* Permanently UNDEFINED */ | 1058 | TEST_UNSUPPORTED(__inst_arm(0x07ffffff) "") /* Permanently UNDEFINED */ |
| 1058 | #endif /* __LINUX_ARM_ARCH__ >= 6 */ | 1059 | #endif /* __LINUX_ARM_ARCH__ >= 6 */ |
| 1059 | 1060 | ||
| 1060 | TEST_GROUP("Branch, branch with link, and block data transfer") | 1061 | TEST_GROUP("Branch, branch with link, and block data transfer") |
| @@ -1181,43 +1182,43 @@ void kprobe_arm_test_cases(void) | |||
| 1181 | \ | 1182 | \ |
| 1182 | TEST_COPROCESSOR( "stc"two" 0, cr0, [r15, #4]") \ | 1183 | TEST_COPROCESSOR( "stc"two" 0, cr0, [r15, #4]") \ |
| 1183 | TEST_COPROCESSOR( "stc"two" 0, cr0, [r15, #-4]") \ | 1184 | TEST_COPROCESSOR( "stc"two" 0, cr0, [r15, #-4]") \ |
| 1184 | TEST_UNSUPPORTED(".word 0x"cc"daf0001 @ stc"two" 0, cr0, [r15, #4]!") \ | 1185 | TEST_UNSUPPORTED(__inst_arm(0x##cc##daf0001) " @ stc"two" 0, cr0, [r15, #4]!") \ |
| 1185 | TEST_UNSUPPORTED(".word 0x"cc"d2f0001 @ stc"two" 0, cr0, [r15, #-4]!") \ | 1186 | TEST_UNSUPPORTED(__inst_arm(0x##cc##d2f0001) " @ stc"two" 0, cr0, [r15, #-4]!") \ |
| 1186 | TEST_UNSUPPORTED(".word 0x"cc"caf0001 @ stc"two" 0, cr0, [r15], #4") \ | 1187 | TEST_UNSUPPORTED(__inst_arm(0x##cc##caf0001) " @ stc"two" 0, cr0, [r15], #4") \ |
| 1187 | TEST_UNSUPPORTED(".word 0x"cc"c2f0001 @ stc"two" 0, cr0, [r15], #-4") \ | 1188 | TEST_UNSUPPORTED(__inst_arm(0x##cc##c2f0001) " @ stc"two" 0, cr0, [r15], #-4") \ |
| 1188 | TEST_COPROCESSOR( "stc"two" 0, cr0, [r15], {1}") \ | 1189 | TEST_COPROCESSOR( "stc"two" 0, cr0, [r15], {1}") \ |
| 1189 | TEST_COPROCESSOR( "stc"two"l 0, cr0, [r15, #4]") \ | 1190 | TEST_COPROCESSOR( "stc"two"l 0, cr0, [r15, #4]") \ |
| 1190 | TEST_COPROCESSOR( "stc"two"l 0, cr0, [r15, #-4]") \ | 1191 | TEST_COPROCESSOR( "stc"two"l 0, cr0, [r15, #-4]") \ |
| 1191 | TEST_UNSUPPORTED(".word 0x"cc"def0001 @ stc"two"l 0, cr0, [r15, #4]!") \ | 1192 | TEST_UNSUPPORTED(__inst_arm(0x##cc##def0001) " @ stc"two"l 0, cr0, [r15, #4]!") \ |
| 1192 | TEST_UNSUPPORTED(".word 0x"cc"d6f0001 @ stc"two"l 0, cr0, [r15, #-4]!") \ | 1193 | TEST_UNSUPPORTED(__inst_arm(0x##cc##d6f0001) " @ stc"two"l 0, cr0, [r15, #-4]!") \ |
| 1193 | TEST_UNSUPPORTED(".word 0x"cc"cef0001 @ stc"two"l 0, cr0, [r15], #4") \ | 1194 | TEST_UNSUPPORTED(__inst_arm(0x##cc##cef0001) " @ stc"two"l 0, cr0, [r15], #4") \ |
| 1194 | TEST_UNSUPPORTED(".word 0x"cc"c6f0001 @ stc"two"l 0, cr0, [r15], #-4") \ | 1195 | TEST_UNSUPPORTED(__inst_arm(0x##cc##c6f0001) " @ stc"two"l 0, cr0, [r15], #-4") \ |
| 1195 | TEST_COPROCESSOR( "stc"two"l 0, cr0, [r15], {1}") \ | 1196 | TEST_COPROCESSOR( "stc"two"l 0, cr0, [r15], {1}") \ |
| 1196 | TEST_COPROCESSOR( "ldc"two" 0, cr0, [r15, #4]") \ | 1197 | TEST_COPROCESSOR( "ldc"two" 0, cr0, [r15, #4]") \ |
| 1197 | TEST_COPROCESSOR( "ldc"two" 0, cr0, [r15, #-4]") \ | 1198 | TEST_COPROCESSOR( "ldc"two" 0, cr0, [r15, #-4]") \ |
| 1198 | TEST_UNSUPPORTED(".word 0x"cc"dbf0001 @ ldc"two" 0, cr0, [r15, #4]!") \ | 1199 | TEST_UNSUPPORTED(__inst_arm(0x##cc##dbf0001) " @ ldc"two" 0, cr0, [r15, #4]!") \ |
| 1199 | TEST_UNSUPPORTED(".word 0x"cc"d3f0001 @ ldc"two" 0, cr0, [r15, #-4]!") \ | 1200 | TEST_UNSUPPORTED(__inst_arm(0x##cc##d3f0001) " @ ldc"two" 0, cr0, [r15, #-4]!") \ |
| 1200 | TEST_UNSUPPORTED(".word 0x"cc"cbf0001 @ ldc"two" 0, cr0, [r15], #4") \ | 1201 | TEST_UNSUPPORTED(__inst_arm(0x##cc##cbf0001) " @ ldc"two" 0, cr0, [r15], #4") \ |
| 1201 | TEST_UNSUPPORTED(".word 0x"cc"c3f0001 @ ldc"two" 0, cr0, [r15], #-4") \ | 1202 | TEST_UNSUPPORTED(__inst_arm(0x##cc##c3f0001) " @ ldc"two" 0, cr0, [r15], #-4") \ |
| 1202 | TEST_COPROCESSOR( "ldc"two" 0, cr0, [r15], {1}") \ | 1203 | TEST_COPROCESSOR( "ldc"two" 0, cr0, [r15], {1}") \ |
| 1203 | TEST_COPROCESSOR( "ldc"two"l 0, cr0, [r15, #4]") \ | 1204 | TEST_COPROCESSOR( "ldc"two"l 0, cr0, [r15, #4]") \ |
| 1204 | TEST_COPROCESSOR( "ldc"two"l 0, cr0, [r15, #-4]") \ | 1205 | TEST_COPROCESSOR( "ldc"two"l 0, cr0, [r15, #-4]") \ |
| 1205 | TEST_UNSUPPORTED(".word 0x"cc"dff0001 @ ldc"two"l 0, cr0, [r15, #4]!") \ | 1206 | TEST_UNSUPPORTED(__inst_arm(0x##cc##dff0001) " @ ldc"two"l 0, cr0, [r15, #4]!") \ |
| 1206 | TEST_UNSUPPORTED(".word 0x"cc"d7f0001 @ ldc"two"l 0, cr0, [r15, #-4]!") \ | 1207 | TEST_UNSUPPORTED(__inst_arm(0x##cc##d7f0001) " @ ldc"two"l 0, cr0, [r15, #-4]!") \ |
| 1207 | TEST_UNSUPPORTED(".word 0x"cc"cff0001 @ ldc"two"l 0, cr0, [r15], #4") \ | 1208 | TEST_UNSUPPORTED(__inst_arm(0x##cc##cff0001) " @ ldc"two"l 0, cr0, [r15], #4") \ |
| 1208 | TEST_UNSUPPORTED(".word 0x"cc"c7f0001 @ ldc"two"l 0, cr0, [r15], #-4") \ | 1209 | TEST_UNSUPPORTED(__inst_arm(0x##cc##c7f0001) " @ ldc"two"l 0, cr0, [r15], #-4") \ |
| 1209 | TEST_COPROCESSOR( "ldc"two"l 0, cr0, [r15], {1}") | 1210 | TEST_COPROCESSOR( "ldc"two"l 0, cr0, [r15], {1}") |
| 1210 | 1211 | ||
| 1211 | #define COPROCESSOR_INSTRUCTIONS_MC_MR(two,cc) \ | 1212 | #define COPROCESSOR_INSTRUCTIONS_MC_MR(two,cc) \ |
| 1212 | \ | 1213 | \ |
| 1213 | TEST_COPROCESSOR( "mcrr"two" 0, 15, r0, r14, cr0") \ | 1214 | TEST_COPROCESSOR( "mcrr"two" 0, 15, r0, r14, cr0") \ |
| 1214 | TEST_COPROCESSOR( "mcrr"two" 15, 0, r14, r0, cr15") \ | 1215 | TEST_COPROCESSOR( "mcrr"two" 15, 0, r14, r0, cr15") \ |
| 1215 | TEST_UNSUPPORTED(".word 0x"cc"c4f00f0 @ mcrr"two" 0, 15, r0, r15, cr0") \ | 1216 | TEST_UNSUPPORTED(__inst_arm(0x##cc##c4f00f0) " @ mcrr"two" 0, 15, r0, r15, cr0") \ |
| 1216 | TEST_UNSUPPORTED(".word 0x"cc"c40ff0f @ mcrr"two" 15, 0, r15, r0, cr15") \ | 1217 | TEST_UNSUPPORTED(__inst_arm(0x##cc##c40ff0f) " @ mcrr"two" 15, 0, r15, r0, cr15") \ |
| 1217 | TEST_COPROCESSOR( "mrrc"two" 0, 15, r0, r14, cr0") \ | 1218 | TEST_COPROCESSOR( "mrrc"two" 0, 15, r0, r14, cr0") \ |
| 1218 | TEST_COPROCESSOR( "mrrc"two" 15, 0, r14, r0, cr15") \ | 1219 | TEST_COPROCESSOR( "mrrc"two" 15, 0, r14, r0, cr15") \ |
| 1219 | TEST_UNSUPPORTED(".word 0x"cc"c5f00f0 @ mrrc"two" 0, 15, r0, r15, cr0") \ | 1220 | TEST_UNSUPPORTED(__inst_arm(0x##cc##c5f00f0) " @ mrrc"two" 0, 15, r0, r15, cr0") \ |
| 1220 | TEST_UNSUPPORTED(".word 0x"cc"c50ff0f @ mrrc"two" 15, 0, r15, r0, cr15") \ | 1221 | TEST_UNSUPPORTED(__inst_arm(0x##cc##c50ff0f) " @ mrrc"two" 15, 0, r15, r0, cr15") \ |
| 1221 | TEST_COPROCESSOR( "cdp"two" 15, 15, cr15, cr15, cr15, 7") \ | 1222 | TEST_COPROCESSOR( "cdp"two" 15, 15, cr15, cr15, cr15, 7") \ |
| 1222 | TEST_COPROCESSOR( "cdp"two" 0, 0, cr0, cr0, cr0, 0") \ | 1223 | TEST_COPROCESSOR( "cdp"two" 0, 0, cr0, cr0, cr0, 0") \ |
| 1223 | TEST_COPROCESSOR( "mcr"two" 15, 7, r15, cr15, cr15, 7") \ | 1224 | TEST_COPROCESSOR( "mcr"two" 15, 7, r15, cr15, cr15, 7") \ |
| @@ -1225,8 +1226,8 @@ void kprobe_arm_test_cases(void) | |||
| 1225 | TEST_COPROCESSOR( "mrc"two" 15, 7, r15, cr15, cr15, 7") \ | 1226 | TEST_COPROCESSOR( "mrc"two" 15, 7, r15, cr15, cr15, 7") \ |
| 1226 | TEST_COPROCESSOR( "mrc"two" 0, 0, r0, cr0, cr0, 0") | 1227 | TEST_COPROCESSOR( "mrc"two" 0, 0, r0, cr0, cr0, 0") |
| 1227 | 1228 | ||
| 1228 | COPROCESSOR_INSTRUCTIONS_ST_LD("","e") | 1229 | COPROCESSOR_INSTRUCTIONS_ST_LD("",e) |
| 1229 | COPROCESSOR_INSTRUCTIONS_MC_MR("","e") | 1230 | COPROCESSOR_INSTRUCTIONS_MC_MR("",e) |
| 1230 | TEST_UNSUPPORTED("svc 0") | 1231 | TEST_UNSUPPORTED("svc 0") |
| 1231 | TEST_UNSUPPORTED("svc 0xffffff") | 1232 | TEST_UNSUPPORTED("svc 0xffffff") |
| 1232 | 1233 | ||
| @@ -1252,14 +1253,14 @@ void kprobe_arm_test_cases(void) | |||
| 1252 | TEST_UNSUPPORTED("rfedb sp!") | 1253 | TEST_UNSUPPORTED("rfedb sp!") |
| 1253 | TEST_UNSUPPORTED("rfeia sp!") | 1254 | TEST_UNSUPPORTED("rfeia sp!") |
| 1254 | TEST_UNSUPPORTED("rfeib sp!") | 1255 | TEST_UNSUPPORTED("rfeib sp!") |
| 1255 | TEST_UNSUPPORTED(".word 0xf81d0a00 @ rfeda pc") | 1256 | TEST_UNSUPPORTED(__inst_arm(0xf81d0a00) " @ rfeda pc") |
| 1256 | TEST_UNSUPPORTED(".word 0xf91d0a00 @ rfedb pc") | 1257 | TEST_UNSUPPORTED(__inst_arm(0xf91d0a00) " @ rfedb pc") |
| 1257 | TEST_UNSUPPORTED(".word 0xf89d0a00 @ rfeia pc") | 1258 | TEST_UNSUPPORTED(__inst_arm(0xf89d0a00) " @ rfeia pc") |
| 1258 | TEST_UNSUPPORTED(".word 0xf99d0a00 @ rfeib pc") | 1259 | TEST_UNSUPPORTED(__inst_arm(0xf99d0a00) " @ rfeib pc") |
| 1259 | TEST_UNSUPPORTED(".word 0xf83d0a00 @ rfeda pc!") | 1260 | TEST_UNSUPPORTED(__inst_arm(0xf83d0a00) " @ rfeda pc!") |
| 1260 | TEST_UNSUPPORTED(".word 0xf93d0a00 @ rfedb pc!") | 1261 | TEST_UNSUPPORTED(__inst_arm(0xf93d0a00) " @ rfedb pc!") |
| 1261 | TEST_UNSUPPORTED(".word 0xf8bd0a00 @ rfeia pc!") | 1262 | TEST_UNSUPPORTED(__inst_arm(0xf8bd0a00) " @ rfeia pc!") |
| 1262 | TEST_UNSUPPORTED(".word 0xf9bd0a00 @ rfeib pc!") | 1263 | TEST_UNSUPPORTED(__inst_arm(0xf9bd0a00) " @ rfeib pc!") |
| 1263 | #endif /* __LINUX_ARM_ARCH__ >= 6 */ | 1264 | #endif /* __LINUX_ARM_ARCH__ >= 6 */ |
| 1264 | 1265 | ||
| 1265 | #if __LINUX_ARM_ARCH__ >= 6 | 1266 | #if __LINUX_ARM_ARCH__ >= 6 |
| @@ -1286,9 +1287,9 @@ void kprobe_arm_test_cases(void) | |||
| 1286 | TEST( "blx __dummy_thumb_subroutine_odd") | 1287 | TEST( "blx __dummy_thumb_subroutine_odd") |
| 1287 | #endif /* __LINUX_ARM_ARCH__ >= 6 */ | 1288 | #endif /* __LINUX_ARM_ARCH__ >= 6 */ |
| 1288 | 1289 | ||
| 1289 | COPROCESSOR_INSTRUCTIONS_ST_LD("2","f") | 1290 | COPROCESSOR_INSTRUCTIONS_ST_LD("2",f) |
| 1290 | #if __LINUX_ARM_ARCH__ >= 6 | 1291 | #if __LINUX_ARM_ARCH__ >= 6 |
| 1291 | COPROCESSOR_INSTRUCTIONS_MC_MR("2","f") | 1292 | COPROCESSOR_INSTRUCTIONS_MC_MR("2",f) |
| 1292 | #endif | 1293 | #endif |
| 1293 | 1294 | ||
| 1294 | TEST_GROUP("Miscellaneous instructions, memory hints, and Advanced SIMD instructions") | 1295 | TEST_GROUP("Miscellaneous instructions, memory hints, and Advanced SIMD instructions") |
| @@ -1318,9 +1319,9 @@ void kprobe_arm_test_cases(void) | |||
| 1318 | #endif | 1319 | #endif |
| 1319 | 1320 | ||
| 1320 | #if __LINUX_ARM_ARCH__ >= 7 | 1321 | #if __LINUX_ARM_ARCH__ >= 7 |
| 1321 | TEST_SUPPORTED( ".word 0xf590f000 @ pldw [r0, #0]") | 1322 | TEST_SUPPORTED( __inst_arm(0xf590f000) " @ pldw [r0, #0]") |
| 1322 | TEST_SUPPORTED( ".word 0xf797f000 @ pldw [r7, r0]") | 1323 | TEST_SUPPORTED( __inst_arm(0xf797f000) " @ pldw [r7, r0]") |
| 1323 | TEST_SUPPORTED( ".word 0xf798f18c @ pldw [r8, r12, lsl #3]"); | 1324 | TEST_SUPPORTED( __inst_arm(0xf798f18c) " @ pldw [r8, r12, lsl #3]"); |
| 1324 | #endif | 1325 | #endif |
| 1325 | 1326 | ||
| 1326 | #if __LINUX_ARM_ARCH__ >= 7 | 1327 | #if __LINUX_ARM_ARCH__ >= 7 |
diff --git a/arch/arm/kernel/kprobes-test-thumb.c b/arch/arm/kernel/kprobes-test-thumb.c index 5d8b85792222..844dd10d8593 100644 --- a/arch/arm/kernel/kprobes-test-thumb.c +++ b/arch/arm/kernel/kprobes-test-thumb.c | |||
| @@ -10,6 +10,7 @@ | |||
| 10 | 10 | ||
| 11 | #include <linux/kernel.h> | 11 | #include <linux/kernel.h> |
| 12 | #include <linux/module.h> | 12 | #include <linux/module.h> |
| 13 | #include <asm/opcodes.h> | ||
| 13 | 14 | ||
| 14 | #include "kprobes-test.h" | 15 | #include "kprobes-test.h" |
| 15 | 16 | ||
| @@ -119,7 +120,7 @@ void kprobe_thumb16_test_cases(void) | |||
| 119 | TEST_R( "add sp" ", r",8,-8, "") | 120 | TEST_R( "add sp" ", r",8,-8, "") |
| 120 | TEST_R( "add r",14,VAL1,", pc") | 121 | TEST_R( "add r",14,VAL1,", pc") |
| 121 | TEST_BF_R("add pc" ", r",0,2f-1f-8,"") | 122 | TEST_BF_R("add pc" ", r",0,2f-1f-8,"") |
| 122 | TEST_UNSUPPORTED(".short 0x44ff @ add pc, pc") | 123 | TEST_UNSUPPORTED(__inst_thumb16(0x44ff) " @ add pc, pc") |
| 123 | 124 | ||
| 124 | TEST_RR( "cmp r",3,VAL1,", r",8,VAL2,"") | 125 | TEST_RR( "cmp r",3,VAL1,", r",8,VAL2,"") |
| 125 | TEST_RR( "cmp r",8,VAL2,", r",0,VAL1,"") | 126 | TEST_RR( "cmp r",8,VAL2,", r",0,VAL1,"") |
| @@ -150,7 +151,7 @@ void kprobe_thumb16_test_cases(void) | |||
| 150 | 151 | ||
| 151 | TEST_BF_R("blx r",0, 2f+1,"") | 152 | TEST_BF_R("blx r",0, 2f+1,"") |
| 152 | TEST_BB_R("blx r",14,2f+1,"") | 153 | TEST_BB_R("blx r",14,2f+1,"") |
| 153 | TEST_UNSUPPORTED(".short 0x47f8 @ blx pc") | 154 | TEST_UNSUPPORTED(__inst_thumb16(0x47f8) " @ blx pc") |
| 154 | 155 | ||
| 155 | TEST_GROUP("Load from Literal Pool") | 156 | TEST_GROUP("Load from Literal Pool") |
| 156 | 157 | ||
| @@ -237,8 +238,8 @@ DONT_TEST_IN_ITBLOCK( | |||
| 237 | TEST_R("rev r7, r",0, VAL2,"") | 238 | TEST_R("rev r7, r",0, VAL2,"") |
| 238 | TEST_R("rev16 r0, r",7, VAL1,"") | 239 | TEST_R("rev16 r0, r",7, VAL1,"") |
| 239 | TEST_R("rev16 r7, r",0, VAL2,"") | 240 | TEST_R("rev16 r7, r",0, VAL2,"") |
| 240 | TEST_UNSUPPORTED(".short 0xba80") | 241 | TEST_UNSUPPORTED(__inst_thumb16(0xba80) "") |
| 241 | TEST_UNSUPPORTED(".short 0xbabf") | 242 | TEST_UNSUPPORTED(__inst_thumb16(0xbabf) "") |
| 242 | TEST_R("revsh r0, r",7, VAL1,"") | 243 | TEST_R("revsh r0, r",7, VAL1,"") |
| 243 | TEST_R("revsh r7, r",0, VAL2,"") | 244 | TEST_R("revsh r7, r",0, VAL2,"") |
| 244 | 245 | ||
| @@ -272,8 +273,8 @@ DONT_TEST_IN_ITBLOCK( | |||
| 272 | TEST("nop") | 273 | TEST("nop") |
| 273 | TEST("wfi") | 274 | TEST("wfi") |
| 274 | TEST_SUPPORTED("wfe") | 275 | TEST_SUPPORTED("wfe") |
| 275 | TEST_UNSUPPORTED(".short 0xbf50") /* Unassigned hints */ | 276 | TEST_UNSUPPORTED(__inst_thumb16(0xbf50) "") /* Unassigned hints */ |
| 276 | TEST_UNSUPPORTED(".short 0xbff0") /* Unassigned hints */ | 277 | TEST_UNSUPPORTED(__inst_thumb16(0xbff0) "") /* Unassigned hints */ |
| 277 | 278 | ||
| 278 | #define TEST_IT(code, code2) \ | 279 | #define TEST_IT(code, code2) \ |
| 279 | TESTCASE_START(code) \ | 280 | TESTCASE_START(code) \ |
| @@ -310,8 +311,8 @@ CONDITION_INSTRUCTIONS(8, | |||
| 310 | TEST_BF("bgt 2f") | 311 | TEST_BF("bgt 2f") |
| 311 | TEST_BB("blt 2b") | 312 | TEST_BB("blt 2b") |
| 312 | ) | 313 | ) |
| 313 | TEST_UNSUPPORTED(".short 0xde00") | 314 | TEST_UNSUPPORTED(__inst_thumb16(0xde00) "") |
| 314 | TEST_UNSUPPORTED(".short 0xdeff") | 315 | TEST_UNSUPPORTED(__inst_thumb16(0xdeff) "") |
| 315 | TEST_UNSUPPORTED("svc #0x00") | 316 | TEST_UNSUPPORTED("svc #0x00") |
| 316 | TEST_UNSUPPORTED("svc #0xff") | 317 | TEST_UNSUPPORTED("svc #0xff") |
| 317 | 318 | ||
| @@ -380,13 +381,13 @@ void kprobe_thumb32_test_cases(void) | |||
| 380 | TEST_THUMB_TO_ARM_INTERWORK_P("ldmia r",0,14*4,", {r12,pc}") | 381 | TEST_THUMB_TO_ARM_INTERWORK_P("ldmia r",0,14*4,", {r12,pc}") |
| 381 | TEST_THUMB_TO_ARM_INTERWORK_P("ldmia r",13,2*4,", {r0-r12,pc}") | 382 | TEST_THUMB_TO_ARM_INTERWORK_P("ldmia r",13,2*4,", {r0-r12,pc}") |
| 382 | 383 | ||
| 383 | TEST_UNSUPPORTED(".short 0xe88f,0x0101 @ stmia pc, {r0,r8}") | 384 | TEST_UNSUPPORTED(__inst_thumb32(0xe88f0101) " @ stmia pc, {r0,r8}") |
| 384 | TEST_UNSUPPORTED(".short 0xe92f,0x5f00 @ stmdb pc!, {r8-r12,r14}") | 385 | TEST_UNSUPPORTED(__inst_thumb32(0xe92f5f00) " @ stmdb pc!, {r8-r12,r14}") |
| 385 | TEST_UNSUPPORTED(".short 0xe8bd,0xc000 @ ldmia r13!, {r14,pc}") | 386 | TEST_UNSUPPORTED(__inst_thumb32(0xe8bdc000) " @ ldmia r13!, {r14,pc}") |
| 386 | TEST_UNSUPPORTED(".short 0xe93e,0xc000 @ ldmdb r14!, {r14,pc}") | 387 | TEST_UNSUPPORTED(__inst_thumb32(0xe93ec000) " @ ldmdb r14!, {r14,pc}") |
| 387 | TEST_UNSUPPORTED(".short 0xe8a7,0x3f00 @ stmia r7!, {r8-r12,sp}") | 388 | TEST_UNSUPPORTED(__inst_thumb32(0xe8a73f00) " @ stmia r7!, {r8-r12,sp}") |
| 388 | TEST_UNSUPPORTED(".short 0xe8a7,0x9f00 @ stmia r7!, {r8-r12,pc}") | 389 | TEST_UNSUPPORTED(__inst_thumb32(0xe8a79f00) " @ stmia r7!, {r8-r12,pc}") |
| 389 | TEST_UNSUPPORTED(".short 0xe93e,0x2010 @ ldmdb r14!, {r4,sp}") | 390 | TEST_UNSUPPORTED(__inst_thumb32(0xe93e2010) " @ ldmdb r14!, {r4,sp}") |
| 390 | 391 | ||
| 391 | TEST_GROUP("Load/store double or exclusive, table branch") | 392 | TEST_GROUP("Load/store double or exclusive, table branch") |
| 392 | 393 | ||
| @@ -402,12 +403,12 @@ void kprobe_thumb32_test_cases(void) | |||
| 402 | "3: .word "__stringify(VAL1)" \n\t" | 403 | "3: .word "__stringify(VAL1)" \n\t" |
| 403 | " .word "__stringify(VAL2)) | 404 | " .word "__stringify(VAL2)) |
| 404 | 405 | ||
| 405 | TEST_UNSUPPORTED(".short 0xe9ff,0xec04 @ ldrd r14, r12, [pc, #16]!") | 406 | TEST_UNSUPPORTED(__inst_thumb32(0xe9ffec04) " @ ldrd r14, r12, [pc, #16]!") |
| 406 | TEST_UNSUPPORTED(".short 0xe8ff,0xec04 @ ldrd r14, r12, [pc], #16") | 407 | TEST_UNSUPPORTED(__inst_thumb32(0xe8ffec04) " @ ldrd r14, r12, [pc], #16") |
| 407 | TEST_UNSUPPORTED(".short 0xe9d4,0xd800 @ ldrd sp, r8, [r4]") | 408 | TEST_UNSUPPORTED(__inst_thumb32(0xe9d4d800) " @ ldrd sp, r8, [r4]") |
| 408 | TEST_UNSUPPORTED(".short 0xe9d4,0xf800 @ ldrd pc, r8, [r4]") | 409 | TEST_UNSUPPORTED(__inst_thumb32(0xe9d4f800) " @ ldrd pc, r8, [r4]") |
| 409 | TEST_UNSUPPORTED(".short 0xe9d4,0x7d00 @ ldrd r7, sp, [r4]") | 410 | TEST_UNSUPPORTED(__inst_thumb32(0xe9d47d00) " @ ldrd r7, sp, [r4]") |
| 410 | TEST_UNSUPPORTED(".short 0xe9d4,0x7f00 @ ldrd r7, pc, [r4]") | 411 | TEST_UNSUPPORTED(__inst_thumb32(0xe9d47f00) " @ ldrd r7, pc, [r4]") |
| 411 | 412 | ||
| 412 | TEST_RRP("strd r",0, VAL1,", r",1, VAL2,", [r",1, 24,", #-16]") | 413 | TEST_RRP("strd r",0, VAL1,", r",1, VAL2,", [r",1, 24,", #-16]") |
| 413 | TEST_RR( "strd r",12,VAL2,", r",14,VAL1,", [sp, #16]") | 414 | TEST_RR( "strd r",12,VAL2,", r",14,VAL1,", [sp, #16]") |
| @@ -415,8 +416,8 @@ void kprobe_thumb32_test_cases(void) | |||
| 415 | TEST_RR( "strd r",14,VAL2,", r",12,VAL1,", [sp, #16]!") | 416 | TEST_RR( "strd r",14,VAL2,", r",12,VAL1,", [sp, #16]!") |
| 416 | TEST_RRP("strd r",1, VAL1,", r",0, VAL2,", [r",7, 24,"], #16") | 417 | TEST_RRP("strd r",1, VAL1,", r",0, VAL2,", [r",7, 24,"], #16") |
| 417 | TEST_RR( "strd r",7, VAL2,", r",8, VAL1,", [sp], #-16") | 418 | TEST_RR( "strd r",7, VAL2,", r",8, VAL1,", [sp], #-16") |
| 418 | TEST_UNSUPPORTED(".short 0xe9ef,0xec04 @ strd r14, r12, [pc, #16]!") | 419 | TEST_UNSUPPORTED(__inst_thumb32(0xe9efec04) " @ strd r14, r12, [pc, #16]!") |
| 419 | TEST_UNSUPPORTED(".short 0xe8ef,0xec04 @ strd r14, r12, [pc], #16") | 420 | TEST_UNSUPPORTED(__inst_thumb32(0xe8efec04) " @ strd r14, r12, [pc], #16") |
| 420 | 421 | ||
| 421 | TEST_RX("tbb [pc, r",0, (9f-(1f+4)),"]", | 422 | TEST_RX("tbb [pc, r",0, (9f-(1f+4)),"]", |
| 422 | "9: \n\t" | 423 | "9: \n\t" |
| @@ -460,9 +461,9 @@ void kprobe_thumb32_test_cases(void) | |||
| 460 | "3: mvn r0, r0 \n\t" | 461 | "3: mvn r0, r0 \n\t" |
| 461 | "2: nop \n\t") | 462 | "2: nop \n\t") |
| 462 | 463 | ||
| 463 | TEST_UNSUPPORTED(".short 0xe8d1,0xf01f @ tbh [r1, pc]") | 464 | TEST_UNSUPPORTED(__inst_thumb32(0xe8d1f01f) " @ tbh [r1, pc]") |
| 464 | TEST_UNSUPPORTED(".short 0xe8d1,0xf01d @ tbh [r1, sp]") | 465 | TEST_UNSUPPORTED(__inst_thumb32(0xe8d1f01d) " @ tbh [r1, sp]") |
| 465 | TEST_UNSUPPORTED(".short 0xe8dd,0xf012 @ tbh [sp, r2]") | 466 | TEST_UNSUPPORTED(__inst_thumb32(0xe8ddf012) " @ tbh [sp, r2]") |
| 466 | 467 | ||
| 467 | TEST_UNSUPPORTED("strexb r0, r1, [r2]") | 468 | TEST_UNSUPPORTED("strexb r0, r1, [r2]") |
| 468 | TEST_UNSUPPORTED("strexh r0, r1, [r2]") | 469 | TEST_UNSUPPORTED("strexh r0, r1, [r2]") |
| @@ -540,40 +541,40 @@ void kprobe_thumb32_test_cases(void) | |||
| 540 | TEST_RR("pkhtb r0, r",0, HH1,", r",1, HH2,"") | 541 | TEST_RR("pkhtb r0, r",0, HH1,", r",1, HH2,"") |
| 541 | TEST_RR("pkhtb r14,r",12, HH1,", r",10,HH2,", asr #2") | 542 | TEST_RR("pkhtb r14,r",12, HH1,", r",10,HH2,", asr #2") |
| 542 | 543 | ||
| 543 | TEST_UNSUPPORTED(".short 0xea17,0x0f0d @ tst.w r7, sp") | 544 | TEST_UNSUPPORTED(__inst_thumb32(0xea170f0d) " @ tst.w r7, sp") |
| 544 | TEST_UNSUPPORTED(".short 0xea17,0x0f0f @ tst.w r7, pc") | 545 | TEST_UNSUPPORTED(__inst_thumb32(0xea170f0f) " @ tst.w r7, pc") |
| 545 | TEST_UNSUPPORTED(".short 0xea1d,0x0f07 @ tst.w sp, r7") | 546 | TEST_UNSUPPORTED(__inst_thumb32(0xea1d0f07) " @ tst.w sp, r7") |
| 546 | TEST_UNSUPPORTED(".short 0xea1f,0x0f07 @ tst.w pc, r7") | 547 | TEST_UNSUPPORTED(__inst_thumb32(0xea1f0f07) " @ tst.w pc, r7") |
| 547 | TEST_UNSUPPORTED(".short 0xf01d,0x1f08 @ tst sp, #0x00080008") | 548 | TEST_UNSUPPORTED(__inst_thumb32(0xf01d1f08) " @ tst sp, #0x00080008") |
| 548 | TEST_UNSUPPORTED(".short 0xf01f,0x1f08 @ tst pc, #0x00080008") | 549 | TEST_UNSUPPORTED(__inst_thumb32(0xf01f1f08) " @ tst pc, #0x00080008") |
| 549 | 550 | ||
| 550 | TEST_UNSUPPORTED(".short 0xea97,0x0f0d @ teq.w r7, sp") | 551 | TEST_UNSUPPORTED(__inst_thumb32(0xea970f0d) " @ teq.w r7, sp") |
| 551 | TEST_UNSUPPORTED(".short 0xea97,0x0f0f @ teq.w r7, pc") | 552 | TEST_UNSUPPORTED(__inst_thumb32(0xea970f0f) " @ teq.w r7, pc") |
| 552 | TEST_UNSUPPORTED(".short 0xea9d,0x0f07 @ teq.w sp, r7") | 553 | TEST_UNSUPPORTED(__inst_thumb32(0xea9d0f07) " @ teq.w sp, r7") |
| 553 | TEST_UNSUPPORTED(".short 0xea9f,0x0f07 @ teq.w pc, r7") | 554 | TEST_UNSUPPORTED(__inst_thumb32(0xea9f0f07) " @ teq.w pc, r7") |
| 554 | TEST_UNSUPPORTED(".short 0xf09d,0x1f08 @ tst sp, #0x00080008") | 555 | TEST_UNSUPPORTED(__inst_thumb32(0xf09d1f08) " @ tst sp, #0x00080008") |
| 555 | TEST_UNSUPPORTED(".short 0xf09f,0x1f08 @ tst pc, #0x00080008") | 556 | TEST_UNSUPPORTED(__inst_thumb32(0xf09f1f08) " @ tst pc, #0x00080008") |
| 556 | 557 | ||
| 557 | TEST_UNSUPPORTED(".short 0xeb17,0x0f0d @ cmn.w r7, sp") | 558 | TEST_UNSUPPORTED(__inst_thumb32(0xeb170f0d) " @ cmn.w r7, sp") |
| 558 | TEST_UNSUPPORTED(".short 0xeb17,0x0f0f @ cmn.w r7, pc") | 559 | TEST_UNSUPPORTED(__inst_thumb32(0xeb170f0f) " @ cmn.w r7, pc") |
| 559 | TEST_P("cmn.w sp, r",7,0,"") | 560 | TEST_P("cmn.w sp, r",7,0,"") |
| 560 | TEST_UNSUPPORTED(".short 0xeb1f,0x0f07 @ cmn.w pc, r7") | 561 | TEST_UNSUPPORTED(__inst_thumb32(0xeb1f0f07) " @ cmn.w pc, r7") |
| 561 | TEST( "cmn sp, #0x00080008") | 562 | TEST( "cmn sp, #0x00080008") |
| 562 | TEST_UNSUPPORTED(".short 0xf11f,0x1f08 @ cmn pc, #0x00080008") | 563 | TEST_UNSUPPORTED(__inst_thumb32(0xf11f1f08) " @ cmn pc, #0x00080008") |
| 563 | 564 | ||
| 564 | TEST_UNSUPPORTED(".short 0xebb7,0x0f0d @ cmp.w r7, sp") | 565 | TEST_UNSUPPORTED(__inst_thumb32(0xebb70f0d) " @ cmp.w r7, sp") |
| 565 | TEST_UNSUPPORTED(".short 0xebb7,0x0f0f @ cmp.w r7, pc") | 566 | TEST_UNSUPPORTED(__inst_thumb32(0xebb70f0f) " @ cmp.w r7, pc") |
| 566 | TEST_P("cmp.w sp, r",7,0,"") | 567 | TEST_P("cmp.w sp, r",7,0,"") |
| 567 | TEST_UNSUPPORTED(".short 0xebbf,0x0f07 @ cmp.w pc, r7") | 568 | TEST_UNSUPPORTED(__inst_thumb32(0xebbf0f07) " @ cmp.w pc, r7") |
| 568 | TEST( "cmp sp, #0x00080008") | 569 | TEST( "cmp sp, #0x00080008") |
| 569 | TEST_UNSUPPORTED(".short 0xf1bf,0x1f08 @ cmp pc, #0x00080008") | 570 | TEST_UNSUPPORTED(__inst_thumb32(0xf1bf1f08) " @ cmp pc, #0x00080008") |
| 570 | 571 | ||
| 571 | TEST_UNSUPPORTED(".short 0xea5f,0x070d @ movs.w r7, sp") | 572 | TEST_UNSUPPORTED(__inst_thumb32(0xea5f070d) " @ movs.w r7, sp") |
| 572 | TEST_UNSUPPORTED(".short 0xea5f,0x070f @ movs.w r7, pc") | 573 | TEST_UNSUPPORTED(__inst_thumb32(0xea5f070f) " @ movs.w r7, pc") |
| 573 | TEST_UNSUPPORTED(".short 0xea5f,0x0d07 @ movs.w sp, r7") | 574 | TEST_UNSUPPORTED(__inst_thumb32(0xea5f0d07) " @ movs.w sp, r7") |
| 574 | TEST_UNSUPPORTED(".short 0xea4f,0x0f07 @ mov.w pc, r7") | 575 | TEST_UNSUPPORTED(__inst_thumb32(0xea4f0f07) " @ mov.w pc, r7") |
| 575 | TEST_UNSUPPORTED(".short 0xf04f,0x1d08 @ mov sp, #0x00080008") | 576 | TEST_UNSUPPORTED(__inst_thumb32(0xf04f1d08) " @ mov sp, #0x00080008") |
| 576 | TEST_UNSUPPORTED(".short 0xf04f,0x1f08 @ mov pc, #0x00080008") | 577 | TEST_UNSUPPORTED(__inst_thumb32(0xf04f1f08) " @ mov pc, #0x00080008") |
| 577 | 578 | ||
| 578 | TEST_R("add.w r0, sp, r",1, 4,"") | 579 | TEST_R("add.w r0, sp, r",1, 4,"") |
| 579 | TEST_R("adds r0, sp, r",1, 4,", asl #3") | 580 | TEST_R("adds r0, sp, r",1, 4,", asl #3") |
| @@ -581,15 +582,15 @@ void kprobe_thumb32_test_cases(void) | |||
| 581 | TEST_R("add r0, sp, r",1, 16,", ror #1") | 582 | TEST_R("add r0, sp, r",1, 16,", ror #1") |
| 582 | TEST_R("add.w sp, sp, r",1, 4,"") | 583 | TEST_R("add.w sp, sp, r",1, 4,"") |
| 583 | TEST_R("add sp, sp, r",1, 4,", asl #3") | 584 | TEST_R("add sp, sp, r",1, 4,", asl #3") |
| 584 | TEST_UNSUPPORTED(".short 0xeb0d,0x1d01 @ add sp, sp, r1, asl #4") | 585 | TEST_UNSUPPORTED(__inst_thumb32(0xeb0d1d01) " @ add sp, sp, r1, asl #4") |
| 585 | TEST_UNSUPPORTED(".short 0xeb0d,0x0d71 @ add sp, sp, r1, ror #1") | 586 | TEST_UNSUPPORTED(__inst_thumb32(0xeb0d0d71) " @ add sp, sp, r1, ror #1") |
| 586 | TEST( "add.w r0, sp, #24") | 587 | TEST( "add.w r0, sp, #24") |
| 587 | TEST( "add.w sp, sp, #24") | 588 | TEST( "add.w sp, sp, #24") |
| 588 | TEST_UNSUPPORTED(".short 0xeb0d,0x0f01 @ add pc, sp, r1") | 589 | TEST_UNSUPPORTED(__inst_thumb32(0xeb0d0f01) " @ add pc, sp, r1") |
| 589 | TEST_UNSUPPORTED(".short 0xeb0d,0x000f @ add r0, sp, pc") | 590 | TEST_UNSUPPORTED(__inst_thumb32(0xeb0d000f) " @ add r0, sp, pc") |
| 590 | TEST_UNSUPPORTED(".short 0xeb0d,0x000d @ add r0, sp, sp") | 591 | TEST_UNSUPPORTED(__inst_thumb32(0xeb0d000d) " @ add r0, sp, sp") |
| 591 | TEST_UNSUPPORTED(".short 0xeb0d,0x0d0f @ add sp, sp, pc") | 592 | TEST_UNSUPPORTED(__inst_thumb32(0xeb0d0d0f) " @ add sp, sp, pc") |
| 592 | TEST_UNSUPPORTED(".short 0xeb0d,0x0d0d @ add sp, sp, sp") | 593 | TEST_UNSUPPORTED(__inst_thumb32(0xeb0d0d0d) " @ add sp, sp, sp") |
| 593 | 594 | ||
| 594 | TEST_R("sub.w r0, sp, r",1, 4,"") | 595 | TEST_R("sub.w r0, sp, r",1, 4,"") |
| 595 | TEST_R("subs r0, sp, r",1, 4,", asl #3") | 596 | TEST_R("subs r0, sp, r",1, 4,", asl #3") |
| @@ -597,54 +598,54 @@ void kprobe_thumb32_test_cases(void) | |||
| 597 | TEST_R("sub r0, sp, r",1, 16,", ror #1") | 598 | TEST_R("sub r0, sp, r",1, 16,", ror #1") |
| 598 | TEST_R("sub.w sp, sp, r",1, 4,"") | 599 | TEST_R("sub.w sp, sp, r",1, 4,"") |
| 599 | TEST_R("sub sp, sp, r",1, 4,", asl #3") | 600 | TEST_R("sub sp, sp, r",1, 4,", asl #3") |
| 600 | TEST_UNSUPPORTED(".short 0xebad,0x1d01 @ sub sp, sp, r1, asl #4") | 601 | TEST_UNSUPPORTED(__inst_thumb32(0xebad1d01) " @ sub sp, sp, r1, asl #4") |
| 601 | TEST_UNSUPPORTED(".short 0xebad,0x0d71 @ sub sp, sp, r1, ror #1") | 602 | TEST_UNSUPPORTED(__inst_thumb32(0xebad0d71) " @ sub sp, sp, r1, ror #1") |
| 602 | TEST_UNSUPPORTED(".short 0xebad,0x0f01 @ sub pc, sp, r1") | 603 | TEST_UNSUPPORTED(__inst_thumb32(0xebad0f01) " @ sub pc, sp, r1") |
| 603 | TEST( "sub.w r0, sp, #24") | 604 | TEST( "sub.w r0, sp, #24") |
| 604 | TEST( "sub.w sp, sp, #24") | 605 | TEST( "sub.w sp, sp, #24") |
| 605 | 606 | ||
| 606 | TEST_UNSUPPORTED(".short 0xea02,0x010f @ and r1, r2, pc") | 607 | TEST_UNSUPPORTED(__inst_thumb32(0xea02010f) " @ and r1, r2, pc") |
| 607 | TEST_UNSUPPORTED(".short 0xea0f,0x0103 @ and r1, pc, r3") | 608 | TEST_UNSUPPORTED(__inst_thumb32(0xea0f0103) " @ and r1, pc, r3") |
| 608 | TEST_UNSUPPORTED(".short 0xea02,0x0f03 @ and pc, r2, r3") | 609 | TEST_UNSUPPORTED(__inst_thumb32(0xea020f03) " @ and pc, r2, r3") |
| 609 | TEST_UNSUPPORTED(".short 0xea02,0x010d @ and r1, r2, sp") | 610 | TEST_UNSUPPORTED(__inst_thumb32(0xea02010d) " @ and r1, r2, sp") |
| 610 | TEST_UNSUPPORTED(".short 0xea0d,0x0103 @ and r1, sp, r3") | 611 | TEST_UNSUPPORTED(__inst_thumb32(0xea0d0103) " @ and r1, sp, r3") |
| 611 | TEST_UNSUPPORTED(".short 0xea02,0x0d03 @ and sp, r2, r3") | 612 | TEST_UNSUPPORTED(__inst_thumb32(0xea020d03) " @ and sp, r2, r3") |
| 612 | TEST_UNSUPPORTED(".short 0xf00d,0x1108 @ and r1, sp, #0x00080008") | 613 | TEST_UNSUPPORTED(__inst_thumb32(0xf00d1108) " @ and r1, sp, #0x00080008") |
| 613 | TEST_UNSUPPORTED(".short 0xf00f,0x1108 @ and r1, pc, #0x00080008") | 614 | TEST_UNSUPPORTED(__inst_thumb32(0xf00f1108) " @ and r1, pc, #0x00080008") |
| 614 | TEST_UNSUPPORTED(".short 0xf002,0x1d08 @ and sp, r8, #0x00080008") | 615 | TEST_UNSUPPORTED(__inst_thumb32(0xf0021d08) " @ and sp, r8, #0x00080008") |
| 615 | TEST_UNSUPPORTED(".short 0xf002,0x1f08 @ and pc, r8, #0x00080008") | 616 | TEST_UNSUPPORTED(__inst_thumb32(0xf0021f08) " @ and pc, r8, #0x00080008") |
| 616 | 617 | ||
| 617 | TEST_UNSUPPORTED(".short 0xeb02,0x010f @ add r1, r2, pc") | 618 | TEST_UNSUPPORTED(__inst_thumb32(0xeb02010f) " @ add r1, r2, pc") |
| 618 | TEST_UNSUPPORTED(".short 0xeb0f,0x0103 @ add r1, pc, r3") | 619 | TEST_UNSUPPORTED(__inst_thumb32(0xeb0f0103) " @ add r1, pc, r3") |
| 619 | TEST_UNSUPPORTED(".short 0xeb02,0x0f03 @ add pc, r2, r3") | 620 | TEST_UNSUPPORTED(__inst_thumb32(0xeb020f03) " @ add pc, r2, r3") |
| 620 | TEST_UNSUPPORTED(".short 0xeb02,0x010d @ add r1, r2, sp") | 621 | TEST_UNSUPPORTED(__inst_thumb32(0xeb02010d) " @ add r1, r2, sp") |
| 621 | TEST_SUPPORTED( ".short 0xeb0d,0x0103 @ add r1, sp, r3") | 622 | TEST_SUPPORTED( __inst_thumb32(0xeb0d0103) " @ add r1, sp, r3") |
| 622 | TEST_UNSUPPORTED(".short 0xeb02,0x0d03 @ add sp, r2, r3") | 623 | TEST_UNSUPPORTED(__inst_thumb32(0xeb020d03) " @ add sp, r2, r3") |
| 623 | TEST_SUPPORTED( ".short 0xf10d,0x1108 @ add r1, sp, #0x00080008") | 624 | TEST_SUPPORTED( __inst_thumb32(0xf10d1108) " @ add r1, sp, #0x00080008") |
| 624 | TEST_UNSUPPORTED(".short 0xf10d,0x1f08 @ add pc, sp, #0x00080008") | 625 | TEST_UNSUPPORTED(__inst_thumb32(0xf10d1f08) " @ add pc, sp, #0x00080008") |
| 625 | TEST_UNSUPPORTED(".short 0xf10f,0x1108 @ add r1, pc, #0x00080008") | 626 | TEST_UNSUPPORTED(__inst_thumb32(0xf10f1108) " @ add r1, pc, #0x00080008") |
| 626 | TEST_UNSUPPORTED(".short 0xf102,0x1d08 @ add sp, r8, #0x00080008") | 627 | TEST_UNSUPPORTED(__inst_thumb32(0xf1021d08) " @ add sp, r8, #0x00080008") |
| 627 | TEST_UNSUPPORTED(".short 0xf102,0x1f08 @ add pc, r8, #0x00080008") | 628 | TEST_UNSUPPORTED(__inst_thumb32(0xf1021f08) " @ add pc, r8, #0x00080008") |
| 628 | 629 | ||
| 629 | TEST_UNSUPPORTED(".short 0xeaa0,0x0000") | 630 | TEST_UNSUPPORTED(__inst_thumb32(0xeaa00000) "") |
| 630 | TEST_UNSUPPORTED(".short 0xeaf0,0x0000") | 631 | TEST_UNSUPPORTED(__inst_thumb32(0xeaf00000) "") |
| 631 | TEST_UNSUPPORTED(".short 0xeb20,0x0000") | 632 | TEST_UNSUPPORTED(__inst_thumb32(0xeb200000) "") |
| 632 | TEST_UNSUPPORTED(".short 0xeb80,0x0000") | 633 | TEST_UNSUPPORTED(__inst_thumb32(0xeb800000) "") |
| 633 | TEST_UNSUPPORTED(".short 0xebe0,0x0000") | 634 | TEST_UNSUPPORTED(__inst_thumb32(0xebe00000) "") |
| 634 | 635 | ||
| 635 | TEST_UNSUPPORTED(".short 0xf0a0,0x0000") | 636 | TEST_UNSUPPORTED(__inst_thumb32(0xf0a00000) "") |
| 636 | TEST_UNSUPPORTED(".short 0xf0c0,0x0000") | 637 | TEST_UNSUPPORTED(__inst_thumb32(0xf0c00000) "") |
| 637 | TEST_UNSUPPORTED(".short 0xf0f0,0x0000") | 638 | TEST_UNSUPPORTED(__inst_thumb32(0xf0f00000) "") |
| 638 | TEST_UNSUPPORTED(".short 0xf120,0x0000") | 639 | TEST_UNSUPPORTED(__inst_thumb32(0xf1200000) "") |
| 639 | TEST_UNSUPPORTED(".short 0xf180,0x0000") | 640 | TEST_UNSUPPORTED(__inst_thumb32(0xf1800000) "") |
| 640 | TEST_UNSUPPORTED(".short 0xf1e0,0x0000") | 641 | TEST_UNSUPPORTED(__inst_thumb32(0xf1e00000) "") |
| 641 | 642 | ||
| 642 | TEST_GROUP("Coprocessor instructions") | 643 | TEST_GROUP("Coprocessor instructions") |
| 643 | 644 | ||
| 644 | TEST_UNSUPPORTED(".short 0xec00,0x0000") | 645 | TEST_UNSUPPORTED(__inst_thumb32(0xec000000) "") |
| 645 | TEST_UNSUPPORTED(".short 0xeff0,0x0000") | 646 | TEST_UNSUPPORTED(__inst_thumb32(0xeff00000) "") |
| 646 | TEST_UNSUPPORTED(".short 0xfc00,0x0000") | 647 | TEST_UNSUPPORTED(__inst_thumb32(0xfc000000) "") |
| 647 | TEST_UNSUPPORTED(".short 0xfff0,0x0000") | 648 | TEST_UNSUPPORTED(__inst_thumb32(0xfff00000) "") |
| 648 | 649 | ||
| 649 | TEST_GROUP("Data-processing (plain binary immediate)") | 650 | TEST_GROUP("Data-processing (plain binary immediate)") |
| 650 | 651 | ||
| @@ -652,92 +653,92 @@ void kprobe_thumb32_test_cases(void) | |||
| 652 | TEST( "addw r14, sp, #0xf5a") | 653 | TEST( "addw r14, sp, #0xf5a") |
| 653 | TEST( "addw sp, sp, #0x20") | 654 | TEST( "addw sp, sp, #0x20") |
| 654 | TEST( "addw r7, pc, #0x888") | 655 | TEST( "addw r7, pc, #0x888") |
| 655 | TEST_UNSUPPORTED(".short 0xf20f,0x1f20 @ addw pc, pc, #0x120") | 656 | TEST_UNSUPPORTED(__inst_thumb32(0xf20f1f20) " @ addw pc, pc, #0x120") |
| 656 | TEST_UNSUPPORTED(".short 0xf20d,0x1f20 @ addw pc, sp, #0x120") | 657 | TEST_UNSUPPORTED(__inst_thumb32(0xf20d1f20) " @ addw pc, sp, #0x120") |
| 657 | TEST_UNSUPPORTED(".short 0xf20f,0x1d20 @ addw sp, pc, #0x120") | 658 | TEST_UNSUPPORTED(__inst_thumb32(0xf20f1d20) " @ addw sp, pc, #0x120") |
| 658 | TEST_UNSUPPORTED(".short 0xf200,0x1d20 @ addw sp, r0, #0x120") | 659 | TEST_UNSUPPORTED(__inst_thumb32(0xf2001d20) " @ addw sp, r0, #0x120") |
| 659 | 660 | ||
| 660 | TEST_R("subw r0, r",1, VAL1,", #0x123") | 661 | TEST_R("subw r0, r",1, VAL1,", #0x123") |
| 661 | TEST( "subw r14, sp, #0xf5a") | 662 | TEST( "subw r14, sp, #0xf5a") |
| 662 | TEST( "subw sp, sp, #0x20") | 663 | TEST( "subw sp, sp, #0x20") |
| 663 | TEST( "subw r7, pc, #0x888") | 664 | TEST( "subw r7, pc, #0x888") |
| 664 | TEST_UNSUPPORTED(".short 0xf2af,0x1f20 @ subw pc, pc, #0x120") | 665 | TEST_UNSUPPORTED(__inst_thumb32(0xf2af1f20) " @ subw pc, pc, #0x120") |
| 665 | TEST_UNSUPPORTED(".short 0xf2ad,0x1f20 @ subw pc, sp, #0x120") | 666 | TEST_UNSUPPORTED(__inst_thumb32(0xf2ad1f20) " @ subw pc, sp, #0x120") |
| 666 | TEST_UNSUPPORTED(".short 0xf2af,0x1d20 @ subw sp, pc, #0x120") | 667 | TEST_UNSUPPORTED(__inst_thumb32(0xf2af1d20) " @ subw sp, pc, #0x120") |
| 667 | TEST_UNSUPPORTED(".short 0xf2a0,0x1d20 @ subw sp, r0, #0x120") | 668 | TEST_UNSUPPORTED(__inst_thumb32(0xf2a01d20) " @ subw sp, r0, #0x120") |
| 668 | 669 | ||
| 669 | TEST("movw r0, #0") | 670 | TEST("movw r0, #0") |
| 670 | TEST("movw r0, #0xffff") | 671 | TEST("movw r0, #0xffff") |
| 671 | TEST("movw lr, #0xffff") | 672 | TEST("movw lr, #0xffff") |
| 672 | TEST_UNSUPPORTED(".short 0xf240,0x0d00 @ movw sp, #0") | 673 | TEST_UNSUPPORTED(__inst_thumb32(0xf2400d00) " @ movw sp, #0") |
| 673 | TEST_UNSUPPORTED(".short 0xf240,0x0f00 @ movw pc, #0") | 674 | TEST_UNSUPPORTED(__inst_thumb32(0xf2400f00) " @ movw pc, #0") |
| 674 | 675 | ||
| 675 | TEST_R("movt r",0, VAL1,", #0") | 676 | TEST_R("movt r",0, VAL1,", #0") |
| 676 | TEST_R("movt r",0, VAL2,", #0xffff") | 677 | TEST_R("movt r",0, VAL2,", #0xffff") |
| 677 | TEST_R("movt r",14,VAL1,", #0xffff") | 678 | TEST_R("movt r",14,VAL1,", #0xffff") |
| 678 | TEST_UNSUPPORTED(".short 0xf2c0,0x0d00 @ movt sp, #0") | 679 | TEST_UNSUPPORTED(__inst_thumb32(0xf2c00d00) " @ movt sp, #0") |
| 679 | TEST_UNSUPPORTED(".short 0xf2c0,0x0f00 @ movt pc, #0") | 680 | TEST_UNSUPPORTED(__inst_thumb32(0xf2c00f00) " @ movt pc, #0") |
| 680 | 681 | ||
| 681 | TEST_R( "ssat r0, #24, r",0, VAL1,"") | 682 | TEST_R( "ssat r0, #24, r",0, VAL1,"") |
| 682 | TEST_R( "ssat r14, #24, r",12, VAL2,"") | 683 | TEST_R( "ssat r14, #24, r",12, VAL2,"") |
| 683 | TEST_R( "ssat r0, #24, r",0, VAL1,", lsl #8") | 684 | TEST_R( "ssat r0, #24, r",0, VAL1,", lsl #8") |
| 684 | TEST_R( "ssat r14, #24, r",12, VAL2,", asr #8") | 685 | TEST_R( "ssat r14, #24, r",12, VAL2,", asr #8") |
| 685 | TEST_UNSUPPORTED(".short 0xf30c,0x0d17 @ ssat sp, #24, r12") | 686 | TEST_UNSUPPORTED(__inst_thumb32(0xf30c0d17) " @ ssat sp, #24, r12") |
| 686 | TEST_UNSUPPORTED(".short 0xf30c,0x0f17 @ ssat pc, #24, r12") | 687 | TEST_UNSUPPORTED(__inst_thumb32(0xf30c0f17) " @ ssat pc, #24, r12") |
| 687 | TEST_UNSUPPORTED(".short 0xf30d,0x0c17 @ ssat r12, #24, sp") | 688 | TEST_UNSUPPORTED(__inst_thumb32(0xf30d0c17) " @ ssat r12, #24, sp") |
| 688 | TEST_UNSUPPORTED(".short 0xf30f,0x0c17 @ ssat r12, #24, pc") | 689 | TEST_UNSUPPORTED(__inst_thumb32(0xf30f0c17) " @ ssat r12, #24, pc") |
| 689 | 690 | ||
| 690 | TEST_R( "usat r0, #24, r",0, VAL1,"") | 691 | TEST_R( "usat r0, #24, r",0, VAL1,"") |
| 691 | TEST_R( "usat r14, #24, r",12, VAL2,"") | 692 | TEST_R( "usat r14, #24, r",12, VAL2,"") |
| 692 | TEST_R( "usat r0, #24, r",0, VAL1,", lsl #8") | 693 | TEST_R( "usat r0, #24, r",0, VAL1,", lsl #8") |
| 693 | TEST_R( "usat r14, #24, r",12, VAL2,", asr #8") | 694 | TEST_R( "usat r14, #24, r",12, VAL2,", asr #8") |
| 694 | TEST_UNSUPPORTED(".short 0xf38c,0x0d17 @ usat sp, #24, r12") | 695 | TEST_UNSUPPORTED(__inst_thumb32(0xf38c0d17) " @ usat sp, #24, r12") |
| 695 | TEST_UNSUPPORTED(".short 0xf38c,0x0f17 @ usat pc, #24, r12") | 696 | TEST_UNSUPPORTED(__inst_thumb32(0xf38c0f17) " @ usat pc, #24, r12") |
| 696 | TEST_UNSUPPORTED(".short 0xf38d,0x0c17 @ usat r12, #24, sp") | 697 | TEST_UNSUPPORTED(__inst_thumb32(0xf38d0c17) " @ usat r12, #24, sp") |
| 697 | TEST_UNSUPPORTED(".short 0xf38f,0x0c17 @ usat r12, #24, pc") | 698 | TEST_UNSUPPORTED(__inst_thumb32(0xf38f0c17) " @ usat r12, #24, pc") |
| 698 | 699 | ||
| 699 | TEST_R( "ssat16 r0, #12, r",0, HH1,"") | 700 | TEST_R( "ssat16 r0, #12, r",0, HH1,"") |
| 700 | TEST_R( "ssat16 r14, #12, r",12, HH2,"") | 701 | TEST_R( "ssat16 r14, #12, r",12, HH2,"") |
| 701 | TEST_UNSUPPORTED(".short 0xf32c,0x0d0b @ ssat16 sp, #12, r12") | 702 | TEST_UNSUPPORTED(__inst_thumb32(0xf32c0d0b) " @ ssat16 sp, #12, r12") |
| 702 | TEST_UNSUPPORTED(".short 0xf32c,0x0f0b @ ssat16 pc, #12, r12") | 703 | TEST_UNSUPPORTED(__inst_thumb32(0xf32c0f0b) " @ ssat16 pc, #12, r12") |
| 703 | TEST_UNSUPPORTED(".short 0xf32d,0x0c0b @ ssat16 r12, #12, sp") | 704 | TEST_UNSUPPORTED(__inst_thumb32(0xf32d0c0b) " @ ssat16 r12, #12, sp") |
| 704 | TEST_UNSUPPORTED(".short 0xf32f,0x0c0b @ ssat16 r12, #12, pc") | 705 | TEST_UNSUPPORTED(__inst_thumb32(0xf32f0c0b) " @ ssat16 r12, #12, pc") |
| 705 | 706 | ||
| 706 | TEST_R( "usat16 r0, #12, r",0, HH1,"") | 707 | TEST_R( "usat16 r0, #12, r",0, HH1,"") |
| 707 | TEST_R( "usat16 r14, #12, r",12, HH2,"") | 708 | TEST_R( "usat16 r14, #12, r",12, HH2,"") |
| 708 | TEST_UNSUPPORTED(".short 0xf3ac,0x0d0b @ usat16 sp, #12, r12") | 709 | TEST_UNSUPPORTED(__inst_thumb32(0xf3ac0d0b) " @ usat16 sp, #12, r12") |
| 709 | TEST_UNSUPPORTED(".short 0xf3ac,0x0f0b @ usat16 pc, #12, r12") | 710 | TEST_UNSUPPORTED(__inst_thumb32(0xf3ac0f0b) " @ usat16 pc, #12, r12") |
| 710 | TEST_UNSUPPORTED(".short 0xf3ad,0x0c0b @ usat16 r12, #12, sp") | 711 | TEST_UNSUPPORTED(__inst_thumb32(0xf3ad0c0b) " @ usat16 r12, #12, sp") |
| 711 | TEST_UNSUPPORTED(".short 0xf3af,0x0c0b @ usat16 r12, #12, pc") | 712 | TEST_UNSUPPORTED(__inst_thumb32(0xf3af0c0b) " @ usat16 r12, #12, pc") |
| 712 | 713 | ||
| 713 | TEST_R( "sbfx r0, r",0 , VAL1,", #0, #31") | 714 | TEST_R( "sbfx r0, r",0 , VAL1,", #0, #31") |
| 714 | TEST_R( "sbfx r14, r",12, VAL2,", #8, #16") | 715 | TEST_R( "sbfx r14, r",12, VAL2,", #8, #16") |
| 715 | TEST_R( "sbfx r4, r",10, VAL1,", #16, #15") | 716 | TEST_R( "sbfx r4, r",10, VAL1,", #16, #15") |
| 716 | TEST_UNSUPPORTED(".short 0xf34c,0x2d0f @ sbfx sp, r12, #8, #16") | 717 | TEST_UNSUPPORTED(__inst_thumb32(0xf34c2d0f) " @ sbfx sp, r12, #8, #16") |
| 717 | TEST_UNSUPPORTED(".short 0xf34c,0x2f0f @ sbfx pc, r12, #8, #16") | 718 | TEST_UNSUPPORTED(__inst_thumb32(0xf34c2f0f) " @ sbfx pc, r12, #8, #16") |
| 718 | TEST_UNSUPPORTED(".short 0xf34d,0x2c0f @ sbfx r12, sp, #8, #16") | 719 | TEST_UNSUPPORTED(__inst_thumb32(0xf34d2c0f) " @ sbfx r12, sp, #8, #16") |
| 719 | TEST_UNSUPPORTED(".short 0xf34f,0x2c0f @ sbfx r12, pc, #8, #16") | 720 | TEST_UNSUPPORTED(__inst_thumb32(0xf34f2c0f) " @ sbfx r12, pc, #8, #16") |
| 720 | 721 | ||
| 721 | TEST_R( "ubfx r0, r",0 , VAL1,", #0, #31") | 722 | TEST_R( "ubfx r0, r",0 , VAL1,", #0, #31") |
| 722 | TEST_R( "ubfx r14, r",12, VAL2,", #8, #16") | 723 | TEST_R( "ubfx r14, r",12, VAL2,", #8, #16") |
| 723 | TEST_R( "ubfx r4, r",10, VAL1,", #16, #15") | 724 | TEST_R( "ubfx r4, r",10, VAL1,", #16, #15") |
| 724 | TEST_UNSUPPORTED(".short 0xf3cc,0x2d0f @ ubfx sp, r12, #8, #16") | 725 | TEST_UNSUPPORTED(__inst_thumb32(0xf3cc2d0f) " @ ubfx sp, r12, #8, #16") |
| 725 | TEST_UNSUPPORTED(".short 0xf3cc,0x2f0f @ ubfx pc, r12, #8, #16") | 726 | TEST_UNSUPPORTED(__inst_thumb32(0xf3cc2f0f) " @ ubfx pc, r12, #8, #16") |
| 726 | TEST_UNSUPPORTED(".short 0xf3cd,0x2c0f @ ubfx r12, sp, #8, #16") | 727 | TEST_UNSUPPORTED(__inst_thumb32(0xf3cd2c0f) " @ ubfx r12, sp, #8, #16") |
| 727 | TEST_UNSUPPORTED(".short 0xf3cf,0x2c0f @ ubfx r12, pc, #8, #16") | 728 | TEST_UNSUPPORTED(__inst_thumb32(0xf3cf2c0f) " @ ubfx r12, pc, #8, #16") |
| 728 | 729 | ||
| 729 | TEST_R( "bfc r",0, VAL1,", #4, #20") | 730 | TEST_R( "bfc r",0, VAL1,", #4, #20") |
| 730 | TEST_R( "bfc r",14,VAL2,", #4, #20") | 731 | TEST_R( "bfc r",14,VAL2,", #4, #20") |
| 731 | TEST_R( "bfc r",7, VAL1,", #0, #31") | 732 | TEST_R( "bfc r",7, VAL1,", #0, #31") |
| 732 | TEST_R( "bfc r",8, VAL2,", #0, #31") | 733 | TEST_R( "bfc r",8, VAL2,", #0, #31") |
| 733 | TEST_UNSUPPORTED(".short 0xf36f,0x0d1e @ bfc sp, #0, #31") | 734 | TEST_UNSUPPORTED(__inst_thumb32(0xf36f0d1e) " @ bfc sp, #0, #31") |
| 734 | TEST_UNSUPPORTED(".short 0xf36f,0x0f1e @ bfc pc, #0, #31") | 735 | TEST_UNSUPPORTED(__inst_thumb32(0xf36f0f1e) " @ bfc pc, #0, #31") |
| 735 | 736 | ||
| 736 | TEST_RR( "bfi r",0, VAL1,", r",0 , VAL2,", #0, #31") | 737 | TEST_RR( "bfi r",0, VAL1,", r",0 , VAL2,", #0, #31") |
| 737 | TEST_RR( "bfi r",12,VAL1,", r",14 , VAL2,", #4, #20") | 738 | TEST_RR( "bfi r",12,VAL1,", r",14 , VAL2,", #4, #20") |
| 738 | TEST_UNSUPPORTED(".short 0xf36e,0x1d17 @ bfi sp, r14, #4, #20") | 739 | TEST_UNSUPPORTED(__inst_thumb32(0xf36e1d17) " @ bfi sp, r14, #4, #20") |
| 739 | TEST_UNSUPPORTED(".short 0xf36e,0x1f17 @ bfi pc, r14, #4, #20") | 740 | TEST_UNSUPPORTED(__inst_thumb32(0xf36e1f17) " @ bfi pc, r14, #4, #20") |
| 740 | TEST_UNSUPPORTED(".short 0xf36d,0x1e17 @ bfi r14, sp, #4, #20") | 741 | TEST_UNSUPPORTED(__inst_thumb32(0xf36d1e17) " @ bfi r14, sp, #4, #20") |
| 741 | 742 | ||
| 742 | TEST_GROUP("Branches and miscellaneous control") | 743 | TEST_GROUP("Branches and miscellaneous control") |
| 743 | 744 | ||
| @@ -775,14 +776,14 @@ CONDITION_INSTRUCTIONS(22, | |||
| 775 | 776 | ||
| 776 | TEST("mrs r0, cpsr") | 777 | TEST("mrs r0, cpsr") |
| 777 | TEST("mrs r14, cpsr") | 778 | TEST("mrs r14, cpsr") |
| 778 | TEST_UNSUPPORTED(".short 0xf3ef,0x8d00 @ mrs sp, spsr") | 779 | TEST_UNSUPPORTED(__inst_thumb32(0xf3ef8d00) " @ mrs sp, spsr") |
| 779 | TEST_UNSUPPORTED(".short 0xf3ef,0x8f00 @ mrs pc, spsr") | 780 | TEST_UNSUPPORTED(__inst_thumb32(0xf3ef8f00) " @ mrs pc, spsr") |
| 780 | TEST_UNSUPPORTED("mrs r0, spsr") | 781 | TEST_UNSUPPORTED("mrs r0, spsr") |
| 781 | TEST_UNSUPPORTED("mrs lr, spsr") | 782 | TEST_UNSUPPORTED("mrs lr, spsr") |
| 782 | 783 | ||
| 783 | TEST_UNSUPPORTED(".short 0xf7f0,0x8000 @ smc #0") | 784 | TEST_UNSUPPORTED(__inst_thumb32(0xf7f08000) " @ smc #0") |
| 784 | 785 | ||
| 785 | TEST_UNSUPPORTED(".short 0xf7f0,0xa000 @ undefeined") | 786 | TEST_UNSUPPORTED(__inst_thumb32(0xf7f0a000) " @ undefeined") |
| 786 | 787 | ||
| 787 | TEST_BF( "b.w 2f") | 788 | TEST_BF( "b.w 2f") |
| 788 | TEST_BB( "b.w 2b") | 789 | TEST_BB( "b.w 2b") |
| @@ -829,15 +830,15 @@ CONDITION_INSTRUCTIONS(22, | |||
| 829 | SINGLE_STORE("") | 830 | SINGLE_STORE("") |
| 830 | 831 | ||
| 831 | TEST("str sp, [sp]") | 832 | TEST("str sp, [sp]") |
| 832 | TEST_UNSUPPORTED(".short 0xf8cf,0xe000 @ str r14, [pc]") | 833 | TEST_UNSUPPORTED(__inst_thumb32(0xf8cfe000) " @ str r14, [pc]") |
| 833 | TEST_UNSUPPORTED(".short 0xf8ce,0xf000 @ str pc, [r14]") | 834 | TEST_UNSUPPORTED(__inst_thumb32(0xf8cef000) " @ str pc, [r14]") |
| 834 | 835 | ||
| 835 | TEST_GROUP("Advanced SIMD element or structure load/store instructions") | 836 | TEST_GROUP("Advanced SIMD element or structure load/store instructions") |
| 836 | 837 | ||
| 837 | TEST_UNSUPPORTED(".short 0xf900,0x0000") | 838 | TEST_UNSUPPORTED(__inst_thumb32(0xf9000000) "") |
| 838 | TEST_UNSUPPORTED(".short 0xf92f,0xffff") | 839 | TEST_UNSUPPORTED(__inst_thumb32(0xf92fffff) "") |
| 839 | TEST_UNSUPPORTED(".short 0xf980,0x0000") | 840 | TEST_UNSUPPORTED(__inst_thumb32(0xf9800000) "") |
| 840 | TEST_UNSUPPORTED(".short 0xf9ef,0xffff") | 841 | TEST_UNSUPPORTED(__inst_thumb32(0xf9efffff) "") |
| 841 | 842 | ||
| 842 | TEST_GROUP("Load single data item and memory hints") | 843 | TEST_GROUP("Load single data item and memory hints") |
| 843 | 844 | ||
| @@ -881,20 +882,20 @@ CONDITION_INSTRUCTIONS(22, | |||
| 881 | TEST_SUPPORTED("ldr sp, 99f") | 882 | TEST_SUPPORTED("ldr sp, 99f") |
| 882 | TEST_SUPPORTED("ldr pc, 99f") | 883 | TEST_SUPPORTED("ldr pc, 99f") |
| 883 | 884 | ||
| 884 | TEST_UNSUPPORTED(".short 0xf854,0x700d @ ldr r7, [r4, sp]") | 885 | TEST_UNSUPPORTED(__inst_thumb32(0xf854700d) " @ ldr r7, [r4, sp]") |
| 885 | TEST_UNSUPPORTED(".short 0xf854,0x700f @ ldr r7, [r4, pc]") | 886 | TEST_UNSUPPORTED(__inst_thumb32(0xf854700f) " @ ldr r7, [r4, pc]") |
| 886 | TEST_UNSUPPORTED(".short 0xf814,0x700d @ ldrb r7, [r4, sp]") | 887 | TEST_UNSUPPORTED(__inst_thumb32(0xf814700d) " @ ldrb r7, [r4, sp]") |
| 887 | TEST_UNSUPPORTED(".short 0xf814,0x700f @ ldrb r7, [r4, pc]") | 888 | TEST_UNSUPPORTED(__inst_thumb32(0xf814700f) " @ ldrb r7, [r4, pc]") |
| 888 | TEST_UNSUPPORTED(".short 0xf89f,0xd004 @ ldrb sp, 99f") | 889 | TEST_UNSUPPORTED(__inst_thumb32(0xf89fd004) " @ ldrb sp, 99f") |
| 889 | TEST_UNSUPPORTED(".short 0xf814,0xd008 @ ldrb sp, [r4, r8]") | 890 | TEST_UNSUPPORTED(__inst_thumb32(0xf814d008) " @ ldrb sp, [r4, r8]") |
| 890 | TEST_UNSUPPORTED(".short 0xf894,0xd000 @ ldrb sp, [r4]") | 891 | TEST_UNSUPPORTED(__inst_thumb32(0xf894d000) " @ ldrb sp, [r4]") |
| 891 | 892 | ||
| 892 | TEST_UNSUPPORTED(".short 0xf860,0x0000") /* Unallocated space */ | 893 | TEST_UNSUPPORTED(__inst_thumb32(0xf8600000) "") /* Unallocated space */ |
| 893 | TEST_UNSUPPORTED(".short 0xf9ff,0xffff") /* Unallocated space */ | 894 | TEST_UNSUPPORTED(__inst_thumb32(0xf9ffffff) "") /* Unallocated space */ |
| 894 | TEST_UNSUPPORTED(".short 0xf950,0x0000") /* Unallocated space */ | 895 | TEST_UNSUPPORTED(__inst_thumb32(0xf9500000) "") /* Unallocated space */ |
| 895 | TEST_UNSUPPORTED(".short 0xf95f,0xffff") /* Unallocated space */ | 896 | TEST_UNSUPPORTED(__inst_thumb32(0xf95fffff) "") /* Unallocated space */ |
| 896 | TEST_UNSUPPORTED(".short 0xf800,0x0800") /* Unallocated space */ | 897 | TEST_UNSUPPORTED(__inst_thumb32(0xf8000800) "") /* Unallocated space */ |
| 897 | TEST_UNSUPPORTED(".short 0xf97f,0xfaff") /* Unallocated space */ | 898 | TEST_UNSUPPORTED(__inst_thumb32(0xf97ffaff) "") /* Unallocated space */ |
| 898 | 899 | ||
| 899 | TEST( "pli [pc, #4]") | 900 | TEST( "pli [pc, #4]") |
| 900 | TEST( "pli [pc, #-4]") | 901 | TEST( "pli [pc, #-4]") |
| @@ -902,22 +903,22 @@ CONDITION_INSTRUCTIONS(22, | |||
| 902 | TEST( "pld [pc, #-4]") | 903 | TEST( "pld [pc, #-4]") |
| 903 | 904 | ||
| 904 | TEST_P( "pld [r",0,-1024,", #1024]") | 905 | TEST_P( "pld [r",0,-1024,", #1024]") |
| 905 | TEST( ".short 0xf8b0,0xf400 @ pldw [r0, #1024]") | 906 | TEST( __inst_thumb32(0xf8b0f400) " @ pldw [r0, #1024]") |
| 906 | TEST_P( "pli [r",4, 0b,", #1024]") | 907 | TEST_P( "pli [r",4, 0b,", #1024]") |
| 907 | TEST_P( "pld [r",7, 120,", #-120]") | 908 | TEST_P( "pld [r",7, 120,", #-120]") |
| 908 | TEST( ".short 0xf837,0xfc78 @ pldw [r7, #-120]") | 909 | TEST( __inst_thumb32(0xf837fc78) " @ pldw [r7, #-120]") |
| 909 | TEST_P( "pli [r",11,120,", #-120]") | 910 | TEST_P( "pli [r",11,120,", #-120]") |
| 910 | TEST( "pld [sp, #0]") | 911 | TEST( "pld [sp, #0]") |
| 911 | 912 | ||
| 912 | TEST_PR("pld [r",7, 24, ", r",0, 16,"]") | 913 | TEST_PR("pld [r",7, 24, ", r",0, 16,"]") |
| 913 | TEST_PR("pld [r",8, 24, ", r",12,16,", lsl #3]") | 914 | TEST_PR("pld [r",8, 24, ", r",12,16,", lsl #3]") |
| 914 | TEST_SUPPORTED(".short 0xf837,0xf000 @ pldw [r7, r0]") | 915 | TEST_SUPPORTED(__inst_thumb32(0xf837f000) " @ pldw [r7, r0]") |
| 915 | TEST_SUPPORTED(".short 0xf838,0xf03c @ pldw [r8, r12, lsl #3]"); | 916 | TEST_SUPPORTED(__inst_thumb32(0xf838f03c) " @ pldw [r8, r12, lsl #3]"); |
| 916 | TEST_RR("pli [r",12,0b,", r",0, 16,"]") | 917 | TEST_RR("pli [r",12,0b,", r",0, 16,"]") |
| 917 | TEST_RR("pli [r",0, 0b,", r",12,16,", lsl #3]") | 918 | TEST_RR("pli [r",0, 0b,", r",12,16,", lsl #3]") |
| 918 | TEST_R( "pld [sp, r",1, 16,"]") | 919 | TEST_R( "pld [sp, r",1, 16,"]") |
| 919 | TEST_UNSUPPORTED(".short 0xf817,0xf00d @pld [r7, sp]") | 920 | TEST_UNSUPPORTED(__inst_thumb32(0xf817f00d) " @pld [r7, sp]") |
| 920 | TEST_UNSUPPORTED(".short 0xf817,0xf00f @pld [r7, pc]") | 921 | TEST_UNSUPPORTED(__inst_thumb32(0xf817f00f) " @pld [r7, pc]") |
| 921 | 922 | ||
| 922 | TEST_GROUP("Data-processing (register)") | 923 | TEST_GROUP("Data-processing (register)") |
| 923 | 924 | ||
| @@ -934,21 +935,21 @@ CONDITION_INSTRUCTIONS(22, | |||
| 934 | SHIFTS32("ror") | 935 | SHIFTS32("ror") |
| 935 | SHIFTS32("rors") | 936 | SHIFTS32("rors") |
| 936 | 937 | ||
| 937 | TEST_UNSUPPORTED(".short 0xfa01,0xff02 @ lsl pc, r1, r2") | 938 | TEST_UNSUPPORTED(__inst_thumb32(0xfa01ff02) " @ lsl pc, r1, r2") |
| 938 | TEST_UNSUPPORTED(".short 0xfa01,0xfd02 @ lsl sp, r1, r2") | 939 | TEST_UNSUPPORTED(__inst_thumb32(0xfa01fd02) " @ lsl sp, r1, r2") |
| 939 | TEST_UNSUPPORTED(".short 0xfa0f,0xf002 @ lsl r0, pc, r2") | 940 | TEST_UNSUPPORTED(__inst_thumb32(0xfa0ff002) " @ lsl r0, pc, r2") |
| 940 | TEST_UNSUPPORTED(".short 0xfa0d,0xf002 @ lsl r0, sp, r2") | 941 | TEST_UNSUPPORTED(__inst_thumb32(0xfa0df002) " @ lsl r0, sp, r2") |
| 941 | TEST_UNSUPPORTED(".short 0xfa01,0xf00f @ lsl r0, r1, pc") | 942 | TEST_UNSUPPORTED(__inst_thumb32(0xfa01f00f) " @ lsl r0, r1, pc") |
| 942 | TEST_UNSUPPORTED(".short 0xfa01,0xf00d @ lsl r0, r1, sp") | 943 | TEST_UNSUPPORTED(__inst_thumb32(0xfa01f00d) " @ lsl r0, r1, sp") |
| 943 | 944 | ||
| 944 | TEST_RR( "sxtah r0, r",0, HH1,", r",1, HH2,"") | 945 | TEST_RR( "sxtah r0, r",0, HH1,", r",1, HH2,"") |
| 945 | TEST_RR( "sxtah r14,r",12, HH2,", r",10,HH1,", ror #8") | 946 | TEST_RR( "sxtah r14,r",12, HH2,", r",10,HH1,", ror #8") |
| 946 | TEST_R( "sxth r8, r",7, HH1,"") | 947 | TEST_R( "sxth r8, r",7, HH1,"") |
| 947 | 948 | ||
| 948 | TEST_UNSUPPORTED(".short 0xfa0f,0xff87 @ sxth pc, r7"); | 949 | TEST_UNSUPPORTED(__inst_thumb32(0xfa0fff87) " @ sxth pc, r7"); |
| 949 | TEST_UNSUPPORTED(".short 0xfa0f,0xfd87 @ sxth sp, r7"); | 950 | TEST_UNSUPPORTED(__inst_thumb32(0xfa0ffd87) " @ sxth sp, r7"); |
| 950 | TEST_UNSUPPORTED(".short 0xfa0f,0xf88f @ sxth r8, pc"); | 951 | TEST_UNSUPPORTED(__inst_thumb32(0xfa0ff88f) " @ sxth r8, pc"); |
| 951 | TEST_UNSUPPORTED(".short 0xfa0f,0xf88d @ sxth r8, sp"); | 952 | TEST_UNSUPPORTED(__inst_thumb32(0xfa0ff88d) " @ sxth r8, sp"); |
| 952 | 953 | ||
| 953 | TEST_RR( "uxtah r0, r",0, HH1,", r",1, HH2,"") | 954 | TEST_RR( "uxtah r0, r",0, HH1,", r",1, HH2,"") |
| 954 | TEST_RR( "uxtah r14,r",12, HH2,", r",10,HH1,", ror #8") | 955 | TEST_RR( "uxtah r14,r",12, HH2,", r",10,HH1,", ror #8") |
| @@ -970,8 +971,8 @@ CONDITION_INSTRUCTIONS(22, | |||
| 970 | TEST_RR( "uxtab r14,r",12, HH2,", r",10,HH1,", ror #8") | 971 | TEST_RR( "uxtab r14,r",12, HH2,", r",10,HH1,", ror #8") |
| 971 | TEST_R( "uxtb r8, r",7, HH1,"") | 972 | TEST_R( "uxtb r8, r",7, HH1,"") |
| 972 | 973 | ||
| 973 | TEST_UNSUPPORTED(".short 0xfa60,0x00f0") | 974 | TEST_UNSUPPORTED(__inst_thumb32(0xfa6000f0) "") |
| 974 | TEST_UNSUPPORTED(".short 0xfa7f,0xffff") | 975 | TEST_UNSUPPORTED(__inst_thumb32(0xfa7fffff) "") |
| 975 | 976 | ||
| 976 | #define PARALLEL_ADD_SUB(op) \ | 977 | #define PARALLEL_ADD_SUB(op) \ |
| 977 | TEST_RR( op"add16 r0, r",0, HH1,", r",1, HH2,"") \ | 978 | TEST_RR( op"add16 r0, r",0, HH1,", r",1, HH2,"") \ |
| @@ -1019,10 +1020,10 @@ CONDITION_INSTRUCTIONS(22, | |||
| 1019 | TEST_R("revsh.w r0, r",0, VAL1,"") | 1020 | TEST_R("revsh.w r0, r",0, VAL1,"") |
| 1020 | TEST_R("revsh r14, r",12, VAL2,"") | 1021 | TEST_R("revsh r14, r",12, VAL2,"") |
| 1021 | 1022 | ||
| 1022 | TEST_UNSUPPORTED(".short 0xfa9c,0xff8c @ rev pc, r12"); | 1023 | TEST_UNSUPPORTED(__inst_thumb32(0xfa9cff8c) " @ rev pc, r12"); |
| 1023 | TEST_UNSUPPORTED(".short 0xfa9c,0xfd8c @ rev sp, r12"); | 1024 | TEST_UNSUPPORTED(__inst_thumb32(0xfa9cfd8c) " @ rev sp, r12"); |
| 1024 | TEST_UNSUPPORTED(".short 0xfa9f,0xfe8f @ rev r14, pc"); | 1025 | TEST_UNSUPPORTED(__inst_thumb32(0xfa9ffe8f) " @ rev r14, pc"); |
| 1025 | TEST_UNSUPPORTED(".short 0xfa9d,0xfe8d @ rev r14, sp"); | 1026 | TEST_UNSUPPORTED(__inst_thumb32(0xfa9dfe8d) " @ rev r14, sp"); |
| 1026 | 1027 | ||
| 1027 | TEST_RR("sel r0, r",0, VAL1,", r",1, VAL2,"") | 1028 | TEST_RR("sel r0, r",0, VAL1,", r",1, VAL2,"") |
| 1028 | TEST_RR("sel r14, r",12,VAL1,", r",10, VAL2,"") | 1029 | TEST_RR("sel r14, r",12,VAL1,", r",10, VAL2,"") |
| @@ -1031,31 +1032,31 @@ CONDITION_INSTRUCTIONS(22, | |||
| 1031 | TEST_R("clz r7, r",14,0x1,"") | 1032 | TEST_R("clz r7, r",14,0x1,"") |
| 1032 | TEST_R("clz lr, r",7, 0xffffffff,"") | 1033 | TEST_R("clz lr, r",7, 0xffffffff,"") |
| 1033 | 1034 | ||
| 1034 | TEST_UNSUPPORTED(".short 0xfa80,0xf030") /* Unallocated space */ | 1035 | TEST_UNSUPPORTED(__inst_thumb32(0xfa80f030) "") /* Unallocated space */ |
| 1035 | TEST_UNSUPPORTED(".short 0xfaff,0xff7f") /* Unallocated space */ | 1036 | TEST_UNSUPPORTED(__inst_thumb32(0xfaffff7f) "") /* Unallocated space */ |
| 1036 | TEST_UNSUPPORTED(".short 0xfab0,0xf000") /* Unallocated space */ | 1037 | TEST_UNSUPPORTED(__inst_thumb32(0xfab0f000) "") /* Unallocated space */ |
| 1037 | TEST_UNSUPPORTED(".short 0xfaff,0xff7f") /* Unallocated space */ | 1038 | TEST_UNSUPPORTED(__inst_thumb32(0xfaffff7f) "") /* Unallocated space */ |
| 1038 | 1039 | ||
| 1039 | TEST_GROUP("Multiply, multiply accumulate, and absolute difference operations") | 1040 | TEST_GROUP("Multiply, multiply accumulate, and absolute difference operations") |
| 1040 | 1041 | ||
| 1041 | TEST_RR( "mul r0, r",1, VAL1,", r",2, VAL2,"") | 1042 | TEST_RR( "mul r0, r",1, VAL1,", r",2, VAL2,"") |
| 1042 | TEST_RR( "mul r7, r",8, VAL2,", r",9, VAL2,"") | 1043 | TEST_RR( "mul r7, r",8, VAL2,", r",9, VAL2,"") |
| 1043 | TEST_UNSUPPORTED(".short 0xfb08,0xff09 @ mul pc, r8, r9") | 1044 | TEST_UNSUPPORTED(__inst_thumb32(0xfb08ff09) " @ mul pc, r8, r9") |
| 1044 | TEST_UNSUPPORTED(".short 0xfb08,0xfd09 @ mul sp, r8, r9") | 1045 | TEST_UNSUPPORTED(__inst_thumb32(0xfb08fd09) " @ mul sp, r8, r9") |
| 1045 | TEST_UNSUPPORTED(".short 0xfb0f,0xf709 @ mul r7, pc, r9") | 1046 | TEST_UNSUPPORTED(__inst_thumb32(0xfb0ff709) " @ mul r7, pc, r9") |
| 1046 | TEST_UNSUPPORTED(".short 0xfb0d,0xf709 @ mul r7, sp, r9") | 1047 | TEST_UNSUPPORTED(__inst_thumb32(0xfb0df709) " @ mul r7, sp, r9") |
| 1047 | TEST_UNSUPPORTED(".short 0xfb08,0xf70f @ mul r7, r8, pc") | 1048 | TEST_UNSUPPORTED(__inst_thumb32(0xfb08f70f) " @ mul r7, r8, pc") |
| 1048 | TEST_UNSUPPORTED(".short 0xfb08,0xf70d @ mul r7, r8, sp") | 1049 | TEST_UNSUPPORTED(__inst_thumb32(0xfb08f70d) " @ mul r7, r8, sp") |
| 1049 | 1050 | ||
| 1050 | TEST_RRR( "mla r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") | 1051 | TEST_RRR( "mla r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") |
| 1051 | TEST_RRR( "mla r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") | 1052 | TEST_RRR( "mla r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") |
| 1052 | TEST_UNSUPPORTED(".short 0xfb08,0xaf09 @ mla pc, r8, r9, r10"); | 1053 | TEST_UNSUPPORTED(__inst_thumb32(0xfb08af09) " @ mla pc, r8, r9, r10"); |
| 1053 | TEST_UNSUPPORTED(".short 0xfb08,0xad09 @ mla sp, r8, r9, r10"); | 1054 | TEST_UNSUPPORTED(__inst_thumb32(0xfb08ad09) " @ mla sp, r8, r9, r10"); |
| 1054 | TEST_UNSUPPORTED(".short 0xfb0f,0xa709 @ mla r7, pc, r9, r10"); | 1055 | TEST_UNSUPPORTED(__inst_thumb32(0xfb0fa709) " @ mla r7, pc, r9, r10"); |
| 1055 | TEST_UNSUPPORTED(".short 0xfb0d,0xa709 @ mla r7, sp, r9, r10"); | 1056 | TEST_UNSUPPORTED(__inst_thumb32(0xfb0da709) " @ mla r7, sp, r9, r10"); |
| 1056 | TEST_UNSUPPORTED(".short 0xfb08,0xa70f @ mla r7, r8, pc, r10"); | 1057 | TEST_UNSUPPORTED(__inst_thumb32(0xfb08a70f) " @ mla r7, r8, pc, r10"); |
| 1057 | TEST_UNSUPPORTED(".short 0xfb08,0xa70d @ mla r7, r8, sp, r10"); | 1058 | TEST_UNSUPPORTED(__inst_thumb32(0xfb08a70d) " @ mla r7, r8, sp, r10"); |
| 1058 | TEST_UNSUPPORTED(".short 0xfb08,0xd709 @ mla r7, r8, r9, sp"); | 1059 | TEST_UNSUPPORTED(__inst_thumb32(0xfb08d709) " @ mla r7, r8, r9, sp"); |
| 1059 | 1060 | ||
| 1060 | TEST_RRR( "mls r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") | 1061 | TEST_RRR( "mls r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") |
| 1061 | TEST_RRR( "mls r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") | 1062 | TEST_RRR( "mls r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") |
| @@ -1123,25 +1124,25 @@ CONDITION_INSTRUCTIONS(22, | |||
| 1123 | TEST_RR( "usad8 r0, r",0, VAL1,", r",1, VAL2,"") | 1124 | TEST_RR( "usad8 r0, r",0, VAL1,", r",1, VAL2,"") |
| 1124 | TEST_RR( "usad8 r14, r",12,VAL2,", r",10,VAL1,"") | 1125 | TEST_RR( "usad8 r14, r",12,VAL2,", r",10,VAL1,"") |
| 1125 | 1126 | ||
| 1126 | TEST_UNSUPPORTED(".short 0xfb00,0xf010") /* Unallocated space */ | 1127 | TEST_UNSUPPORTED(__inst_thumb32(0xfb00f010) "") /* Unallocated space */ |
| 1127 | TEST_UNSUPPORTED(".short 0xfb0f,0xff1f") /* Unallocated space */ | 1128 | TEST_UNSUPPORTED(__inst_thumb32(0xfb0fff1f) "") /* Unallocated space */ |
| 1128 | TEST_UNSUPPORTED(".short 0xfb70,0xf010") /* Unallocated space */ | 1129 | TEST_UNSUPPORTED(__inst_thumb32(0xfb70f010) "") /* Unallocated space */ |
| 1129 | TEST_UNSUPPORTED(".short 0xfb7f,0xff1f") /* Unallocated space */ | 1130 | TEST_UNSUPPORTED(__inst_thumb32(0xfb7fff1f) "") /* Unallocated space */ |
| 1130 | TEST_UNSUPPORTED(".short 0xfb70,0x0010") /* Unallocated space */ | 1131 | TEST_UNSUPPORTED(__inst_thumb32(0xfb700010) "") /* Unallocated space */ |
| 1131 | TEST_UNSUPPORTED(".short 0xfb7f,0xff1f") /* Unallocated space */ | 1132 | TEST_UNSUPPORTED(__inst_thumb32(0xfb7fff1f) "") /* Unallocated space */ |
| 1132 | 1133 | ||
| 1133 | TEST_GROUP("Long multiply, long multiply accumulate, and divide") | 1134 | TEST_GROUP("Long multiply, long multiply accumulate, and divide") |
| 1134 | 1135 | ||
| 1135 | TEST_RR( "smull r0, r1, r",2, VAL1,", r",3, VAL2,"") | 1136 | TEST_RR( "smull r0, r1, r",2, VAL1,", r",3, VAL2,"") |
| 1136 | TEST_RR( "smull r7, r8, r",9, VAL2,", r",10, VAL1,"") | 1137 | TEST_RR( "smull r7, r8, r",9, VAL2,", r",10, VAL1,"") |
| 1137 | TEST_UNSUPPORTED(".short 0xfb89,0xf80a @ smull pc, r8, r9, r10"); | 1138 | TEST_UNSUPPORTED(__inst_thumb32(0xfb89f80a) " @ smull pc, r8, r9, r10"); |
| 1138 | TEST_UNSUPPORTED(".short 0xfb89,0xd80a @ smull sp, r8, r9, r10"); | 1139 | TEST_UNSUPPORTED(__inst_thumb32(0xfb89d80a) " @ smull sp, r8, r9, r10"); |
| 1139 | TEST_UNSUPPORTED(".short 0xfb89,0x7f0a @ smull r7, pc, r9, r10"); | 1140 | TEST_UNSUPPORTED(__inst_thumb32(0xfb897f0a) " @ smull r7, pc, r9, r10"); |
| 1140 | TEST_UNSUPPORTED(".short 0xfb89,0x7d0a @ smull r7, sp, r9, r10"); | 1141 | TEST_UNSUPPORTED(__inst_thumb32(0xfb897d0a) " @ smull r7, sp, r9, r10"); |
| 1141 | TEST_UNSUPPORTED(".short 0xfb8f,0x780a @ smull r7, r8, pc, r10"); | 1142 | TEST_UNSUPPORTED(__inst_thumb32(0xfb8f780a) " @ smull r7, r8, pc, r10"); |
| 1142 | TEST_UNSUPPORTED(".short 0xfb8d,0x780a @ smull r7, r8, sp, r10"); | 1143 | TEST_UNSUPPORTED(__inst_thumb32(0xfb8d780a) " @ smull r7, r8, sp, r10"); |
| 1143 | TEST_UNSUPPORTED(".short 0xfb89,0x780f @ smull r7, r8, r9, pc"); | 1144 | TEST_UNSUPPORTED(__inst_thumb32(0xfb89780f) " @ smull r7, r8, r9, pc"); |
| 1144 | TEST_UNSUPPORTED(".short 0xfb89,0x780d @ smull r7, r8, r9, sp"); | 1145 | TEST_UNSUPPORTED(__inst_thumb32(0xfb89780d) " @ smull r7, r8, r9, sp"); |
| 1145 | 1146 | ||
| 1146 | TEST_RR( "umull r0, r1, r",2, VAL1,", r",3, VAL2,"") | 1147 | TEST_RR( "umull r0, r1, r",2, VAL1,", r",3, VAL2,"") |
| 1147 | TEST_RR( "umull r7, r8, r",9, VAL2,", r",10, VAL1,"") | 1148 | TEST_RR( "umull r7, r8, r",9, VAL2,", r",10, VAL1,"") |
| @@ -1175,8 +1176,8 @@ CONDITION_INSTRUCTIONS(22, | |||
| 1175 | 1176 | ||
| 1176 | TEST_GROUP("Coprocessor instructions") | 1177 | TEST_GROUP("Coprocessor instructions") |
| 1177 | 1178 | ||
| 1178 | TEST_UNSUPPORTED(".short 0xfc00,0x0000") | 1179 | TEST_UNSUPPORTED(__inst_thumb32(0xfc000000) "") |
| 1179 | TEST_UNSUPPORTED(".short 0xffff,0xffff") | 1180 | TEST_UNSUPPORTED(__inst_thumb32(0xffffffff) "") |
| 1180 | 1181 | ||
| 1181 | TEST_GROUP("Testing instructions in IT blocks") | 1182 | TEST_GROUP("Testing instructions in IT blocks") |
| 1182 | 1183 | ||
diff --git a/arch/arm/kernel/kprobes-test.c b/arch/arm/kernel/kprobes-test.c index c2fd06b4c389..379639998d5a 100644 --- a/arch/arm/kernel/kprobes-test.c +++ b/arch/arm/kernel/kprobes-test.c | |||
| @@ -113,7 +113,7 @@ | |||
| 113 | * @ start of inline data... | 113 | * @ start of inline data... |
| 114 | * .ascii "mov r0, r7" @ text title for test case | 114 | * .ascii "mov r0, r7" @ text title for test case |
| 115 | * .byte 0 | 115 | * .byte 0 |
| 116 | * .align 2 | 116 | * .align 2, 0 |
| 117 | * | 117 | * |
| 118 | * @ TEST_ARG_REG | 118 | * @ TEST_ARG_REG |
| 119 | * .byte ARG_TYPE_REG | 119 | * .byte ARG_TYPE_REG |
| @@ -1333,7 +1333,8 @@ static void test_case_failed(const char *message) | |||
| 1333 | static unsigned long next_instruction(unsigned long pc) | 1333 | static unsigned long next_instruction(unsigned long pc) |
| 1334 | { | 1334 | { |
| 1335 | #ifdef CONFIG_THUMB2_KERNEL | 1335 | #ifdef CONFIG_THUMB2_KERNEL |
| 1336 | if ((pc & 1) && !is_wide_instruction(*(u16 *)(pc - 1))) | 1336 | if ((pc & 1) && |
| 1337 | !is_wide_instruction(__mem_to_opcode_thumb16(*(u16 *)(pc - 1)))) | ||
| 1337 | return pc + 2; | 1338 | return pc + 2; |
| 1338 | else | 1339 | else |
| 1339 | #endif | 1340 | #endif |
| @@ -1378,13 +1379,13 @@ static uintptr_t __used kprobes_test_case_start(const char *title, void *stack) | |||
| 1378 | 1379 | ||
| 1379 | if (test_case_is_thumb) { | 1380 | if (test_case_is_thumb) { |
| 1380 | u16 *p = (u16 *)(test_code & ~1); | 1381 | u16 *p = (u16 *)(test_code & ~1); |
| 1381 | current_instruction = p[0]; | 1382 | current_instruction = __mem_to_opcode_thumb16(p[0]); |
| 1382 | if (is_wide_instruction(current_instruction)) { | 1383 | if (is_wide_instruction(current_instruction)) { |
| 1383 | current_instruction <<= 16; | 1384 | u16 instr2 = __mem_to_opcode_thumb16(p[1]); |
| 1384 | current_instruction |= p[1]; | 1385 | current_instruction = __opcode_thumb32_compose(current_instruction, instr2); |
| 1385 | } | 1386 | } |
| 1386 | } else { | 1387 | } else { |
| 1387 | current_instruction = *(u32 *)test_code; | 1388 | current_instruction = __mem_to_opcode_arm(*(u32 *)test_code); |
| 1388 | } | 1389 | } |
| 1389 | 1390 | ||
| 1390 | if (current_title[0] == '.') | 1391 | if (current_title[0] == '.') |
diff --git a/arch/arm/kernel/kprobes-test.h b/arch/arm/kernel/kprobes-test.h index e28a869b1ae4..eecc90a0fd91 100644 --- a/arch/arm/kernel/kprobes-test.h +++ b/arch/arm/kernel/kprobes-test.h | |||
| @@ -115,7 +115,7 @@ struct test_arg_end { | |||
| 115 | /* multiple strings to be concatenated. */ \ | 115 | /* multiple strings to be concatenated. */ \ |
| 116 | ".ascii "#title" \n\t" \ | 116 | ".ascii "#title" \n\t" \ |
| 117 | ".byte 0 \n\t" \ | 117 | ".byte 0 \n\t" \ |
| 118 | ".align 2 \n\t" | 118 | ".align 2, 0 \n\t" |
| 119 | 119 | ||
| 120 | #define TEST_ARG_REG(reg, val) \ | 120 | #define TEST_ARG_REG(reg, val) \ |
| 121 | ".byte "__stringify(ARG_TYPE_REG)" \n\t" \ | 121 | ".byte "__stringify(ARG_TYPE_REG)" \n\t" \ |
diff --git a/arch/arm/kernel/kprobes-thumb.c b/arch/arm/kernel/kprobes-thumb.c index 6619188619ae..9495d7f3516f 100644 --- a/arch/arm/kernel/kprobes-thumb.c +++ b/arch/arm/kernel/kprobes-thumb.c | |||
| @@ -149,9 +149,9 @@ t32_decode_ldmstm(probes_opcode_t insn, struct arch_probes_insn *asi, | |||
| 149 | enum probes_insn ret = kprobe_decode_ldmstm(insn, asi, d); | 149 | enum probes_insn ret = kprobe_decode_ldmstm(insn, asi, d); |
| 150 | 150 | ||
| 151 | /* Fixup modified instruction to have halfwords in correct order...*/ | 151 | /* Fixup modified instruction to have halfwords in correct order...*/ |
| 152 | insn = asi->insn[0]; | 152 | insn = __mem_to_opcode_arm(asi->insn[0]); |
| 153 | ((u16 *)asi->insn)[0] = insn >> 16; | 153 | ((u16 *)asi->insn)[0] = __opcode_to_mem_thumb16(insn >> 16); |
| 154 | ((u16 *)asi->insn)[1] = insn & 0xffff; | 154 | ((u16 *)asi->insn)[1] = __opcode_to_mem_thumb16(insn & 0xffff); |
| 155 | 155 | ||
| 156 | return ret; | 156 | return ret; |
| 157 | } | 157 | } |
| @@ -516,7 +516,7 @@ t16_decode_hiregs(probes_opcode_t insn, struct arch_probes_insn *asi, | |||
| 516 | { | 516 | { |
| 517 | insn &= ~0x00ff; | 517 | insn &= ~0x00ff; |
| 518 | insn |= 0x001; /* Set Rdn = R1 and Rm = R0 */ | 518 | insn |= 0x001; /* Set Rdn = R1 and Rm = R0 */ |
| 519 | ((u16 *)asi->insn)[0] = insn; | 519 | ((u16 *)asi->insn)[0] = __opcode_to_mem_thumb16(insn); |
| 520 | asi->insn_handler = t16_emulate_hiregs; | 520 | asi->insn_handler = t16_emulate_hiregs; |
| 521 | return INSN_GOOD; | 521 | return INSN_GOOD; |
| 522 | } | 522 | } |
| @@ -547,8 +547,10 @@ t16_decode_push(probes_opcode_t insn, struct arch_probes_insn *asi, | |||
| 547 | * and call it with R9=SP and LR in the register list represented | 547 | * and call it with R9=SP and LR in the register list represented |
| 548 | * by R8. | 548 | * by R8. |
| 549 | */ | 549 | */ |
| 550 | ((u16 *)asi->insn)[0] = 0xe929; /* 1st half STMDB R9!,{} */ | 550 | /* 1st half STMDB R9!,{} */ |
| 551 | ((u16 *)asi->insn)[1] = insn & 0x1ff; /* 2nd half (register list) */ | 551 | ((u16 *)asi->insn)[0] = __opcode_to_mem_thumb16(0xe929); |
| 552 | /* 2nd half (register list) */ | ||
| 553 | ((u16 *)asi->insn)[1] = __opcode_to_mem_thumb16(insn & 0x1ff); | ||
| 552 | asi->insn_handler = t16_emulate_push; | 554 | asi->insn_handler = t16_emulate_push; |
| 553 | return INSN_GOOD; | 555 | return INSN_GOOD; |
| 554 | } | 556 | } |
| @@ -600,8 +602,10 @@ t16_decode_pop(probes_opcode_t insn, struct arch_probes_insn *asi, | |||
| 600 | * and call it with R9=SP and PC in the register list represented | 602 | * and call it with R9=SP and PC in the register list represented |
| 601 | * by R8. | 603 | * by R8. |
| 602 | */ | 604 | */ |
| 603 | ((u16 *)asi->insn)[0] = 0xe8b9; /* 1st half LDMIA R9!,{} */ | 605 | /* 1st half LDMIA R9!,{} */ |
| 604 | ((u16 *)asi->insn)[1] = insn & 0x1ff; /* 2nd half (register list) */ | 606 | ((u16 *)asi->insn)[0] = __opcode_to_mem_thumb16(0xe8b9); |
| 607 | /* 2nd half (register list) */ | ||
| 608 | ((u16 *)asi->insn)[1] = __opcode_to_mem_thumb16(insn & 0x1ff); | ||
| 605 | asi->insn_handler = insn & 0x100 ? t16_emulate_pop_pc | 609 | asi->insn_handler = insn & 0x100 ? t16_emulate_pop_pc |
| 606 | : t16_emulate_pop_nopc; | 610 | : t16_emulate_pop_nopc; |
| 607 | return INSN_GOOD; | 611 | return INSN_GOOD; |
diff --git a/arch/arm/kernel/kprobes.c b/arch/arm/kernel/kprobes.c index 8795f9f819d5..6d644202c8dc 100644 --- a/arch/arm/kernel/kprobes.c +++ b/arch/arm/kernel/kprobes.c | |||
| @@ -26,6 +26,7 @@ | |||
| 26 | #include <linux/stop_machine.h> | 26 | #include <linux/stop_machine.h> |
| 27 | #include <linux/stringify.h> | 27 | #include <linux/stringify.h> |
| 28 | #include <asm/traps.h> | 28 | #include <asm/traps.h> |
| 29 | #include <asm/opcodes.h> | ||
| 29 | #include <asm/cacheflush.h> | 30 | #include <asm/cacheflush.h> |
| 30 | #include <linux/percpu.h> | 31 | #include <linux/percpu.h> |
| 31 | #include <linux/bug.h> | 32 | #include <linux/bug.h> |
| @@ -67,10 +68,10 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p) | |||
| 67 | #ifdef CONFIG_THUMB2_KERNEL | 68 | #ifdef CONFIG_THUMB2_KERNEL |
| 68 | thumb = true; | 69 | thumb = true; |
| 69 | addr &= ~1; /* Bit 0 would normally be set to indicate Thumb code */ | 70 | addr &= ~1; /* Bit 0 would normally be set to indicate Thumb code */ |
| 70 | insn = ((u16 *)addr)[0]; | 71 | insn = __mem_to_opcode_thumb16(((u16 *)addr)[0]); |
| 71 | if (is_wide_instruction(insn)) { | 72 | if (is_wide_instruction(insn)) { |
| 72 | insn <<= 16; | 73 | u16 inst2 = __mem_to_opcode_thumb16(((u16 *)addr)[1]); |
| 73 | insn |= ((u16 *)addr)[1]; | 74 | insn = __opcode_thumb32_compose(insn, inst2); |
| 74 | decode_insn = thumb32_probes_decode_insn; | 75 | decode_insn = thumb32_probes_decode_insn; |
| 75 | actions = kprobes_t32_actions; | 76 | actions = kprobes_t32_actions; |
| 76 | } else { | 77 | } else { |
| @@ -81,7 +82,7 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p) | |||
| 81 | thumb = false; | 82 | thumb = false; |
| 82 | if (addr & 0x3) | 83 | if (addr & 0x3) |
| 83 | return -EINVAL; | 84 | return -EINVAL; |
| 84 | insn = *p->addr; | 85 | insn = __mem_to_opcode_arm(*p->addr); |
| 85 | decode_insn = arm_probes_decode_insn; | 86 | decode_insn = arm_probes_decode_insn; |
| 86 | actions = kprobes_arm_actions; | 87 | actions = kprobes_arm_actions; |
| 87 | #endif | 88 | #endif |
diff --git a/arch/arm/kernel/pj4-cp0.c b/arch/arm/kernel/pj4-cp0.c index 679cf4d18c08..fc7208636284 100644 --- a/arch/arm/kernel/pj4-cp0.c +++ b/arch/arm/kernel/pj4-cp0.c | |||
| @@ -17,6 +17,7 @@ | |||
| 17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
| 18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
| 19 | #include <asm/thread_notify.h> | 19 | #include <asm/thread_notify.h> |
| 20 | #include <asm/cputype.h> | ||
| 20 | 21 | ||
| 21 | static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t) | 22 | static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t) |
| 22 | { | 23 | { |
| @@ -80,6 +81,9 @@ static int __init pj4_cp0_init(void) | |||
| 80 | { | 81 | { |
| 81 | u32 cp_access; | 82 | u32 cp_access; |
| 82 | 83 | ||
| 84 | if (!cpu_is_pj4()) | ||
| 85 | return 0; | ||
| 86 | |||
| 83 | cp_access = pj4_cp_access_read() & ~0xf; | 87 | cp_access = pj4_cp_access_read() & ~0xf; |
| 84 | pj4_cp_access_write(cp_access); | 88 | pj4_cp_access_write(cp_access); |
| 85 | 89 | ||
diff --git a/arch/arm/kernel/probes.c b/arch/arm/kernel/probes.c index b41873f33e69..a8ab540d7e73 100644 --- a/arch/arm/kernel/probes.c +++ b/arch/arm/kernel/probes.c | |||
| @@ -202,13 +202,14 @@ prepare_emulated_insn(probes_opcode_t insn, struct arch_probes_insn *asi, | |||
| 202 | #ifdef CONFIG_THUMB2_KERNEL | 202 | #ifdef CONFIG_THUMB2_KERNEL |
| 203 | if (thumb) { | 203 | if (thumb) { |
| 204 | u16 *thumb_insn = (u16 *)asi->insn; | 204 | u16 *thumb_insn = (u16 *)asi->insn; |
| 205 | thumb_insn[1] = 0x4770; /* Thumb bx lr */ | 205 | /* Thumb bx lr */ |
| 206 | thumb_insn[2] = 0x4770; /* Thumb bx lr */ | 206 | thumb_insn[1] = __opcode_to_mem_thumb16(0x4770); |
| 207 | thumb_insn[2] = __opcode_to_mem_thumb16(0x4770); | ||
| 207 | return insn; | 208 | return insn; |
| 208 | } | 209 | } |
| 209 | asi->insn[1] = 0xe12fff1e; /* ARM bx lr */ | 210 | asi->insn[1] = __opcode_to_mem_arm(0xe12fff1e); /* ARM bx lr */ |
| 210 | #else | 211 | #else |
| 211 | asi->insn[1] = 0xe1a0f00e; /* mov pc, lr */ | 212 | asi->insn[1] = __opcode_to_mem_arm(0xe1a0f00e); /* mov pc, lr */ |
| 212 | #endif | 213 | #endif |
| 213 | /* Make an ARM instruction unconditional */ | 214 | /* Make an ARM instruction unconditional */ |
| 214 | if (insn < 0xe0000000) | 215 | if (insn < 0xe0000000) |
| @@ -228,12 +229,12 @@ set_emulated_insn(probes_opcode_t insn, struct arch_probes_insn *asi, | |||
| 228 | if (thumb) { | 229 | if (thumb) { |
| 229 | u16 *ip = (u16 *)asi->insn; | 230 | u16 *ip = (u16 *)asi->insn; |
| 230 | if (is_wide_instruction(insn)) | 231 | if (is_wide_instruction(insn)) |
| 231 | *ip++ = insn >> 16; | 232 | *ip++ = __opcode_to_mem_thumb16(insn >> 16); |
| 232 | *ip++ = insn; | 233 | *ip++ = __opcode_to_mem_thumb16(insn); |
| 233 | return; | 234 | return; |
| 234 | } | 235 | } |
| 235 | #endif | 236 | #endif |
| 236 | asi->insn[0] = insn; | 237 | asi->insn[0] = __opcode_to_mem_arm(insn); |
| 237 | } | 238 | } |
| 238 | 239 | ||
| 239 | /* | 240 | /* |
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index 806d287e3e53..81ef686a91ca 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c | |||
| @@ -38,6 +38,7 @@ | |||
| 38 | #include <asm/processor.h> | 38 | #include <asm/processor.h> |
| 39 | #include <asm/thread_notify.h> | 39 | #include <asm/thread_notify.h> |
| 40 | #include <asm/stacktrace.h> | 40 | #include <asm/stacktrace.h> |
| 41 | #include <asm/system_misc.h> | ||
| 41 | #include <asm/mach/time.h> | 42 | #include <asm/mach/time.h> |
| 42 | #include <asm/tls.h> | 43 | #include <asm/tls.h> |
| 43 | 44 | ||
| @@ -99,7 +100,7 @@ void soft_restart(unsigned long addr) | |||
| 99 | u64 *stack = soft_restart_stack + ARRAY_SIZE(soft_restart_stack); | 100 | u64 *stack = soft_restart_stack + ARRAY_SIZE(soft_restart_stack); |
| 100 | 101 | ||
| 101 | /* Disable interrupts first */ | 102 | /* Disable interrupts first */ |
| 102 | local_irq_disable(); | 103 | raw_local_irq_disable(); |
| 103 | local_fiq_disable(); | 104 | local_fiq_disable(); |
| 104 | 105 | ||
| 105 | /* Disable the L2 if we're the last man standing. */ | 106 | /* Disable the L2 if we're the last man standing. */ |
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index 172ee18ff124..abd2fc067736 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c | |||
| @@ -445,6 +445,7 @@ die_sig: | |||
| 445 | if (user_debug & UDBG_UNDEFINED) { | 445 | if (user_debug & UDBG_UNDEFINED) { |
| 446 | printk(KERN_INFO "%s (%d): undefined instruction: pc=%p\n", | 446 | printk(KERN_INFO "%s (%d): undefined instruction: pc=%p\n", |
| 447 | current->comm, task_pid_nr(current), pc); | 447 | current->comm, task_pid_nr(current), pc); |
| 448 | __show_regs(regs); | ||
| 448 | dump_instr(KERN_INFO, regs); | 449 | dump_instr(KERN_INFO, regs); |
| 449 | } | 450 | } |
| 450 | #endif | 451 | #endif |
diff --git a/arch/arm/mach-vexpress/dcscb.c b/arch/arm/mach-vexpress/dcscb.c index 14d499688736..788495d35cf9 100644 --- a/arch/arm/mach-vexpress/dcscb.c +++ b/arch/arm/mach-vexpress/dcscb.c | |||
| @@ -137,11 +137,16 @@ static void dcscb_power_down(void) | |||
| 137 | v7_exit_coherency_flush(all); | 137 | v7_exit_coherency_flush(all); |
| 138 | 138 | ||
| 139 | /* | 139 | /* |
| 140 | * This is a harmless no-op. On platforms with a real | 140 | * A full outer cache flush could be needed at this point |
| 141 | * outer cache this might either be needed or not, | 141 | * on platforms with such a cache, depending on where the |
| 142 | * depending on where the outer cache sits. | 142 | * outer cache sits. In some cases the notion of a "last |
| 143 | * cluster standing" would need to be implemented if the | ||
| 144 | * outer cache is shared across clusters. In any case, when | ||
| 145 | * the outer cache needs flushing, there is no concurrent | ||
| 146 | * access to the cache controller to worry about and no | ||
| 147 | * special locking besides what is already provided by the | ||
| 148 | * MCPM state machinery is needed. | ||
| 143 | */ | 149 | */ |
| 144 | outer_flush_all(); | ||
| 145 | 150 | ||
| 146 | /* | 151 | /* |
| 147 | * Disable cluster-level coherency by masking | 152 | * Disable cluster-level coherency by masking |
diff --git a/arch/arm/mm/dump.c b/arch/arm/mm/dump.c index ef69152f9b52..c508f41a43bc 100644 --- a/arch/arm/mm/dump.c +++ b/arch/arm/mm/dump.c | |||
| @@ -120,34 +120,51 @@ static const struct prot_bits pte_bits[] = { | |||
| 120 | }; | 120 | }; |
| 121 | 121 | ||
| 122 | static const struct prot_bits section_bits[] = { | 122 | static const struct prot_bits section_bits[] = { |
| 123 | #ifndef CONFIG_ARM_LPAE | 123 | #ifdef CONFIG_ARM_LPAE |
| 124 | /* These are approximate */ | 124 | { |
| 125 | .mask = PMD_SECT_USER, | ||
| 126 | .val = PMD_SECT_USER, | ||
| 127 | .set = "USR", | ||
| 128 | }, { | ||
| 129 | .mask = PMD_SECT_RDONLY, | ||
| 130 | .val = PMD_SECT_RDONLY, | ||
| 131 | .set = "ro", | ||
| 132 | .clear = "RW", | ||
| 133 | #elif __LINUX_ARM_ARCH__ >= 6 | ||
| 125 | { | 134 | { |
| 126 | .mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, | 135 | .mask = PMD_SECT_APX | PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, |
| 127 | .val = 0, | 136 | .val = PMD_SECT_APX | PMD_SECT_AP_WRITE, |
| 128 | .set = " ro", | 137 | .set = " ro", |
| 129 | }, { | 138 | }, { |
| 130 | .mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, | 139 | .mask = PMD_SECT_APX | PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, |
| 131 | .val = PMD_SECT_AP_WRITE, | 140 | .val = PMD_SECT_AP_WRITE, |
| 132 | .set = " RW", | 141 | .set = " RW", |
| 133 | }, { | 142 | }, { |
| 134 | .mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, | 143 | .mask = PMD_SECT_APX | PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, |
| 135 | .val = PMD_SECT_AP_READ, | 144 | .val = PMD_SECT_AP_READ, |
| 136 | .set = "USR ro", | 145 | .set = "USR ro", |
| 137 | }, { | 146 | }, { |
| 138 | .mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, | 147 | .mask = PMD_SECT_APX | PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, |
| 139 | .val = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, | 148 | .val = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, |
| 140 | .set = "USR RW", | 149 | .set = "USR RW", |
| 141 | #else | 150 | #else /* ARMv4/ARMv5 */ |
| 151 | /* These are approximate */ | ||
| 142 | { | 152 | { |
| 143 | .mask = PMD_SECT_USER, | 153 | .mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, |
| 144 | .val = PMD_SECT_USER, | 154 | .val = 0, |
| 145 | .set = "USR", | 155 | .set = " ro", |
| 146 | }, { | 156 | }, { |
| 147 | .mask = PMD_SECT_RDONLY, | 157 | .mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, |
| 148 | .val = PMD_SECT_RDONLY, | 158 | .val = PMD_SECT_AP_WRITE, |
| 149 | .set = "ro", | 159 | .set = " RW", |
| 150 | .clear = "RW", | 160 | }, { |
| 161 | .mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, | ||
| 162 | .val = PMD_SECT_AP_READ, | ||
| 163 | .set = "USR ro", | ||
| 164 | }, { | ||
| 165 | .mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, | ||
| 166 | .val = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, | ||
| 167 | .set = "USR RW", | ||
| 151 | #endif | 168 | #endif |
| 152 | }, { | 169 | }, { |
| 153 | .mask = PMD_SECT_XN, | 170 | .mask = PMD_SECT_XN, |
diff --git a/arch/arm/vfp/entry.S b/arch/arm/vfp/entry.S index 46e17492fd1f..f0759e70fb86 100644 --- a/arch/arm/vfp/entry.S +++ b/arch/arm/vfp/entry.S | |||
| @@ -8,9 +8,12 @@ | |||
| 8 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. | 9 | * published by the Free Software Foundation. |
| 10 | */ | 10 | */ |
| 11 | #include <linux/init.h> | ||
| 12 | #include <linux/linkage.h> | ||
| 11 | #include <asm/thread_info.h> | 13 | #include <asm/thread_info.h> |
| 12 | #include <asm/vfpmacros.h> | 14 | #include <asm/vfpmacros.h> |
| 13 | #include "../kernel/entry-header.S" | 15 | #include <asm/assembler.h> |
| 16 | #include <asm/asm-offsets.h> | ||
| 14 | 17 | ||
| 15 | @ VFP entry point. | 18 | @ VFP entry point. |
| 16 | @ | 19 | @ |
| @@ -22,11 +25,7 @@ | |||
| 22 | @ IRQs disabled. | 25 | @ IRQs disabled. |
| 23 | @ | 26 | @ |
| 24 | ENTRY(do_vfp) | 27 | ENTRY(do_vfp) |
| 25 | #ifdef CONFIG_PREEMPT_COUNT | 28 | inc_preempt_count r10, r4 |
| 26 | ldr r4, [r10, #TI_PREEMPT] @ get preempt count | ||
| 27 | add r11, r4, #1 @ increment it | ||
| 28 | str r11, [r10, #TI_PREEMPT] | ||
| 29 | #endif | ||
| 30 | enable_irq | 29 | enable_irq |
| 31 | ldr r4, .LCvfp | 30 | ldr r4, .LCvfp |
| 32 | ldr r11, [r10, #TI_CPU] @ CPU number | 31 | ldr r11, [r10, #TI_CPU] @ CPU number |
| @@ -35,12 +34,7 @@ ENTRY(do_vfp) | |||
| 35 | ENDPROC(do_vfp) | 34 | ENDPROC(do_vfp) |
| 36 | 35 | ||
| 37 | ENTRY(vfp_null_entry) | 36 | ENTRY(vfp_null_entry) |
| 38 | #ifdef CONFIG_PREEMPT_COUNT | 37 | dec_preempt_count_ti r10, r4 |
| 39 | get_thread_info r10 | ||
| 40 | ldr r4, [r10, #TI_PREEMPT] @ get preempt count | ||
| 41 | sub r11, r4, #1 @ decrement it | ||
| 42 | str r11, [r10, #TI_PREEMPT] | ||
| 43 | #endif | ||
| 44 | mov pc, lr | 38 | mov pc, lr |
| 45 | ENDPROC(vfp_null_entry) | 39 | ENDPROC(vfp_null_entry) |
| 46 | 40 | ||
| @@ -53,12 +47,7 @@ ENDPROC(vfp_null_entry) | |||
| 53 | 47 | ||
| 54 | __INIT | 48 | __INIT |
| 55 | ENTRY(vfp_testing_entry) | 49 | ENTRY(vfp_testing_entry) |
| 56 | #ifdef CONFIG_PREEMPT_COUNT | 50 | dec_preempt_count_ti r10, r4 |
| 57 | get_thread_info r10 | ||
| 58 | ldr r4, [r10, #TI_PREEMPT] @ get preempt count | ||
| 59 | sub r11, r4, #1 @ decrement it | ||
| 60 | str r11, [r10, #TI_PREEMPT] | ||
| 61 | #endif | ||
| 62 | ldr r0, VFP_arch_address | 51 | ldr r0, VFP_arch_address |
| 63 | str r0, [r0] @ set to non-zero value | 52 | str r0, [r0] @ set to non-zero value |
| 64 | mov pc, r9 @ we have handled the fault | 53 | mov pc, r9 @ we have handled the fault |
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index 3e5d3115a2a6..be807625ed8c 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S | |||
| @@ -14,10 +14,13 @@ | |||
| 14 | * r10 points at the start of the private FP workspace in the thread structure | 14 | * r10 points at the start of the private FP workspace in the thread structure |
| 15 | * sp points to a struct pt_regs (as defined in include/asm/proc/ptrace.h) | 15 | * sp points to a struct pt_regs (as defined in include/asm/proc/ptrace.h) |
| 16 | */ | 16 | */ |
| 17 | #include <linux/init.h> | ||
| 18 | #include <linux/linkage.h> | ||
| 17 | #include <asm/thread_info.h> | 19 | #include <asm/thread_info.h> |
| 18 | #include <asm/vfpmacros.h> | 20 | #include <asm/vfpmacros.h> |
| 19 | #include <linux/kern_levels.h> | 21 | #include <linux/kern_levels.h> |
| 20 | #include "../kernel/entry-header.S" | 22 | #include <asm/assembler.h> |
| 23 | #include <asm/asm-offsets.h> | ||
| 21 | 24 | ||
| 22 | .macro DBGSTR, str | 25 | .macro DBGSTR, str |
| 23 | #ifdef DEBUG | 26 | #ifdef DEBUG |
| @@ -179,12 +182,7 @@ vfp_hw_state_valid: | |||
| 179 | @ else it's one 32-bit instruction, so | 182 | @ else it's one 32-bit instruction, so |
| 180 | @ always subtract 4 from the following | 183 | @ always subtract 4 from the following |
| 181 | @ instruction address. | 184 | @ instruction address. |
| 182 | #ifdef CONFIG_PREEMPT_COUNT | 185 | dec_preempt_count_ti r10, r4 |
| 183 | get_thread_info r10 | ||
| 184 | ldr r4, [r10, #TI_PREEMPT] @ get preempt count | ||
| 185 | sub r11, r4, #1 @ decrement it | ||
| 186 | str r11, [r10, #TI_PREEMPT] | ||
| 187 | #endif | ||
| 188 | mov pc, r9 @ we think we have handled things | 186 | mov pc, r9 @ we think we have handled things |
| 189 | 187 | ||
| 190 | 188 | ||
| @@ -203,12 +201,7 @@ look_for_VFP_exceptions: | |||
| 203 | @ not recognised by VFP | 201 | @ not recognised by VFP |
| 204 | 202 | ||
| 205 | DBGSTR "not VFP" | 203 | DBGSTR "not VFP" |
| 206 | #ifdef CONFIG_PREEMPT_COUNT | 204 | dec_preempt_count_ti r10, r4 |
| 207 | get_thread_info r10 | ||
| 208 | ldr r4, [r10, #TI_PREEMPT] @ get preempt count | ||
| 209 | sub r11, r4, #1 @ decrement it | ||
| 210 | str r11, [r10, #TI_PREEMPT] | ||
| 211 | #endif | ||
| 212 | mov pc, lr | 205 | mov pc, lr |
| 213 | 206 | ||
| 214 | process_exception: | 207 | process_exception: |
