Merge branch 'tegra/dt' into next/dt

From Stephen Warren:
* tegra/dt:
  ARM: tegra: Use symbolic names for gr3d clocks
  ARM: tegra: Mark Tegra30 display controller compatible with Tegra20
  ARM: tegra: add GPIO controller to tegra124.dtsi
  ARM: tegra: enable LP1 suspend mode for Venice2
  ARM: tegra: enable Tegra RTC as default for Tegra124
  ARM: tegra: add Venice2 board support
  ARM: tegra: Add initial device tree for Tegra124
  ARM: tegra: add vcc supply for nct1008 to Cardhu
  ARM: tegra: add DT entry for nct1008 to Dalmore
  ARM: tegra: use dt-binding header for key code
  ARM: tegra: add palmas pincontrol to Dalmore device tree

Signed-off-by: Kevin Hilman <khilman@linaro.org>

6 files changed, 210 insertions, 9 deletions

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 56c7d82e5b8d..e1f8d9840a48 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -261,7 +261,8 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
         tegra30-beaver.dtb \
         tegra30-cardhu-a02.dtb \
         tegra30-cardhu-a04.dtb \
-        tegra114-dalmore.dtb
+        tegra114-dalmore.dtb \
+        tegra124-venice2.dtb
 dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \
         versatile-pb.dtb
 dtb-$(CONFIG_ARCH_U300) += ste-u300.dtb
diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts
index 60230288884b..cb5ec23b03a7 100644
--- a/arch/arm/boot/dts/tegra114-dalmore.dts
+++ b/arch/arm/boot/dts/tegra114-dalmore.dts
@@ -1,5 +1,6 @@
 /dts-v1/;
 
+#include <dt-bindings/input/input.h>
 #include "tegra114.dtsi"
 
 / {
@@ -738,6 +739,14 @@
                         realtek,ldo1-en-gpios =
                                 <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
                 };
+
+                temperature-sensor@4c {
+                        compatible = "onnn,nct1008";
+                        reg = <0x4c>;
+                        vcc-supply = <&palmas_ldo6_reg>;
+                        interrupt-parent = <&gpio>;
+                        interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_LEVEL_LOW>;
+                };
         };
 
         i2c@7000d000 {
@@ -947,7 +956,7 @@
                                                 regulator-max-microvolt = <1800000>;
                                         };
 
-                                        ldo6 {
+                                        palmas_ldo6_reg: ldo6 {
                                                 regulator-name = "vdd-sensor-2v85";
                                                 regulator-min-microvolt = <2850000>;
                                                 regulator-max-microvolt = <2850000>;
@@ -1011,6 +1020,19 @@
                                 interrupt-parent = <&palmas>;
                                 interrupts = <8 0>;
                         };
+
+                        pinmux {
+                                compatible = "ti,tps65913-pinctrl";
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&palmas_default>;
+
+                                palmas_default: pinmux {
+                                        pin_gpio6 {
+                                                pins = "gpio6";
+                                                function = "gpio";
+                                        };
+                                };
+                        };
                 };
         };
 
@@ -1081,26 +1103,26 @@
                 home {
                         label = "Home";
                         gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
-                        linux,code = <102>; /* KEY_HOME */
+                        linux,code = <KEY_HOME>;
                 };
 
                 power {
                         label = "Power";
                         gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
-                        linux,code = <116>; /* KEY_POWER */
+                        linux,code = <KEY_POWER>;
                         gpio-key,wakeup;
                 };
 
                 volume_down {
                         label = "Volume Down";
                         gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
-                        linux,code = <114>; /* KEY_VOLUMEDOWN */
+                        linux,code = <KEY_VOLUMEDOWN>;
                 };
 
                 volume_up {
                         label = "Volume Up";
                         gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>;
-                        linux,code = <115>; /* KEY_VOLUMEUP */
+                        linux,code = <KEY_VOLUMEUP>;
                 };
         };
 
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
new file mode 100644
index 000000000000..431d67a2b413
--- /dev/null
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -0,0 +1,27 @@
+/dts-v1/;
+
+#include "tegra124.dtsi"
+
+/ {
+        model = "NVIDIA Tegra124 Venice2";
+        compatible = "nvidia,venice2", "nvidia,tegra124";
+
+        memory {
+                reg = <0x80000000 0x80000000>;
+        };
+
+        serial@70006000 {
+                status = "okay";
+        };
+
+        pmc@7000e400 {
+                nvidia,invert-interrupt;
+                nvidia,suspend-mode = <1>;
+                nvidia,cpu-pwr-good-time = <500>;
+                nvidia,cpu-pwr-off-time = <300>;
+                nvidia,core-pwr-good-time = <641 3845>;
+                nvidia,core-pwr-off-time = <61036>;
+                nvidia,core-power-req-active-high;
+                nvidia,sys-clock-req-active-high;
+        };
+};
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
new file mode 100644
index 000000000000..b7413004ee77
--- /dev/null
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -0,0 +1,149 @@
+#include <dt-bindings/gpio/tegra-gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+#include "skeleton.dtsi"
+
+/ {
+        compatible = "nvidia,tegra124";
+        interrupt-parent = <&gic>;
+
+        gic: interrupt-controller@50041000 {
+                compatible = "arm,cortex-a15-gic";
+                #interrupt-cells = <3>;
+                interrupt-controller;
+                reg = <0x50041000 0x1000>,
+                      <0x50042000 0x1000>,
+                      <0x50044000 0x2000>,
+                      <0x50046000 0x2000>;
+                interrupts = <GIC_PPI 9
+                        (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+        };
+
+        timer@60005000 {
+                compatible = "nvidia,tegra124-timer", "nvidia,tegra20-timer";
+                reg = <0x60005000 0x400>;
+                interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+        };
+
+        gpio: gpio@6000d000 {
+                compatible = "nvidia,tegra124-gpio", "nvidia,tegra30-gpio";
+                reg = <0x6000d000 0x1000>;
+                interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+
+        /*
+         * There are two serial driver i.e. 8250 based simple serial
+         * driver and APB DMA based serial driver for higher baudrate
+         * and performace. To enable the 8250 based driver, the compatible
+         * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable
+         * the APB DMA based serial driver, the comptible is
+         * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart".
+         */
+        serial@70006000 {
+                compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
+                reg = <0x70006000 0x40>;
+                reg-shift = <2>;
+                interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+                status = "disabled";
+        };
+
+        serial@70006040 {
+                compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
+                reg = <0x70006040 0x40>;
+                reg-shift = <2>;
+                interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+                status = "disabled";
+        };
+
+        serial@70006200 {
+                compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
+                reg = <0x70006200 0x40>;
+                reg-shift = <2>;
+                interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+                status = "disabled";
+        };
+
+        serial@70006300 {
+                compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
+                reg = <0x70006300 0x40>;
+                reg-shift = <2>;
+                interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+                status = "disabled";
+        };
+
+        serial@70006400 {
+                compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
+                reg = <0x70006400 0x40>;
+                reg-shift = <2>;
+                interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+                status = "disabled";
+        };
+
+        rtc@7000e000 {
+                compatible = "nvidia,tegra124-rtc", "nvidia,tegra20-rtc";
+                reg = <0x7000e000 0x100>;
+                interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+        };
+
+        pmc@7000e400 {
+                compatible = "nvidia,tegra124-pmc";
+                reg = <0x7000e400 0x400>;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <0>;
+                };
+
+                cpu@1 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <1>;
+                };
+
+                cpu@2 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <2>;
+                };
+
+                cpu@3 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <3>;
+                };
+        };
+
+        timer {
+                compatible = "arm,armv7-timer";
+                interrupts = <GIC_PPI 13
+                                (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                             <GIC_PPI 14
+                                (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                             <GIC_PPI 11
+                                (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                             <GIC_PPI 10
+                                (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+        };
+};
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index e19dbf238e5c..5ea7dfa4d9fa 100644
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -294,9 +294,10 @@
                         };
                 };
 
-                nct1008 {
+                temperature-sensor@4c {
                         compatible = "onnn,nct1008";
                         reg = <0x4c>;
+                        vcc-supply = <&sys_3v3_reg>;
                         interrupt-parent = <&gpio>;
                         interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_LEVEL_LOW>;
                 };
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 0022c127e1d9..2bd55cfd88ad 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -136,12 +136,13 @@
                 gr3d {
                         compatible = "nvidia,tegra30-gr3d";
                         reg = <0x54180000 0x00040000>;
-                        clocks = <&tegra_car 24 &tegra_car 98>;
+                        clocks = <&tegra_car TEGRA30_CLK_GR3D
+                                  &tegra_car TEGRA30_CLK_GR3D2>;
                         clock-names = "3d", "3d2";
                 };
 
                 dc@54200000 {
-                        compatible = "nvidia,tegra30-dc";
+                        compatible = "nvidia,tegra30-dc", "nvidia,tegra20-dc";
                         reg = <0x54200000 0x00040000>;
                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
                         clocks = <&tegra_car TEGRA30_CLK_DISP1>,