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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2013-12-19 10:51:04 -0500
committerSimon Horman <horms+renesas@verge.net.au>2013-12-24 09:01:12 -0500
commitec71f55216db1b3da68e284840cb3ac3d5ed4965 (patch)
tree5d0f66fa84926178535ba58a1318588376fe970b
parent91b56ca10a3cf4999bae5f8b8e7e2723bf4b1363 (diff)
ARM: shmobile: r8a7791: Add QSPI module clock in device tree
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/boot/dts/r8a7791.dtsi15
-rw-r--r--include/dt-bindings/clock/r8a7791-clock.h1
2 files changed, 9 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 6a29341462cf..19c65509a22d 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -482,17 +482,18 @@
482 mstp9_clks: mstp9_clks@e6150994 { 482 mstp9_clks: mstp9_clks@e6150994 {
483 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; 483 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
484 reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; 484 reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
485 clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, 485 clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>,
486 <&p_clk>, <&p_clk>, <&p_clk>; 486 <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
487 <&p_clk>;
487 #clock-cells = <1>; 488 #clock-cells = <1>;
488 renesas,clock-indices = < 489 renesas,clock-indices = <
489 R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_I2C4 490 R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD
490 R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 R8A7791_CLK_I2C2 491 R8A7791_CLK_I2C4 R8A7791_CLK_I2C4 R8A7791_CLK_I2C3
491 R8A7791_CLK_I2C1 R8A7791_CLK_I2C0 492 R8A7791_CLK_I2C2 R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
492 >; 493 >;
493 clock-output-names = 494 clock-output-names =
494 "rcan1", "rcan0", "i2c5", "i2c4", "i2c3", "i2c2", "i2c1", 495 "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c4", "i2c3",
495 "i2c0"; 496 "i2c2", "i2c1", "i2c0";
496 }; 497 };
497 mstp11_clks: mstp11_clks@e615099c { 498 mstp11_clks: mstp11_clks@e615099c {
498 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; 499 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
index a69e090c83cf..30f82f286e29 100644
--- a/include/dt-bindings/clock/r8a7791-clock.h
+++ b/include/dt-bindings/clock/r8a7791-clock.h
@@ -94,6 +94,7 @@
94#define R8A7791_CLK_GPIO0 12 94#define R8A7791_CLK_GPIO0 12
95#define R8A7791_CLK_RCAN1 15 95#define R8A7791_CLK_RCAN1 15
96#define R8A7791_CLK_RCAN0 16 96#define R8A7791_CLK_RCAN0 16
97#define R8A7791_CLK_QSPI_MOD 17
97#define R8A7791_CLK_I2C5 25 98#define R8A7791_CLK_I2C5 25
98#define R8A7791_CLK_IICDVFS 26 99#define R8A7791_CLK_IICDVFS 26
99#define R8A7791_CLK_I2C4 27 100#define R8A7791_CLK_I2C4 27