diff options
| author | Michal Simek <michal.simek@xilinx.com> | 2013-06-03 06:13:17 -0400 |
|---|---|---|
| committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2013-06-26 06:31:29 -0400 |
| commit | ec05e7a8aaf5fd73a64d28fc9f28384ea247cc1c (patch) | |
| tree | eb47e020cdecee1b79d3e50631d9478e653d150c | |
| parent | 0f5e17c5fde5d28b26cd83e077c21d28bbf50a80 (diff) | |
video: xilinxfb: Do not name out_be32 in function name
out_be32 IO function is not supported by ARM.
It is only available for PPC and Microblaze.
Because this driver can be used on ARM let's
remove out_be32 from function name.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| -rw-r--r-- | drivers/video/xilinxfb.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c index aecd15d0b8e5..c9b442b928e5 100644 --- a/drivers/video/xilinxfb.c +++ b/drivers/video/xilinxfb.c | |||
| @@ -57,7 +57,7 @@ | |||
| 57 | * In case of direct PLB access the second control register will be at | 57 | * In case of direct PLB access the second control register will be at |
| 58 | * an offset of 4 as compared to the DCR access where the offset is 1 | 58 | * an offset of 4 as compared to the DCR access where the offset is 1 |
| 59 | * i.e. REG_CTRL. So this is taken care in the function | 59 | * i.e. REG_CTRL. So this is taken care in the function |
| 60 | * xilinx_fb_out_be32 where it left shifts the offset 2 times in case of | 60 | * xilinx_fb_out32 where it left shifts the offset 2 times in case of |
| 61 | * direct PLB access. | 61 | * direct PLB access. |
| 62 | */ | 62 | */ |
| 63 | #define NUM_REGS 2 | 63 | #define NUM_REGS 2 |
| @@ -150,7 +150,7 @@ struct xilinxfb_drvdata { | |||
| 150 | * To perform the read/write on the registers we need to check on | 150 | * To perform the read/write on the registers we need to check on |
| 151 | * which bus its connected and call the appropriate write API. | 151 | * which bus its connected and call the appropriate write API. |
| 152 | */ | 152 | */ |
| 153 | static void xilinx_fb_out_be32(struct xilinxfb_drvdata *drvdata, u32 offset, | 153 | static void xilinx_fb_out32(struct xilinxfb_drvdata *drvdata, u32 offset, |
| 154 | u32 val) | 154 | u32 val) |
| 155 | { | 155 | { |
| 156 | if (drvdata->flags & PLB_ACCESS_FLAG) | 156 | if (drvdata->flags & PLB_ACCESS_FLAG) |
| @@ -197,7 +197,7 @@ xilinx_fb_blank(int blank_mode, struct fb_info *fbi) | |||
| 197 | switch (blank_mode) { | 197 | switch (blank_mode) { |
| 198 | case FB_BLANK_UNBLANK: | 198 | case FB_BLANK_UNBLANK: |
| 199 | /* turn on panel */ | 199 | /* turn on panel */ |
| 200 | xilinx_fb_out_be32(drvdata, REG_CTRL, drvdata->reg_ctrl_default); | 200 | xilinx_fb_out32(drvdata, REG_CTRL, drvdata->reg_ctrl_default); |
| 201 | break; | 201 | break; |
| 202 | 202 | ||
| 203 | case FB_BLANK_NORMAL: | 203 | case FB_BLANK_NORMAL: |
| @@ -205,7 +205,7 @@ xilinx_fb_blank(int blank_mode, struct fb_info *fbi) | |||
| 205 | case FB_BLANK_HSYNC_SUSPEND: | 205 | case FB_BLANK_HSYNC_SUSPEND: |
| 206 | case FB_BLANK_POWERDOWN: | 206 | case FB_BLANK_POWERDOWN: |
| 207 | /* turn off panel */ | 207 | /* turn off panel */ |
| 208 | xilinx_fb_out_be32(drvdata, REG_CTRL, 0); | 208 | xilinx_fb_out32(drvdata, REG_CTRL, 0); |
| 209 | default: | 209 | default: |
| 210 | break; | 210 | break; |
| 211 | 211 | ||
| @@ -280,13 +280,13 @@ static int xilinxfb_assign(struct device *dev, | |||
| 280 | memset_io((void __iomem *)drvdata->fb_virt, 0, fbsize); | 280 | memset_io((void __iomem *)drvdata->fb_virt, 0, fbsize); |
| 281 | 281 | ||
| 282 | /* Tell the hardware where the frame buffer is */ | 282 | /* Tell the hardware where the frame buffer is */ |
| 283 | xilinx_fb_out_be32(drvdata, REG_FB_ADDR, drvdata->fb_phys); | 283 | xilinx_fb_out32(drvdata, REG_FB_ADDR, drvdata->fb_phys); |
| 284 | 284 | ||
| 285 | /* Turn on the display */ | 285 | /* Turn on the display */ |
| 286 | drvdata->reg_ctrl_default = REG_CTRL_ENABLE; | 286 | drvdata->reg_ctrl_default = REG_CTRL_ENABLE; |
| 287 | if (pdata->rotate_screen) | 287 | if (pdata->rotate_screen) |
| 288 | drvdata->reg_ctrl_default |= REG_CTRL_ROTATE; | 288 | drvdata->reg_ctrl_default |= REG_CTRL_ROTATE; |
| 289 | xilinx_fb_out_be32(drvdata, REG_CTRL, | 289 | xilinx_fb_out32(drvdata, REG_CTRL, |
| 290 | drvdata->reg_ctrl_default); | 290 | drvdata->reg_ctrl_default); |
| 291 | 291 | ||
| 292 | /* Fill struct fb_info */ | 292 | /* Fill struct fb_info */ |
| @@ -345,7 +345,7 @@ err_cmap: | |||
| 345 | iounmap(drvdata->fb_virt); | 345 | iounmap(drvdata->fb_virt); |
| 346 | 346 | ||
| 347 | /* Turn off the display */ | 347 | /* Turn off the display */ |
| 348 | xilinx_fb_out_be32(drvdata, REG_CTRL, 0); | 348 | xilinx_fb_out32(drvdata, REG_CTRL, 0); |
| 349 | 349 | ||
| 350 | err_fbmem: | 350 | err_fbmem: |
| 351 | if (drvdata->flags & PLB_ACCESS_FLAG) | 351 | if (drvdata->flags & PLB_ACCESS_FLAG) |
| @@ -381,7 +381,7 @@ static int xilinxfb_release(struct device *dev) | |||
| 381 | iounmap(drvdata->fb_virt); | 381 | iounmap(drvdata->fb_virt); |
| 382 | 382 | ||
| 383 | /* Turn off the display */ | 383 | /* Turn off the display */ |
| 384 | xilinx_fb_out_be32(drvdata, REG_CTRL, 0); | 384 | xilinx_fb_out32(drvdata, REG_CTRL, 0); |
| 385 | 385 | ||
| 386 | /* Release the resources, as allocated based on interface */ | 386 | /* Release the resources, as allocated based on interface */ |
| 387 | if (drvdata->flags & PLB_ACCESS_FLAG) { | 387 | if (drvdata->flags & PLB_ACCESS_FLAG) { |
