aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorBarry Song <Baohua.Song@csr.com>2012-12-20 03:51:31 -0500
committerMike Turquette <mturquette@linaro.org>2013-01-18 12:44:01 -0500
commiteb8b8f2e7164b819ca35a3d6240198fdb98d0ef3 (patch)
tree36c3588aebf0d4bb42d0bfbaf0f3d658ae3e77dc
parent38a8b096f86dea54cc64f4daa3402d0c4f2df43e (diff)
clk: prima2: enable dt-binding clkdev mapping
this patche deletes hard code that registers clkdev by things like: clk_register_clkdev(clk, NULL, "b0030000.nand"); clk_register_clkdev(clk, NULL, "b0040000.audio"); clk_register_clkdev(clk, NULL, "b0080000.usp"); prima2 clock controller becomes a clock provider and every dt node just declares its clock sources by dt prop. it also makes us easier to extend this driver to support both prima2 and marco as marco has different address mapping with prima2. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat
-rw-r--r--Documentation/devicetree/bindings/clock/prima2-clock.txt73
-rw-r--r--arch/arm/boot/dts/prima2.dtsi31
-rw-r--r--drivers/clk/clk-prima2.c205
3 files changed, 183 insertions, 126 deletions
diff --git a/Documentation/devicetree/bindings/clock/prima2-clock.txt b/Documentation/devicetree/bindings/clock/prima2-clock.txt
new file mode 100644
index 000000000000..5016979c0f78
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/prima2-clock.txt
@@ -0,0 +1,73 @@
1* Clock bindings for CSR SiRFprimaII
2
3Required properties:
4- compatible: Should be "sirf,prima2-clkc"
5- reg: Address and length of the register set
6- interrupts: Should contain clock controller interrupt
7- #clock-cells: Should be <1>
8
9The clock consumer should specify the desired clock by having the clock
10ID in its "clocks" phandle cell. The following is a full list of prima2
11clocks and IDs.
12
13 Clock ID
14 ---------------------------
15 rtc 0
16 osc 1
17 pll1 2
18 pll2 3
19 pll3 4
20 mem 5
21 sys 6
22 security 7
23 dsp 8
24 gps 9
25 mf 10
26 io 11
27 cpu 12
28 uart0 13
29 uart1 14
30 uart2 15
31 tsc 16
32 i2c0 17
33 i2c1 18
34 spi0 19
35 spi1 20
36 pwmc 21
37 efuse 22
38 pulse 23
39 dmac0 24
40 dmac1 25
41 nand 26
42 audio 27
43 usp0 28
44 usp1 29
45 usp2 30
46 vip 31
47 gfx 32
48 mm 33
49 lcd 34
50 vpp 35
51 mmc01 36
52 mmc23 37
53 mmc45 38
54 usbpll 39
55 usb0 40
56 usb1 41
57
58Examples:
59
60clks: clock-controller@88000000 {
61 compatible = "sirf,prima2-clkc";
62 reg = <0x88000000 0x1000>;
63 interrupts = <3>;
64 #clock-cells = <1>;
65};
66
67i2c0: i2c@b00e0000 {
68 cell-index = <0>;
69 compatible = "sirf,prima2-i2c";
70 reg = <0xb00e0000 0x10000>;
71 interrupts = <24>;
72 clocks = <&clks 17>;
73};
diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi
index 055fca542120..3329719a9412 100644
--- a/arch/arm/boot/dts/prima2.dtsi
+++ b/arch/arm/boot/dts/prima2.dtsi
@@ -58,10 +58,11 @@
58 #size-cells = <1>; 58 #size-cells = <1>;
59 ranges = <0x88000000 0x88000000 0x40000>; 59 ranges = <0x88000000 0x88000000 0x40000>;
60 60
61 clock-controller@88000000 { 61 clks: clock-controller@88000000 {
62 compatible = "sirf,prima2-clkc"; 62 compatible = "sirf,prima2-clkc";
63 reg = <0x88000000 0x1000>; 63 reg = <0x88000000 0x1000>;
64 interrupts = <3>; 64 interrupts = <3>;
65 #clock-cells = <1>;
65 }; 66 };
66 67
67 reset-controller@88010000 { 68 reset-controller@88010000 {
@@ -85,6 +86,7 @@
85 compatible = "sirf,prima2-memc"; 86 compatible = "sirf,prima2-memc";
86 reg = <0x90000000 0x10000>; 87 reg = <0x90000000 0x10000>;
87 interrupts = <27>; 88 interrupts = <27>;
89 clocks = <&clks 5>;
88 }; 90 };
89 }; 91 };
90 92
@@ -104,6 +106,7 @@
104 compatible = "sirf,prima2-vpp"; 106 compatible = "sirf,prima2-vpp";
105 reg = <0x90020000 0x10000>; 107 reg = <0x90020000 0x10000>;
106 interrupts = <31>; 108 interrupts = <31>;
109 clocks = <&clks 35>;
107 }; 110 };
108 }; 111 };
109 112
@@ -117,6 +120,7 @@
117 compatible = "powervr,sgx531"; 120 compatible = "powervr,sgx531";
118 reg = <0x98000000 0x8000000>; 121 reg = <0x98000000 0x8000000>;
119 interrupts = <6>; 122 interrupts = <6>;
123 clocks = <&clks 32>;
120 }; 124 };
121 }; 125 };
122 126
@@ -130,6 +134,7 @@
130 compatible = "sirf,prima2-video-codec"; 134 compatible = "sirf,prima2-video-codec";
131 reg = <0xa0000000 0x8000000>; 135 reg = <0xa0000000 0x8000000>;
132 interrupts = <5>; 136 interrupts = <5>;
137 clocks = <&clks 33>;
133 }; 138 };
134 }; 139 };
135 140
@@ -149,12 +154,14 @@
149 compatible = "sirf,prima2-gps"; 154 compatible = "sirf,prima2-gps";
150 reg = <0xa8010000 0x10000>; 155 reg = <0xa8010000 0x10000>;
151 interrupts = <7>; 156 interrupts = <7>;
157 clocks = <&clks 9>;
152 }; 158 };
153 159
154 dsp@a9000000 { 160 dsp@a9000000 {
155 compatible = "sirf,prima2-dsp"; 161 compatible = "sirf,prima2-dsp";
156 reg = <0xa9000000 0x1000000>; 162 reg = <0xa9000000 0x1000000>;
157 interrupts = <8>; 163 interrupts = <8>;
164 clocks = <&clks 8>;
158 }; 165 };
159 }; 166 };
160 167
@@ -174,12 +181,14 @@
174 compatible = "sirf,prima2-nand"; 181 compatible = "sirf,prima2-nand";
175 reg = <0xb0030000 0x10000>; 182 reg = <0xb0030000 0x10000>;
176 interrupts = <41>; 183 interrupts = <41>;
184 clocks = <&clks 26>;
177 }; 185 };
178 186
179 audio@b0040000 { 187 audio@b0040000 {
180 compatible = "sirf,prima2-audio"; 188 compatible = "sirf,prima2-audio";
181 reg = <0xb0040000 0x10000>; 189 reg = <0xb0040000 0x10000>;
182 interrupts = <35>; 190 interrupts = <35>;
191 clocks = <&clks 27>;
183 }; 192 };
184 193
185 uart0: uart@b0050000 { 194 uart0: uart@b0050000 {
@@ -187,6 +196,7 @@
187 compatible = "sirf,prima2-uart"; 196 compatible = "sirf,prima2-uart";
188 reg = <0xb0050000 0x10000>; 197 reg = <0xb0050000 0x10000>;
189 interrupts = <17>; 198 interrupts = <17>;
199 clocks = <&clks 13>;
190 }; 200 };
191 201
192 uart1: uart@b0060000 { 202 uart1: uart@b0060000 {
@@ -194,6 +204,7 @@
194 compatible = "sirf,prima2-uart"; 204 compatible = "sirf,prima2-uart";
195 reg = <0xb0060000 0x10000>; 205 reg = <0xb0060000 0x10000>;
196 interrupts = <18>; 206 interrupts = <18>;
207 clocks = <&clks 14>;
197 }; 208 };
198 209
199 uart2: uart@b0070000 { 210 uart2: uart@b0070000 {
@@ -201,6 +212,7 @@
201 compatible = "sirf,prima2-uart"; 212 compatible = "sirf,prima2-uart";
202 reg = <0xb0070000 0x10000>; 213 reg = <0xb0070000 0x10000>;
203 interrupts = <19>; 214 interrupts = <19>;
215 clocks = <&clks 15>;
204 }; 216 };
205 217
206 usp0: usp@b0080000 { 218 usp0: usp@b0080000 {
@@ -208,6 +220,7 @@
208 compatible = "sirf,prima2-usp"; 220 compatible = "sirf,prima2-usp";
209 reg = <0xb0080000 0x10000>; 221 reg = <0xb0080000 0x10000>;
210 interrupts = <20>; 222 interrupts = <20>;
223 clocks = <&clks 28>;
211 }; 224 };
212 225
213 usp1: usp@b0090000 { 226 usp1: usp@b0090000 {
@@ -215,6 +228,7 @@
215 compatible = "sirf,prima2-usp"; 228 compatible = "sirf,prima2-usp";
216 reg = <0xb0090000 0x10000>; 229 reg = <0xb0090000 0x10000>;
217 interrupts = <21>; 230 interrupts = <21>;
231 clocks = <&clks 29>;
218 }; 232 };
219 233
220 usp2: usp@b00a0000 { 234 usp2: usp@b00a0000 {
@@ -222,6 +236,7 @@
222 compatible = "sirf,prima2-usp"; 236 compatible = "sirf,prima2-usp";
223 reg = <0xb00a0000 0x10000>; 237 reg = <0xb00a0000 0x10000>;
224 interrupts = <22>; 238 interrupts = <22>;
239 clocks = <&clks 30>;
225 }; 240 };
226 241
227 dmac0: dma-controller@b00b0000 { 242 dmac0: dma-controller@b00b0000 {
@@ -229,6 +244,7 @@
229 compatible = "sirf,prima2-dmac"; 244 compatible = "sirf,prima2-dmac";
230 reg = <0xb00b0000 0x10000>; 245 reg = <0xb00b0000 0x10000>;
231 interrupts = <12>; 246 interrupts = <12>;
247 clocks = <&clks 24>;
232 }; 248 };
233 249
234 dmac1: dma-controller@b0160000 { 250 dmac1: dma-controller@b0160000 {
@@ -236,11 +252,13 @@
236 compatible = "sirf,prima2-dmac"; 252 compatible = "sirf,prima2-dmac";
237 reg = <0xb0160000 0x10000>; 253 reg = <0xb0160000 0x10000>;
238 interrupts = <13>; 254 interrupts = <13>;
255 clocks = <&clks 25>;
239 }; 256 };
240 257
241 vip@b00C0000 { 258 vip@b00C0000 {
242 compatible = "sirf,prima2-vip"; 259 compatible = "sirf,prima2-vip";
243 reg = <0xb00C0000 0x10000>; 260 reg = <0xb00C0000 0x10000>;
261 clocks = <&clks 31>;
244 }; 262 };
245 263
246 spi0: spi@b00d0000 { 264 spi0: spi@b00d0000 {
@@ -248,6 +266,7 @@
248 compatible = "sirf,prima2-spi"; 266 compatible = "sirf,prima2-spi";
249 reg = <0xb00d0000 0x10000>; 267 reg = <0xb00d0000 0x10000>;
250 interrupts = <15>; 268 interrupts = <15>;
269 clocks = <&clks 19>;
251 }; 270 };
252 271
253 spi1: spi@b0170000 { 272 spi1: spi@b0170000 {
@@ -255,6 +274,7 @@
255 compatible = "sirf,prima2-spi"; 274 compatible = "sirf,prima2-spi";
256 reg = <0xb0170000 0x10000>; 275 reg = <0xb0170000 0x10000>;
257 interrupts = <16>; 276 interrupts = <16>;
277 clocks = <&clks 20>;
258 }; 278 };
259 279
260 i2c0: i2c@b00e0000 { 280 i2c0: i2c@b00e0000 {
@@ -262,6 +282,7 @@
262 compatible = "sirf,prima2-i2c"; 282 compatible = "sirf,prima2-i2c";
263 reg = <0xb00e0000 0x10000>; 283 reg = <0xb00e0000 0x10000>;
264 interrupts = <24>; 284 interrupts = <24>;
285 clocks = <&clks 17>;
265 }; 286 };
266 287
267 i2c1: i2c@b00f0000 { 288 i2c1: i2c@b00f0000 {
@@ -269,12 +290,14 @@
269 compatible = "sirf,prima2-i2c"; 290 compatible = "sirf,prima2-i2c";
270 reg = <0xb00f0000 0x10000>; 291 reg = <0xb00f0000 0x10000>;
271 interrupts = <25>; 292 interrupts = <25>;
293 clocks = <&clks 18>;
272 }; 294 };
273 295
274 tsc@b0110000 { 296 tsc@b0110000 {
275 compatible = "sirf,prima2-tsc"; 297 compatible = "sirf,prima2-tsc";
276 reg = <0xb0110000 0x10000>; 298 reg = <0xb0110000 0x10000>;
277 interrupts = <33>; 299 interrupts = <33>;
300 clocks = <&clks 16>;
278 }; 301 };
279 302
280 gpio: pinctrl@b0120000 { 303 gpio: pinctrl@b0120000 {
@@ -507,17 +530,20 @@
507 pwm@b0130000 { 530 pwm@b0130000 {
508 compatible = "sirf,prima2-pwm"; 531 compatible = "sirf,prima2-pwm";
509 reg = <0xb0130000 0x10000>; 532 reg = <0xb0130000 0x10000>;
533 clocks = <&clks 21>;
510 }; 534 };
511 535
512 efusesys@b0140000 { 536 efusesys@b0140000 {
513 compatible = "sirf,prima2-efuse"; 537 compatible = "sirf,prima2-efuse";
514 reg = <0xb0140000 0x10000>; 538 reg = <0xb0140000 0x10000>;
539 clocks = <&clks 22>;
515 }; 540 };
516 541
517 pulsec@b0150000 { 542 pulsec@b0150000 {
518 compatible = "sirf,prima2-pulsec"; 543 compatible = "sirf,prima2-pulsec";
519 reg = <0xb0150000 0x10000>; 544 reg = <0xb0150000 0x10000>;
520 interrupts = <48>; 545 interrupts = <48>;
546 clocks = <&clks 23>;
521 }; 547 };
522 548
523 pci-iobg { 549 pci-iobg {
@@ -616,12 +642,14 @@
616 compatible = "chipidea,ci13611a-prima2"; 642 compatible = "chipidea,ci13611a-prima2";
617 reg = <0xb8000000 0x10000>; 643 reg = <0xb8000000 0x10000>;
618 interrupts = <10>; 644 interrupts = <10>;
645 clocks = <&clks 40>;
619 }; 646 };
620 647
621 usb1: usb@b00f0000 { 648 usb1: usb@b00f0000 {
622 compatible = "chipidea,ci13611a-prima2"; 649 compatible = "chipidea,ci13611a-prima2";
623 reg = <0xb8010000 0x10000>; 650 reg = <0xb8010000 0x10000>;
624 interrupts = <11>; 651 interrupts = <11>;
652 clocks = <&clks 41>;
625 }; 653 };
626 654
627 sata@b00f0000 { 655 sata@b00f0000 {
@@ -634,6 +662,7 @@
634 compatible = "sirf,prima2-security"; 662 compatible = "sirf,prima2-security";
635 reg = <0xb8030000 0x10000>; 663 reg = <0xb8030000 0x10000>;
636 interrupts = <42>; 664 interrupts = <42>;
665 clocks = <&clks 7>;
637 }; 666 };
638 }; 667 };
639 }; 668 };
diff --git a/drivers/clk/clk-prima2.c b/drivers/clk/clk-prima2.c
index a203ecccdc4f..f8e9d0c27be2 100644
--- a/drivers/clk/clk-prima2.c
+++ b/drivers/clk/clk-prima2.c
@@ -1025,20 +1025,67 @@ static struct of_device_id rsc_ids[] = {
1025 {}, 1025 {},
1026}; 1026};
1027 1027
1028enum prima2_clk_index {
1029 /* 0 1 2 3 4 5 6 7 8 9 */
1030 rtc, osc, pll1, pll2, pll3, mem, sys, security, dsp, gps,
1031 mf, io, cpu, uart0, uart1, uart2, tsc, i2c0, i2c1, spi0,
1032 spi1, pwmc, efuse, pulse, dmac0, dmac1, nand, audio, usp0, usp1,
1033 usp2, vip, gfx, mm, lcd, vpp, mmc01, mmc23, mmc45, usbpll,
1034 usb0, usb1, maxclk,
1035};
1036
1037static __initdata struct clk_hw* prima2_clk_hw_array[maxclk] = {
1038 NULL, /* dummy */
1039 NULL,
1040 &clk_pll1.hw,
1041 &clk_pll2.hw,
1042 &clk_pll3.hw,
1043 &clk_mem.hw,
1044 &clk_sys.hw,
1045 &clk_security.hw,
1046 &clk_dsp.hw,
1047 &clk_gps.hw,
1048 &clk_mf.hw,
1049 &clk_io.hw,
1050 &clk_cpu.hw,
1051 &clk_uart0.hw,
1052 &clk_uart1.hw,
1053 &clk_uart2.hw,
1054 &clk_tsc.hw,
1055 &clk_i2c0.hw,
1056 &clk_i2c1.hw,
1057 &clk_spi0.hw,
1058 &clk_spi1.hw,
1059 &clk_pwmc.hw,
1060 &clk_efuse.hw,
1061 &clk_pulse.hw,
1062 &clk_dmac0.hw,
1063 &clk_dmac1.hw,
1064 &clk_nand.hw,
1065 &clk_audio.hw,
1066 &clk_usp0.hw,
1067 &clk_usp1.hw,
1068 &clk_usp2.hw,
1069 &clk_vip.hw,
1070 &clk_gfx.hw,
1071 &clk_mm.hw,
1072 &clk_lcd.hw,
1073 &clk_vpp.hw,
1074 &clk_mmc01.hw,
1075 &clk_mmc23.hw,
1076 &clk_mmc45.hw,
1077 &usb_pll_clk_hw,
1078 &clk_usb0.hw,
1079 &clk_usb1.hw,
1080};
1081
1082static struct clk *prima2_clks[maxclk];
1083static struct clk_onecell_data clk_data;
1084
1028void __init sirfsoc_of_clk_init(void) 1085void __init sirfsoc_of_clk_init(void)
1029{ 1086{
1030 struct clk *clk;
1031 struct device_node *np; 1087 struct device_node *np;
1032 1088 int i;
1033 np = of_find_matching_node(NULL, clkc_ids);
1034 if (!np)
1035 panic("unable to find compatible clkc node in dtb\n");
1036
1037 sirfsoc_clk_vbase = of_iomap(np, 0);
1038 if (!sirfsoc_clk_vbase)
1039 panic("unable to map clkc registers\n");
1040
1041 of_node_put(np);
1042 1089
1043 np = of_find_matching_node(NULL, rsc_ids); 1090 np = of_find_matching_node(NULL, rsc_ids);
1044 if (!np) 1091 if (!np)
@@ -1050,122 +1097,30 @@ void __init sirfsoc_of_clk_init(void)
1050 1097
1051 of_node_put(np); 1098 of_node_put(np);
1052 1099
1100 np = of_find_matching_node(NULL, clkc_ids);
1101 if (!np)
1102 return;
1103
1104 sirfsoc_clk_vbase = of_iomap(np, 0);
1105 if (!sirfsoc_clk_vbase)
1106 panic("unable to map clkc registers\n");
1053 1107
1054 /* These are always available (RTC and 26MHz OSC)*/ 1108 /* These are always available (RTC and 26MHz OSC)*/
1055 clk = clk_register_fixed_rate(NULL, "rtc", NULL, 1109 prima2_clks[rtc] = clk_register_fixed_rate(NULL, "rtc", NULL,
1056 CLK_IS_ROOT, 32768); 1110 CLK_IS_ROOT, 32768);
1057 BUG_ON(IS_ERR(clk)); 1111 prima2_clks[osc]= clk_register_fixed_rate(NULL, "osc", NULL,
1058 clk = clk_register_fixed_rate(NULL, "osc", NULL,
1059 CLK_IS_ROOT, 26000000); 1112 CLK_IS_ROOT, 26000000);
1060 BUG_ON(IS_ERR(clk)); 1113
1061 1114 for (i = pll1; i < maxclk; i++) {
1062 clk = clk_register(NULL, &clk_pll1.hw); 1115 prima2_clks[i] = clk_register(NULL, prima2_clk_hw_array[i]);
1063 BUG_ON(IS_ERR(clk)); 1116 BUG_ON(!prima2_clks[i]);
1064 clk = clk_register(NULL, &clk_pll2.hw); 1117 }
1065 BUG_ON(IS_ERR(clk)); 1118 clk_register_clkdev(prima2_clks[cpu], NULL, "cpu");
1066 clk = clk_register(NULL, &clk_pll3.hw); 1119 clk_register_clkdev(prima2_clks[io], NULL, "io");
1067 BUG_ON(IS_ERR(clk)); 1120 clk_register_clkdev(prima2_clks[mem], NULL, "mem");
1068 clk = clk_register(NULL, &clk_mem.hw); 1121
1069 BUG_ON(IS_ERR(clk)); 1122 clk_data.clks = prima2_clks;
1070 clk = clk_register(NULL, &clk_sys.hw); 1123 clk_data.clk_num = maxclk;
1071 BUG_ON(IS_ERR(clk)); 1124
1072 clk = clk_register(NULL, &clk_security.hw); 1125 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
1073 BUG_ON(IS_ERR(clk));
1074 clk_register_clkdev(clk, NULL, "b8030000.security");
1075 clk = clk_register(NULL, &clk_dsp.hw);
1076 BUG_ON(IS_ERR(clk));
1077 clk = clk_register(NULL, &clk_gps.hw);
1078 BUG_ON(IS_ERR(clk));
1079 clk_register_clkdev(clk, NULL, "a8010000.gps");
1080 clk = clk_register(NULL, &clk_mf.hw);
1081 BUG_ON(IS_ERR(clk));
1082 clk = clk_register(NULL, &clk_io.hw);
1083 BUG_ON(IS_ERR(clk));
1084 clk_register_clkdev(clk, NULL, "io");
1085 clk = clk_register(NULL, &clk_cpu.hw);
1086 BUG_ON(IS_ERR(clk));
1087 clk_register_clkdev(clk, NULL, "cpu");
1088 clk = clk_register(NULL, &clk_uart0.hw);
1089 BUG_ON(IS_ERR(clk));
1090 clk_register_clkdev(clk, NULL, "b0050000.uart");
1091 clk = clk_register(NULL, &clk_uart1.hw);
1092 BUG_ON(IS_ERR(clk));
1093 clk_register_clkdev(clk, NULL, "b0060000.uart");
1094 clk = clk_register(NULL, &clk_uart2.hw);
1095 BUG_ON(IS_ERR(clk));
1096 clk_register_clkdev(clk, NULL, "b0070000.uart");
1097 clk = clk_register(NULL, &clk_tsc.hw);
1098 BUG_ON(IS_ERR(clk));
1099 clk_register_clkdev(clk, NULL, "b0110000.tsc");
1100 clk = clk_register(NULL, &clk_i2c0.hw);
1101 BUG_ON(IS_ERR(clk));
1102 clk_register_clkdev(clk, NULL, "b00e0000.i2c");
1103 clk = clk_register(NULL, &clk_i2c1.hw);
1104 BUG_ON(IS_ERR(clk));
1105 clk_register_clkdev(clk, NULL, "b00f0000.i2c");
1106 clk = clk_register(NULL, &clk_spi0.hw);
1107 BUG_ON(IS_ERR(clk));
1108 clk_register_clkdev(clk, NULL, "b00d0000.spi");
1109 clk = clk_register(NULL, &clk_spi1.hw);
1110 BUG_ON(IS_ERR(clk));
1111 clk_register_clkdev(clk, NULL, "b0170000.spi");
1112 clk = clk_register(NULL, &clk_pwmc.hw);
1113 BUG_ON(IS_ERR(clk));
1114 clk_register_clkdev(clk, NULL, "b0130000.pwm");
1115 clk = clk_register(NULL, &clk_efuse.hw);
1116 BUG_ON(IS_ERR(clk));
1117 clk_register_clkdev(clk, NULL, "b0140000.efusesys");
1118 clk = clk_register(NULL, &clk_pulse.hw);
1119 BUG_ON(IS_ERR(clk));
1120 clk_register_clkdev(clk, NULL, "b0150000.pulsec");
1121 clk = clk_register(NULL, &clk_dmac0.hw);
1122 BUG_ON(IS_ERR(clk));
1123 clk_register_clkdev(clk, NULL, "b00b0000.dma-controller");
1124 clk = clk_register(NULL, &clk_dmac1.hw);
1125 BUG_ON(IS_ERR(clk));
1126 clk_register_clkdev(clk, NULL, "b0160000.dma-controller");
1127 clk = clk_register(NULL, &clk_nand.hw);
1128 BUG_ON(IS_ERR(clk));
1129 clk_register_clkdev(clk, NULL, "b0030000.nand");
1130 clk = clk_register(NULL, &clk_audio.hw);
1131 BUG_ON(IS_ERR(clk));
1132 clk_register_clkdev(clk, NULL, "b0040000.audio");
1133 clk = clk_register(NULL, &clk_usp0.hw);
1134 BUG_ON(IS_ERR(clk));
1135 clk_register_clkdev(clk, NULL, "b0080000.usp");
1136 clk = clk_register(NULL, &clk_usp1.hw);
1137 BUG_ON(IS_ERR(clk));
1138 clk_register_clkdev(clk, NULL, "b0090000.usp");
1139 clk = clk_register(NULL, &clk_usp2.hw);
1140 BUG_ON(IS_ERR(clk));
1141 clk_register_clkdev(clk, NULL, "b00a0000.usp");
1142 clk = clk_register(NULL, &clk_vip.hw);
1143 BUG_ON(IS_ERR(clk));
1144 clk_register_clkdev(clk, NULL, "b00c0000.vip");
1145 clk = clk_register(NULL, &clk_gfx.hw);
1146 BUG_ON(IS_ERR(clk));
1147 clk_register_clkdev(clk, NULL, "98000000.graphics");
1148 clk = clk_register(NULL, &clk_mm.hw);
1149 BUG_ON(IS_ERR(clk));
1150 clk_register_clkdev(clk, NULL, "a0000000.multimedia");
1151 clk = clk_register(NULL, &clk_lcd.hw);
1152 BUG_ON(IS_ERR(clk));
1153 clk_register_clkdev(clk, NULL, "90010000.display");
1154 clk = clk_register(NULL, &clk_vpp.hw);
1155 BUG_ON(IS_ERR(clk));
1156 clk_register_clkdev(clk, NULL, "90020000.vpp");
1157 clk = clk_register(NULL, &clk_mmc01.hw);
1158 BUG_ON(IS_ERR(clk));
1159 clk = clk_register(NULL, &clk_mmc23.hw);
1160 BUG_ON(IS_ERR(clk));
1161 clk = clk_register(NULL, &clk_mmc45.hw);
1162 BUG_ON(IS_ERR(clk));
1163 clk = clk_register(NULL, &usb_pll_clk_hw);
1164 BUG_ON(IS_ERR(clk));
1165 clk = clk_register(NULL, &clk_usb0.hw);
1166 BUG_ON(IS_ERR(clk));
1167 clk_register_clkdev(clk, NULL, "b00e0000.usb");
1168 clk = clk_register(NULL, &clk_usb1.hw);
1169 BUG_ON(IS_ERR(clk));
1170 clk_register_clkdev(clk, NULL, "b00f0000.usb");
1171} 1126}
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-17 04:40:53 -0400