stmmac: add memory barriers at appropriate places

This patch, provided by ST SPEAr developers,
has fixed a problem raised on ARM CA9 where
happened that the dma_transmission was enabled before
the dma descriptors were properly filled. To guarantee this
data memory barriers have been explicity used in the driver.

Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 5 insertions, 0 deletions

diff --git a/drivers/net/stmmac/stmmac_main.c b/drivers/net/stmmac/stmmac_main.c
index d4adc806f6f8..c8c9e5bc6608 100644
--- a/drivers/net/stmmac/stmmac_main.c
+++ b/drivers/net/stmmac/stmmac_main.c
@@ -1045,6 +1045,7 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
                                           len, DMA_TO_DEVICE);
                 priv->tx_skbuff[entry] = NULL;
                 priv->hw->desc->prepare_tx_desc(desc, 0, len, csum_insertion);
+                wmb();
                 priv->hw->desc->set_tx_owner(desc);
         }
 
@@ -1056,6 +1057,9 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
         if (likely(priv->tm->enable))
                 priv->hw->desc->clear_tx_ic(desc);
 #endif
+
+        wmb();
+
         /* To avoid raise condition */
         priv->hw->desc->set_tx_owner(first);
 
@@ -1118,6 +1122,7 @@ static inline void stmmac_rx_refill(struct stmmac_priv *priv)
                         }
                         RX_DBG(KERN_INFO "\trefill entry #%d\n", entry);
                 }
+                wmb();
                 priv->hw->desc->set_rx_owner(p + entry);
         }
 }