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authorKumar Gala <galak@kernel.crashing.org>2008-04-09 07:06:11 -0400
committerKumar Gala <galak@kernel.crashing.org>2008-04-17 02:01:36 -0400
commiteb0cd5fd295f469b4782d8088f3e39019da44707 (patch)
tree10418c0fd2ba06f28af598c3ff90d3b33fce7b2e
parent771168494719b90621ac61f9ae68c4af494e418f (diff)
[POWERPC] Rework Book-E debug exception handling
The architecture allows for "Book-E" style debug interrupts to either go to critial interrupts of their own debug interrupt level. To allow for a dynamic kernel to support machines of either type we want to be able to compile in the interrupt handling code for both exception levels. Towards this goal we renamed the debug handling macros to specify the interrupt level in their name (DEBUG_CRIT_EXCEPTION/DebugCrit and DEBUG_DEBUG_EXCEPTION/DebugDebug). Additionally, on the Freescale Book-e parts we expanded the exception stacks to cover the maximum case of needing three exception stacks (normal, machine check and debug). There is some kernel text space optimization to be gained if a kernel is configured for a specific Freescale implementation but we aren't handling that now to allow for the single kernel image support. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
-rw-r--r--arch/powerpc/kernel/head_44x.S4
-rw-r--r--arch/powerpc/kernel/head_booke.h33
-rw-r--r--arch/powerpc/kernel/head_fsl_booke.S10
3 files changed, 30 insertions, 17 deletions
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index ad071a146a8d..b84ec6a2fc94 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -211,7 +211,7 @@ skpinv: addi r4,r4,1 /* Increment */
211 SET_IVOR(12, WatchdogTimer); 211 SET_IVOR(12, WatchdogTimer);
212 SET_IVOR(13, DataTLBError); 212 SET_IVOR(13, DataTLBError);
213 SET_IVOR(14, InstructionTLBError); 213 SET_IVOR(14, InstructionTLBError);
214 SET_IVOR(15, Debug); 214 SET_IVOR(15, DebugCrit);
215 215
216 /* Establish the interrupt vector base */ 216 /* Establish the interrupt vector base */
217 lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */ 217 lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */
@@ -578,7 +578,7 @@ interrupt_base:
578 b InstructionStorage 578 b InstructionStorage
579 579
580 /* Debug Interrupt */ 580 /* Debug Interrupt */
581 DEBUG_EXCEPTION 581 DEBUG_CRIT_EXCEPTION
582 582
583/* 583/*
584 * Local functions 584 * Local functions
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h
index ba9393f8e77a..aefafc6330c9 100644
--- a/arch/powerpc/kernel/head_booke.h
+++ b/arch/powerpc/kernel/head_booke.h
@@ -56,8 +56,17 @@
56 * is necessary since the MMU is always on, for Book-E parts, and the stacks 56 * is necessary since the MMU is always on, for Book-E parts, and the stacks
57 * are offset from KERNELBASE. 57 * are offset from KERNELBASE.
58 * 58 *
59 * There is some space optimization to be had here if desired. However
60 * to allow for a common kernel with support for debug exceptions either
61 * going to critical or their own debug level we aren't currently
62 * providing configurations that micro-optimize space usage.
59 */ 63 */
60#define BOOKE_EXCEPTION_STACK_SIZE (8192) 64#ifdef CONFIG_44x
65#define NUM_EXCEPTION_LVLS 2
66#else
67#define NUM_EXCEPTION_LVLS 3
68#endif
69#define BOOKE_EXCEPTION_STACK_SIZE (4096 * NUM_EXCEPTION_LVLS)
61 70
62/* CRIT_SPRG only used in critical exception handling */ 71/* CRIT_SPRG only used in critical exception handling */
63#define CRIT_SPRG SPRN_SPRG2 72#define CRIT_SPRG SPRN_SPRG2
@@ -68,7 +77,7 @@
68#define CRIT_STACK_TOP (exception_stack_top) 77#define CRIT_STACK_TOP (exception_stack_top)
69 78
70/* only on e200 for now */ 79/* only on e200 for now */
71#define DEBUG_STACK_TOP (exception_stack_top - 4096) 80#define DEBUG_STACK_TOP (exception_stack_top - 8192)
72#define DEBUG_SPRG SPRN_SPRG6W 81#define DEBUG_SPRG SPRN_SPRG6W
73 82
74#ifdef CONFIG_SMP 83#ifdef CONFIG_SMP
@@ -212,9 +221,8 @@ label:
212 * save (and later restore) the MSR via SPRN_CSRR1, which will still have 221 * save (and later restore) the MSR via SPRN_CSRR1, which will still have
213 * the MSR_DE bit set. 222 * the MSR_DE bit set.
214 */ 223 */
215#ifdef CONFIG_E200 224#define DEBUG_DEBUG_EXCEPTION \
216#define DEBUG_EXCEPTION \ 225 START_EXCEPTION(DebugDebug); \
217 START_EXCEPTION(Debug); \
218 DEBUG_EXCEPTION_PROLOG; \ 226 DEBUG_EXCEPTION_PROLOG; \
219 \ 227 \
220 /* \ 228 /* \
@@ -234,8 +242,8 @@ label:
234 cmplw r12,r10; \ 242 cmplw r12,r10; \
235 blt+ 2f; /* addr below exception vectors */ \ 243 blt+ 2f; /* addr below exception vectors */ \
236 \ 244 \
237 lis r10,Debug@h; \ 245 lis r10,DebugDebug@h; \
238 ori r10,r10,Debug@l; \ 246 ori r10,r10,DebugDebug@l; \
239 cmplw r12,r10; \ 247 cmplw r12,r10; \
240 bgt+ 2f; /* addr above exception vectors */ \ 248 bgt+ 2f; /* addr above exception vectors */ \
241 \ 249 \
@@ -265,9 +273,9 @@ label:
2652: mfspr r4,SPRN_DBSR; \ 2732: mfspr r4,SPRN_DBSR; \
266 addi r3,r1,STACK_FRAME_OVERHEAD; \ 274 addi r3,r1,STACK_FRAME_OVERHEAD; \
267 EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, debug_transfer_to_handler, ret_from_debug_exc) 275 EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, debug_transfer_to_handler, ret_from_debug_exc)
268#else 276
269#define DEBUG_EXCEPTION \ 277#define DEBUG_CRIT_EXCEPTION \
270 START_EXCEPTION(Debug); \ 278 START_EXCEPTION(DebugCrit); \
271 CRITICAL_EXCEPTION_PROLOG; \ 279 CRITICAL_EXCEPTION_PROLOG; \
272 \ 280 \
273 /* \ 281 /* \
@@ -287,8 +295,8 @@ label:
287 cmplw r12,r10; \ 295 cmplw r12,r10; \
288 blt+ 2f; /* addr below exception vectors */ \ 296 blt+ 2f; /* addr below exception vectors */ \
289 \ 297 \
290 lis r10,Debug@h; \ 298 lis r10,DebugCrit@h; \
291 ori r10,r10,Debug@l; \ 299 ori r10,r10,DebugCrit@l; \
292 cmplw r12,r10; \ 300 cmplw r12,r10; \
293 bgt+ 2f; /* addr above exception vectors */ \ 301 bgt+ 2f; /* addr above exception vectors */ \
294 \ 302 \
@@ -318,7 +326,6 @@ label:
3182: mfspr r4,SPRN_DBSR; \ 3262: mfspr r4,SPRN_DBSR; \
319 addi r3,r1,STACK_FRAME_OVERHEAD; \ 327 addi r3,r1,STACK_FRAME_OVERHEAD; \
320 EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, crit_transfer_to_handler, ret_from_crit_exc) 328 EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, crit_transfer_to_handler, ret_from_crit_exc)
321#endif
322 329
323#define INSTRUCTION_STORAGE_EXCEPTION \ 330#define INSTRUCTION_STORAGE_EXCEPTION \
324 START_EXCEPTION(InstructionStorage) \ 331 START_EXCEPTION(InstructionStorage) \
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 9f40b3e77100..4ff744143566 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -303,7 +303,10 @@ skpinv: addi r6,r6,1 /* Increment */
303 SET_IVOR(12, WatchdogTimer); 303 SET_IVOR(12, WatchdogTimer);
304 SET_IVOR(13, DataTLBError); 304 SET_IVOR(13, DataTLBError);
305 SET_IVOR(14, InstructionTLBError); 305 SET_IVOR(14, InstructionTLBError);
306 SET_IVOR(15, Debug); 306 SET_IVOR(15, DebugDebug);
307#if defined(CONFIG_E500)
308 SET_IVOR(15, DebugCrit);
309#endif
307 SET_IVOR(32, SPEUnavailable); 310 SET_IVOR(32, SPEUnavailable);
308 SET_IVOR(33, SPEFloatingPointData); 311 SET_IVOR(33, SPEFloatingPointData);
309 SET_IVOR(34, SPEFloatingPointRound); 312 SET_IVOR(34, SPEFloatingPointRound);
@@ -738,7 +741,10 @@ interrupt_base:
738 741
739 742
740 /* Debug Interrupt */ 743 /* Debug Interrupt */
741 DEBUG_EXCEPTION 744 DEBUG_DEBUG_EXCEPTION
745#if defined(CONFIG_E500)
746 DEBUG_CRIT_EXCEPTION
747#endif
742 748
743/* 749/*
744 * Local functions 750 * Local functions