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authorMaxime Ripard <maxime.ripard@free-electrons.com>2014-07-10 17:56:11 -0400
committerMaxime Ripard <maxime.ripard@free-electrons.com>2014-09-27 02:58:03 -0400
commiteaa18f5d0914b0151cefb52e2977a67ef21dfa64 (patch)
treebf3213e7ea162cd0ea69d844bfaeb9a68627f3ce
parent992a56e48996d4dea6cc25a35e180f696935925d (diff)
clk: sunxi: Move mbus to mod0 file
Move the MBUS clock to the module clocks file. It's pretty trivial, but still requires to enable the clocks to make sure it won't get disabled. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
-rw-r--r--drivers/clk/sunxi/clk-mod0.c12
-rw-r--r--drivers/clk/sunxi/clk-sunxi.c57
2 files changed, 12 insertions, 57 deletions
diff --git a/drivers/clk/sunxi/clk-mod0.c b/drivers/clk/sunxi/clk-mod0.c
index bce09a84ab4f..8a7f7036aea3 100644
--- a/drivers/clk/sunxi/clk-mod0.c
+++ b/drivers/clk/sunxi/clk-mod0.c
@@ -80,3 +80,15 @@ static void __init sun4i_a10_mod0_setup(struct device_node *node)
80 sunxi_factors_register(node, &sun4i_a10_mod0_data, &sun4i_a10_mod0_lock); 80 sunxi_factors_register(node, &sun4i_a10_mod0_data, &sun4i_a10_mod0_lock);
81} 81}
82CLK_OF_DECLARE(sun4i_a10_mod0, "allwinner,sun4i-a10-mod0-clk", sun4i_a10_mod0_setup); 82CLK_OF_DECLARE(sun4i_a10_mod0, "allwinner,sun4i-a10-mod0-clk", sun4i_a10_mod0_setup);
83
84static DEFINE_SPINLOCK(sun5i_a13_mbus_lock);
85
86static void __init sun5i_a13_mbus_setup(struct device_node *node)
87{
88 struct clk *mbus = sunxi_factors_register(node, &sun4i_a10_mod0_data, &sun5i_a13_mbus_lock);
89
90 /* The MBUS clocks needs to be always enabled */
91 __clk_get(mbus);
92 clk_prepare_enable(mbus);
93}
94CLK_OF_DECLARE(sun5i_a13_mbus, "allwinner,sun5i-a13-mbus-clk", sun5i_a13_mbus_setup);
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index fc5549447772..d5dc951264ca 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c
@@ -320,46 +320,6 @@ static void sun4i_get_apb1_factors(u32 *freq, u32 parent_rate,
320 320
321 321
322 322
323/**
324 * sun4i_get_mod0_factors() - calculates m, n factors for MOD0-style clocks
325 * MOD0 rate is calculated as follows
326 * rate = (parent_rate >> p) / (m + 1);
327 */
328
329static void sun4i_get_mod0_factors(u32 *freq, u32 parent_rate,
330 u8 *n, u8 *k, u8 *m, u8 *p)
331{
332 u8 div, calcm, calcp;
333
334 /* These clocks can only divide, so we will never be able to achieve
335 * frequencies higher than the parent frequency */
336 if (*freq > parent_rate)
337 *freq = parent_rate;
338
339 div = DIV_ROUND_UP(parent_rate, *freq);
340
341 if (div < 16)
342 calcp = 0;
343 else if (div / 2 < 16)
344 calcp = 1;
345 else if (div / 4 < 16)
346 calcp = 2;
347 else
348 calcp = 3;
349
350 calcm = DIV_ROUND_UP(div, 1 << calcp);
351
352 *freq = (parent_rate >> calcp) / calcm;
353
354 /* we were called to round the frequency, we can now return */
355 if (n == NULL)
356 return;
357
358 *m = calcm - 1;
359 *p = calcp;
360}
361
362
363 323
364/** 324/**
365 * sun7i_a20_get_out_factors() - calculates m, p factors for CLK_OUT_A/B 325 * sun7i_a20_get_out_factors() - calculates m, p factors for CLK_OUT_A/B
@@ -495,14 +455,6 @@ static struct clk_factors_config sun4i_apb1_config = {
495}; 455};
496 456
497/* user manual says "n" but it's really "p" */ 457/* user manual says "n" but it's really "p" */
498static struct clk_factors_config sun4i_mod0_config = {
499 .mshift = 0,
500 .mwidth = 4,
501 .pshift = 16,
502 .pwidth = 2,
503};
504
505/* user manual says "n" but it's really "p" */
506static struct clk_factors_config sun7i_a20_out_config = { 458static struct clk_factors_config sun7i_a20_out_config = {
507 .mshift = 8, 459 .mshift = 8,
508 .mwidth = 5, 460 .mwidth = 5,
@@ -559,13 +511,6 @@ static const struct factors_data sun4i_apb1_data __initconst = {
559 .getter = sun4i_get_apb1_factors, 511 .getter = sun4i_get_apb1_factors,
560}; 512};
561 513
562static const struct factors_data sun4i_mod0_data __initconst = {
563 .enable = 31,
564 .mux = 24,
565 .table = &sun4i_mod0_config,
566 .getter = sun4i_get_mod0_factors,
567};
568
569static const struct factors_data sun7i_a20_out_data __initconst = { 514static const struct factors_data sun7i_a20_out_data __initconst = {
570 .enable = 31, 515 .enable = 31,
571 .mux = 24, 516 .mux = 24,
@@ -1119,7 +1064,6 @@ static const struct of_device_id clk_factors_match[] __initconst = {
1119 {.compatible = "allwinner,sun7i-a20-pll4-clk", .data = &sun7i_a20_pll4_data,}, 1064 {.compatible = "allwinner,sun7i-a20-pll4-clk", .data = &sun7i_a20_pll4_data,},
1120 {.compatible = "allwinner,sun6i-a31-pll6-clk", .data = &sun6i_a31_pll6_data,}, 1065 {.compatible = "allwinner,sun6i-a31-pll6-clk", .data = &sun6i_a31_pll6_data,},
1121 {.compatible = "allwinner,sun4i-a10-apb1-clk", .data = &sun4i_apb1_data,}, 1066 {.compatible = "allwinner,sun4i-a10-apb1-clk", .data = &sun4i_apb1_data,},
1122 {.compatible = "allwinner,sun5i-a13-mbus-clk", .data = &sun4i_mod0_data,},
1123 {.compatible = "allwinner,sun7i-a20-out-clk", .data = &sun7i_a20_out_data,}, 1067 {.compatible = "allwinner,sun7i-a20-out-clk", .data = &sun7i_a20_out_data,},
1124 {} 1068 {}
1125}; 1069};
@@ -1231,7 +1175,6 @@ static void __init sun4i_a10_init_clocks(struct device_node *node)
1231CLK_OF_DECLARE(sun4i_a10_clk_init, "allwinner,sun4i-a10", sun4i_a10_init_clocks); 1175CLK_OF_DECLARE(sun4i_a10_clk_init, "allwinner,sun4i-a10", sun4i_a10_init_clocks);
1232 1176
1233static const char *sun5i_critical_clocks[] __initdata = { 1177static const char *sun5i_critical_clocks[] __initdata = {
1234 "mbus",
1235 "pll5_ddr", 1178 "pll5_ddr",
1236 "ahb_sdram", 1179 "ahb_sdram",
1237}; 1180};