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authorChad Williamson <chad@dahc.us>2013-06-17 23:32:02 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-06-18 14:34:08 -0400
commitea675ee5b8e2f9eb3d30df48f73b871df1aac3ac (patch)
treebabe0b49d3cb91a8b17b8a756bce29616891852a
parent79931639015a79d2d0ccde4334294ad15128ea44 (diff)
Staging: silicom: remove unnecessary braces in bpctl_mod.c
Remove unnecessary braces in bpctl_mod.c, resolving checkpatch.pl warnings. Signed-off-by: Chad Williamson <chad@dahc.us> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/staging/silicom/bpctl_mod.c58
1 files changed, 23 insertions, 35 deletions
diff --git a/drivers/staging/silicom/bpctl_mod.c b/drivers/staging/silicom/bpctl_mod.c
index bb29074b5621..9c10cdd74fa4 100644
--- a/drivers/staging/silicom/bpctl_mod.c
+++ b/drivers/staging/silicom/bpctl_mod.c
@@ -721,16 +721,15 @@ static int read_pulse(bpctl_dev_t *pbpctl_dev, unsigned int ctrl_ext,
721 BP10G_MDIO_DATA_OUT)); 721 BP10G_MDIO_DATA_OUT));
722 722
723 } 723 }
724 if (pbpctl_dev->bp_10g9) {
725 ctrl_ext = BP10G_READ_REG(pbpctl_dev, I2CCTL);
726 724
727 } else if ((pbpctl_dev->bp_fiber5) || (pbpctl_dev->bp_i80)) { 725 if (pbpctl_dev->bp_10g9)
726 ctrl_ext = BP10G_READ_REG(pbpctl_dev, I2CCTL);
727 else if ((pbpctl_dev->bp_fiber5) || (pbpctl_dev->bp_i80))
728 ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL); 728 ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL);
729 } else if (pbpctl_dev->bp_540) { 729 else if (pbpctl_dev->bp_540)
730 ctrl_ext = BP10G_READ_REG(pbpctl_dev, ESDP); 730 ctrl_ext = BP10G_READ_REG(pbpctl_dev, ESDP);
731 } else if (pbpctl_dev->bp_10gb) 731 else if (pbpctl_dev->bp_10gb)
732 ctrl_ext = BP10GB_READ_REG(pbpctl_dev, MISC_REG_SPIO); 732 ctrl_ext = BP10GB_READ_REG(pbpctl_dev, MISC_REG_SPIO);
733
734 else if (!pbpctl_dev->bp_10g) 733 else if (!pbpctl_dev->bp_10g)
735 ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); 734 ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT);
736 else 735 else
@@ -1921,13 +1920,10 @@ int disc_port_on(bpctl_dev_t *pbpctl_dev)
1921 return BP_NOT_CAP; 1920 return BP_NOT_CAP;
1922 1921
1923 if (pbpctl_dev_m->bp_caps_ex & DISC_PORT_CAP_EX) { 1922 if (pbpctl_dev_m->bp_caps_ex & DISC_PORT_CAP_EX) {
1924 if (is_bypass_fn(pbpctl_dev) == 1) { 1923 if (is_bypass_fn(pbpctl_dev) == 1)
1925
1926 write_data(pbpctl_dev_m, TX_DISA); 1924 write_data(pbpctl_dev_m, TX_DISA);
1927 } else { 1925 else
1928
1929 write_data(pbpctl_dev_m, TX_DISB); 1926 write_data(pbpctl_dev_m, TX_DISB);
1930 }
1931 1927
1932 msec_delay_bp(LATCH_DELAY); 1928 msec_delay_bp(LATCH_DELAY);
1933 1929
@@ -2018,9 +2014,9 @@ int wdt_off(bpctl_dev_t *pbpctl_dev)
2018 int ret = BP_NOT_CAP; 2014 int ret = BP_NOT_CAP;
2019 2015
2020 if (pbpctl_dev->bp_caps & WD_CTL_CAP) { 2016 if (pbpctl_dev->bp_caps & WD_CTL_CAP) {
2021 if (INTEL_IF_SERIES(pbpctl_dev->subdevice)) { 2017 if (INTEL_IF_SERIES(pbpctl_dev->subdevice))
2022 bypass_off(pbpctl_dev); 2018 bypass_off(pbpctl_dev);
2023 } else if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) 2019 else if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER)
2024 write_data(pbpctl_dev, WDT_OFF); 2020 write_data(pbpctl_dev, WDT_OFF);
2025 else 2021 else
2026 data_pulse(pbpctl_dev, WDT_OFF); 2022 data_pulse(pbpctl_dev, WDT_OFF);
@@ -2407,12 +2403,10 @@ static int set_tx(bpctl_dev_t *pbpctl_dev, int tx_state)
2407 } 2403 }
2408 2404
2409 } 2405 }
2410 if (pbpctl_dev->bp_fiber5) { 2406 if (pbpctl_dev->bp_fiber5)
2411 ctrl = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); 2407 ctrl = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT);
2412 2408 else if (pbpctl_dev->bp_10gb)
2413 } else if (pbpctl_dev->bp_10gb)
2414 ctrl = BP10GB_READ_REG(pbpctl_dev, MISC_REG_GPIO); 2409 ctrl = BP10GB_READ_REG(pbpctl_dev, MISC_REG_GPIO);
2415
2416 else if (!pbpctl_dev->bp_10g) 2410 else if (!pbpctl_dev->bp_10g)
2417 ctrl = BPCTL_READ_REG(pbpctl_dev, CTRL); 2411 ctrl = BPCTL_READ_REG(pbpctl_dev, CTRL);
2418 else 2412 else
@@ -4057,9 +4051,8 @@ void bypass_caps_init(bpctl_dev_t *pbpctl_dev)
4057 pbpctl_dev->bp_caps |= 4051 pbpctl_dev->bp_caps |=
4058 (TX_CTL_CAP | TX_STATUS_CAP | TPL_CAP); 4052 (TX_CTL_CAP | TX_STATUS_CAP | TPL_CAP);
4059 4053
4060 if (TPL_IF_SERIES(pbpctl_dev->subdevice)) { 4054 if (TPL_IF_SERIES(pbpctl_dev->subdevice))
4061 pbpctl_dev->bp_caps |= TPL_CAP; 4055 pbpctl_dev->bp_caps |= TPL_CAP;
4062 }
4063 4056
4064 if (INTEL_IF_SERIES(pbpctl_dev->subdevice)) { 4057 if (INTEL_IF_SERIES(pbpctl_dev->subdevice)) {
4065 pbpctl_dev->bp_caps |= 4058 pbpctl_dev->bp_caps |=
@@ -4199,9 +4192,9 @@ void bypass_caps_init(bpctl_dev_t *pbpctl_dev)
4199 if (PEG5_IF_SERIES(pbpctl_dev->subdevice)) 4192 if (PEG5_IF_SERIES(pbpctl_dev->subdevice))
4200 pbpctl_dev->bp_caps |= (TX_CTL_CAP | TX_STATUS_CAP); 4193 pbpctl_dev->bp_caps |= (TX_CTL_CAP | TX_STATUS_CAP);
4201 4194
4202 if (BP10GB_IF_SERIES(pbpctl_dev->subdevice)) { 4195 if (BP10GB_IF_SERIES(pbpctl_dev->subdevice))
4203 pbpctl_dev->bp_caps &= ~(TX_CTL_CAP | TX_STATUS_CAP); 4196 pbpctl_dev->bp_caps &= ~(TX_CTL_CAP | TX_STATUS_CAP);
4204 } 4197
4205 pbpctl_dev_m = get_master_port_fn(pbpctl_dev); 4198 pbpctl_dev_m = get_master_port_fn(pbpctl_dev);
4206 if (pbpctl_dev_m != NULL) { 4199 if (pbpctl_dev_m != NULL) {
4207 int cap_reg = 0; 4200 int cap_reg = 0;
@@ -4330,10 +4323,9 @@ int set_bypass_wd_auto(bpctl_dev_t *pbpctl_dev, unsigned int param)
4330 4323
4331int get_bypass_wd_auto(bpctl_dev_t *pbpctl_dev) 4324int get_bypass_wd_auto(bpctl_dev_t *pbpctl_dev)
4332{ 4325{
4333 4326 if (pbpctl_dev->bp_caps & WD_CTL_CAP)
4334 if (pbpctl_dev->bp_caps & WD_CTL_CAP) {
4335 return pbpctl_dev->reset_time; 4327 return pbpctl_dev->reset_time;
4336 } 4328
4337 return BP_NOT_CAP; 4329 return BP_NOT_CAP;
4338} 4330}
4339 4331
@@ -5039,23 +5031,19 @@ static void bp_tpl_timer_fn(unsigned long param)
5039 5031
5040 link2 = get_bypass_link_status(pbpctl_dev_b); 5032 link2 = get_bypass_link_status(pbpctl_dev_b);
5041 if ((link1) && (tx_status(pbpctl_dev))) { 5033 if ((link1) && (tx_status(pbpctl_dev))) {
5042 if ((!link2) && (tx_status(pbpctl_dev_b))) { 5034 if ((!link2) && (tx_status(pbpctl_dev_b)))
5043 set_tx(pbpctl_dev, 0); 5035 set_tx(pbpctl_dev, 0);
5044 } else if (!tx_status(pbpctl_dev_b)) { 5036 else if (!tx_status(pbpctl_dev_b))
5045 set_tx(pbpctl_dev_b, 1); 5037 set_tx(pbpctl_dev_b, 1);
5046 }
5047 } else if ((!link1) && (tx_status(pbpctl_dev))) { 5038 } else if ((!link1) && (tx_status(pbpctl_dev))) {
5048 if ((link2) && (tx_status(pbpctl_dev_b))) { 5039 if ((link2) && (tx_status(pbpctl_dev_b)))
5049 set_tx(pbpctl_dev_b, 0); 5040 set_tx(pbpctl_dev_b, 0);
5050 }
5051 } else if ((link1) && (!tx_status(pbpctl_dev))) { 5041 } else if ((link1) && (!tx_status(pbpctl_dev))) {
5052 if ((link2) && (tx_status(pbpctl_dev_b))) { 5042 if ((link2) && (tx_status(pbpctl_dev_b)))
5053 set_tx(pbpctl_dev, 1); 5043 set_tx(pbpctl_dev, 1);
5054 }
5055 } else if ((!link1) && (!tx_status(pbpctl_dev))) { 5044 } else if ((!link1) && (!tx_status(pbpctl_dev))) {
5056 if ((link2) && (tx_status(pbpctl_dev_b))) { 5045 if ((link2) && (tx_status(pbpctl_dev_b)))
5057 set_tx(pbpctl_dev, 1); 5046 set_tx(pbpctl_dev, 1);
5058 }
5059 } 5047 }
5060 5048
5061 mod_timer(&pbpctl_dev->bp_tpl_timer, jiffies + BP_LINK_MON_DELAY * HZ); 5049 mod_timer(&pbpctl_dev->bp_tpl_timer, jiffies + BP_LINK_MON_DELAY * HZ);
@@ -5114,9 +5102,9 @@ int get_bypass_tpl_auto(bpctl_dev_t *pbpctl_dev)
5114{ 5102{
5115 if (!pbpctl_dev) 5103 if (!pbpctl_dev)
5116 return -1; 5104 return -1;
5117 if (pbpctl_dev->bp_caps & TPL_CAP) { 5105 if (pbpctl_dev->bp_caps & TPL_CAP)
5118 return pbpctl_dev->bp_tpl_flag; 5106 return pbpctl_dev->bp_tpl_flag;
5119 } 5107
5120 return BP_NOT_CAP; 5108 return BP_NOT_CAP;
5121} 5109}
5122 5110