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authorRichard Kuo <rkuo@codeaurora.org>2014-04-15 16:41:17 -0400
committerRichard Kuo <rkuo@codeaurora.org>2014-12-16 14:27:30 -0500
commitea0f1b92150fb368d26e38c0a0e9ab244b95be03 (patch)
treec1d86aa546b3165bcdd0a1f4607e04587f7bbda7
parentf6b708c19d6f1791ccfbb20543c64466ef7a5f83 (diff)
Hexagon: set ARCH_DMA_MINALIGN
Signed-off-by: Richard Kuo <rkuo@codeaurora.org>
-rw-r--r--arch/hexagon/include/asm/cache.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/hexagon/include/asm/cache.h b/arch/hexagon/include/asm/cache.h
index 263511719a4a..69952c184207 100644
--- a/arch/hexagon/include/asm/cache.h
+++ b/arch/hexagon/include/asm/cache.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * Cache definitions for the Hexagon architecture 2 * Cache definitions for the Hexagon architecture
3 * 3 *
4 * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2010-2011,2014 The Linux Foundation. All rights reserved.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 and 7 * it under the terms of the GNU General Public License version 2 and
@@ -25,6 +25,8 @@
25#define L1_CACHE_SHIFT (5) 25#define L1_CACHE_SHIFT (5)
26#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) 26#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
27 27
28#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
29
28#define __cacheline_aligned __aligned(L1_CACHE_BYTES) 30#define __cacheline_aligned __aligned(L1_CACHE_BYTES)
29#define ____cacheline_aligned __aligned(L1_CACHE_BYTES) 31#define ____cacheline_aligned __aligned(L1_CACHE_BYTES)
30 32