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authorDaniel Vetter <daniel.vetter@ffwll.ch>2013-05-31 11:49:17 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-05-31 15:00:29 -0400
commite7a639c445e1f7c44adc1665539fa8e3af0b8e30 (patch)
tree7056bda5ea27d33ba21fa5575f20a199e7dbb9a6
parenta1f2cc73c762868435ae6ec9126bb2240337c61c (diff)
drm/i915: fix up the edp power well check
Now that we track the cpu transcoder we need accurately in the pipe config we can finally fix up the transcoder check. With the current code eDP on port D will be broken since we'd errornously cut the power. For reference see commit 2124b72e6283c4e84a55e71077fee91793f4c801 Author: Paulo Zanoni <paulo.r.zanoni@intel.com> Date: Fri Mar 22 14:07:23 2013 -0300 drm/i915: don't disable the power well yet v2: - Kill the now outdated comment (Paulo) - Add the missing crtc->base.enabled check and consolidate it (Paulo) - Smash all checks together, looks neater that way. v3: Kill the unused encoder variable. Cc: Takashi Iwai <tiwai@suse.de> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/intel_display.c18
1 files changed, 4 insertions, 14 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 161b064592af..2e2c6a370f52 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5793,23 +5793,13 @@ static void haswell_modeset_global_resources(struct drm_device *dev)
5793{ 5793{
5794 bool enable = false; 5794 bool enable = false;
5795 struct intel_crtc *crtc; 5795 struct intel_crtc *crtc;
5796 struct intel_encoder *encoder;
5797 5796
5798 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) { 5797 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
5799 if (crtc->pipe != PIPE_A && crtc->base.enabled) 5798 if (!crtc->base.enabled)
5800 enable = true; 5799 continue;
5801 /* XXX: Should check for edp transcoder here, but thanks to init
5802 * sequence that's not yet available. Just in case desktop eDP
5803 * on PORT D is possible on haswell, too. */
5804 /* Even the eDP panel fitter is outside the always-on well. */
5805 if (crtc->config.pch_pfit.size && crtc->base.enabled)
5806 enable = true;
5807 }
5808 5800
5809 list_for_each_entry(encoder, &dev->mode_config.encoder_list, 5801 if (crtc->pipe != PIPE_A || crtc->config.pch_pfit.size ||
5810 base.head) { 5802 crtc->config.cpu_transcoder != TRANSCODER_EDP)
5811 if (encoder->type != INTEL_OUTPUT_EDP &&
5812 encoder->connectors_active)
5813 enable = true; 5803 enable = true;
5814 } 5804 }
5815 5805