diff options
author | Martin Bugge <marbugge@cisco.com> | 2013-12-10 08:57:03 -0500 |
---|---|---|
committer | Mauro Carvalho Chehab <m.chehab@samsung.com> | 2014-01-07 03:21:18 -0500 |
commit | e78d834a2e39e86d733fdca41fc931dc5ecc4660 (patch) | |
tree | 5cc6486c21d564632d92981faeda01c3152282d5 | |
parent | 591b72fe739cb2fcb8052eff02feaa2d4a52fbca (diff) |
[media] adv7842: Re-worked query_dv_timings()
This simplified the code quite a bit.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-rw-r--r-- | drivers/media/i2c/adv7842.c | 112 |
1 files changed, 35 insertions, 77 deletions
diff --git a/drivers/media/i2c/adv7842.c b/drivers/media/i2c/adv7842.c index b154f36740b4..22fa4ca8b51b 100644 --- a/drivers/media/i2c/adv7842.c +++ b/drivers/media/i2c/adv7842.c | |||
@@ -1314,6 +1314,8 @@ static int adv7842_query_dv_timings(struct v4l2_subdev *sd, | |||
1314 | struct v4l2_bt_timings *bt = &timings->bt; | 1314 | struct v4l2_bt_timings *bt = &timings->bt; |
1315 | struct stdi_readback stdi = { 0 }; | 1315 | struct stdi_readback stdi = { 0 }; |
1316 | 1316 | ||
1317 | v4l2_dbg(1, debug, sd, "%s:\n", __func__); | ||
1318 | |||
1317 | /* SDP block */ | 1319 | /* SDP block */ |
1318 | if (state->mode == ADV7842_MODE_SDP) | 1320 | if (state->mode == ADV7842_MODE_SDP) |
1319 | return -ENODATA; | 1321 | return -ENODATA; |
@@ -1325,92 +1327,46 @@ static int adv7842_query_dv_timings(struct v4l2_subdev *sd, | |||
1325 | } | 1327 | } |
1326 | bt->interlaced = stdi.interlaced ? | 1328 | bt->interlaced = stdi.interlaced ? |
1327 | V4L2_DV_INTERLACED : V4L2_DV_PROGRESSIVE; | 1329 | V4L2_DV_INTERLACED : V4L2_DV_PROGRESSIVE; |
1328 | bt->polarities = ((hdmi_read(sd, 0x05) & 0x10) ? V4L2_DV_VSYNC_POS_POL : 0) | | ||
1329 | ((hdmi_read(sd, 0x05) & 0x20) ? V4L2_DV_HSYNC_POS_POL : 0); | ||
1330 | bt->vsync = stdi.lcvs; | ||
1331 | 1330 | ||
1332 | if (is_digital_input(sd)) { | 1331 | if (is_digital_input(sd)) { |
1333 | bool lock = hdmi_read(sd, 0x04) & 0x02; | 1332 | uint32_t freq; |
1334 | bool interlaced = hdmi_read(sd, 0x0b) & 0x20; | 1333 | |
1335 | unsigned w = (hdmi_read(sd, 0x07) & 0x1f) * 256 + hdmi_read(sd, 0x08); | 1334 | timings->type = V4L2_DV_BT_656_1120; |
1336 | unsigned h = (hdmi_read(sd, 0x09) & 0x1f) * 256 + hdmi_read(sd, 0x0a); | 1335 | bt->width = (hdmi_read(sd, 0x07) & 0x0f) * 256 + hdmi_read(sd, 0x08); |
1337 | unsigned w_total = (hdmi_read(sd, 0x1e) & 0x3f) * 256 + | 1336 | bt->height = (hdmi_read(sd, 0x09) & 0x0f) * 256 + hdmi_read(sd, 0x0a); |
1338 | hdmi_read(sd, 0x1f); | 1337 | freq = (hdmi_read(sd, 0x06) * 1000000) + |
1339 | unsigned h_total = ((hdmi_read(sd, 0x26) & 0x3f) * 256 + | 1338 | ((hdmi_read(sd, 0x3b) & 0x30) >> 4) * 250000; |
1340 | hdmi_read(sd, 0x27)) / 2; | ||
1341 | unsigned freq = (((hdmi_read(sd, 0x51) << 1) + | ||
1342 | (hdmi_read(sd, 0x52) >> 7)) * 1000000) + | ||
1343 | ((hdmi_read(sd, 0x52) & 0x7f) * 1000000) / 128; | ||
1344 | int i; | ||
1345 | 1339 | ||
1346 | if (is_hdmi(sd)) { | 1340 | if (is_hdmi(sd)) { |
1347 | /* adjust for deep color mode */ | 1341 | /* adjust for deep color mode */ |
1348 | freq = freq * 8 / (((hdmi_read(sd, 0x0b) & 0xc0)>>6) * 2 + 8); | 1342 | freq = freq * 8 / (((hdmi_read(sd, 0x0b) & 0xc0) >> 5) + 8); |
1349 | } | ||
1350 | |||
1351 | /* No lock? */ | ||
1352 | if (!lock) { | ||
1353 | v4l2_dbg(1, debug, sd, "%s: no lock on TMDS signal\n", __func__); | ||
1354 | return -ENOLCK; | ||
1355 | } | 1343 | } |
1356 | /* Interlaced? */ | 1344 | bt->pixelclock = freq; |
1357 | if (interlaced) { | 1345 | bt->hfrontporch = (hdmi_read(sd, 0x20) & 0x03) * 256 + |
1358 | v4l2_dbg(1, debug, sd, "%s: interlaced video not supported\n", __func__); | ||
1359 | return -ERANGE; | ||
1360 | } | ||
1361 | |||
1362 | for (i = 0; v4l2_dv_timings_presets[i].bt.width; i++) { | ||
1363 | const struct v4l2_bt_timings *bt = &v4l2_dv_timings_presets[i].bt; | ||
1364 | |||
1365 | if (!v4l2_valid_dv_timings(&v4l2_dv_timings_presets[i], | ||
1366 | adv7842_get_dv_timings_cap(sd), | ||
1367 | adv7842_check_dv_timings, NULL)) | ||
1368 | continue; | ||
1369 | if (w_total != htotal(bt) || h_total != vtotal(bt)) | ||
1370 | continue; | ||
1371 | |||
1372 | if (w != bt->width || h != bt->height) | ||
1373 | continue; | ||
1374 | |||
1375 | if (abs(freq - bt->pixelclock) > 1000000) | ||
1376 | continue; | ||
1377 | *timings = v4l2_dv_timings_presets[i]; | ||
1378 | return 0; | ||
1379 | } | ||
1380 | |||
1381 | timings->type = V4L2_DV_BT_656_1120; | ||
1382 | |||
1383 | bt->width = w; | ||
1384 | bt->height = h; | ||
1385 | bt->interlaced = (hdmi_read(sd, 0x0b) & 0x20) ? | ||
1386 | V4L2_DV_INTERLACED : V4L2_DV_PROGRESSIVE; | ||
1387 | bt->polarities = ((hdmi_read(sd, 0x05) & 0x10) ? | ||
1388 | V4L2_DV_VSYNC_POS_POL : 0) | ((hdmi_read(sd, 0x05) & 0x20) ? | ||
1389 | V4L2_DV_HSYNC_POS_POL : 0); | ||
1390 | bt->pixelclock = (((hdmi_read(sd, 0x51) << 1) + | ||
1391 | (hdmi_read(sd, 0x52) >> 7)) * 1000000) + | ||
1392 | ((hdmi_read(sd, 0x52) & 0x7f) * 1000000) / 128; | ||
1393 | bt->hfrontporch = (hdmi_read(sd, 0x20) & 0x1f) * 256 + | ||
1394 | hdmi_read(sd, 0x21); | 1346 | hdmi_read(sd, 0x21); |
1395 | bt->hsync = (hdmi_read(sd, 0x22) & 0x1f) * 256 + | 1347 | bt->hsync = (hdmi_read(sd, 0x22) & 0x03) * 256 + |
1396 | hdmi_read(sd, 0x23); | 1348 | hdmi_read(sd, 0x23); |
1397 | bt->hbackporch = (hdmi_read(sd, 0x24) & 0x1f) * 256 + | 1349 | bt->hbackporch = (hdmi_read(sd, 0x24) & 0x03) * 256 + |
1398 | hdmi_read(sd, 0x25); | 1350 | hdmi_read(sd, 0x25); |
1399 | bt->vfrontporch = ((hdmi_read(sd, 0x2a) & 0x3f) * 256 + | 1351 | bt->vfrontporch = ((hdmi_read(sd, 0x2a) & 0x1f) * 256 + |
1400 | hdmi_read(sd, 0x2b)) / 2; | 1352 | hdmi_read(sd, 0x2b)) / 2; |
1401 | bt->il_vfrontporch = ((hdmi_read(sd, 0x2c) & 0x3f) * 256 + | 1353 | bt->vsync = ((hdmi_read(sd, 0x2e) & 0x1f) * 256 + |
1402 | hdmi_read(sd, 0x2d)) / 2; | 1354 | hdmi_read(sd, 0x2f)) / 2; |
1403 | bt->vsync = ((hdmi_read(sd, 0x2e) & 0x3f) * 256 + | 1355 | bt->vbackporch = ((hdmi_read(sd, 0x32) & 0x1f) * 256 + |
1404 | hdmi_read(sd, 0x2f)) / 2; | 1356 | hdmi_read(sd, 0x33)) / 2; |
1405 | bt->il_vsync = ((hdmi_read(sd, 0x30) & 0x3f) * 256 + | 1357 | bt->polarities = ((hdmi_read(sd, 0x05) & 0x10) ? V4L2_DV_VSYNC_POS_POL : 0) | |
1406 | hdmi_read(sd, 0x31)) / 2; | 1358 | ((hdmi_read(sd, 0x05) & 0x20) ? V4L2_DV_HSYNC_POS_POL : 0); |
1407 | bt->vbackporch = ((hdmi_read(sd, 0x32) & 0x3f) * 256 + | 1359 | if (bt->interlaced == V4L2_DV_INTERLACED) { |
1408 | hdmi_read(sd, 0x33)) / 2; | 1360 | bt->height += (hdmi_read(sd, 0x0b) & 0x0f) * 256 + |
1409 | bt->il_vbackporch = ((hdmi_read(sd, 0x34) & 0x3f) * 256 + | 1361 | hdmi_read(sd, 0x0c); |
1410 | hdmi_read(sd, 0x35)) / 2; | 1362 | bt->il_vfrontporch = ((hdmi_read(sd, 0x2c) & 0x1f) * 256 + |
1411 | 1363 | hdmi_read(sd, 0x2d)) / 2; | |
1412 | bt->standards = 0; | 1364 | bt->il_vsync = ((hdmi_read(sd, 0x30) & 0x1f) * 256 + |
1413 | bt->flags = 0; | 1365 | hdmi_read(sd, 0x31)) / 2; |
1366 | bt->vbackporch = ((hdmi_read(sd, 0x34) & 0x1f) * 256 + | ||
1367 | hdmi_read(sd, 0x35)) / 2; | ||
1368 | } | ||
1369 | adv7842_fill_optional_dv_timings_fields(sd, timings); | ||
1414 | } else { | 1370 | } else { |
1415 | /* Interlaced? */ | 1371 | /* Interlaced? */ |
1416 | if (stdi.interlaced) { | 1372 | if (stdi.interlaced) { |
@@ -1437,6 +1393,8 @@ static int adv7842_s_dv_timings(struct v4l2_subdev *sd, | |||
1437 | struct v4l2_bt_timings *bt; | 1393 | struct v4l2_bt_timings *bt; |
1438 | int err; | 1394 | int err; |
1439 | 1395 | ||
1396 | v4l2_dbg(1, debug, sd, "%s:\n", __func__); | ||
1397 | |||
1440 | if (state->mode == ADV7842_MODE_SDP) | 1398 | if (state->mode == ADV7842_MODE_SDP) |
1441 | return -ENODATA; | 1399 | return -ENODATA; |
1442 | 1400 | ||