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authorTvrtko Ursulin <tvrtko.ursulin@intel.com>2015-03-23 07:10:33 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-03-23 09:56:56 -0400
commite6617330920fdc705220f57a7dd6f8c7da4ae21d (patch)
treedab24475026b3db84e86287122b2018d590a02f3
parent6761dd3185a76c5d9ae0141e08f123d97d7f303b (diff)
drm/i915: Use GGTT view when (un)pinning objects to planes
To support frame buffer rotation we need to be able to pass on the information on what kind of GGTT view is required for display. This patch just adds the parameter and makes all the callers default to the normal view. v2: Rebased for ggtt view changes. v3: Don't limit PIN_MAPPABLE to normal views just yet. (Joonas Lahtinen) Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> (v3) [danvet: s/BUG/WARN/ in the patch hunk because. At least where the BUG_ON isn't fatal right away.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h14
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c22
-rw-r--r--drivers/gpu/drm/i915/intel_display.c7
-rw-r--r--drivers/gpu/drm/i915/intel_overlay.c3
4 files changed, 30 insertions, 16 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index eb38cd1ef216..e7ed5b3d133f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2765,8 +2765,10 @@ i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, bool write);
2765int __must_check 2765int __must_check
2766i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj, 2766i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
2767 u32 alignment, 2767 u32 alignment,
2768 struct intel_engine_cs *pipelined); 2768 struct intel_engine_cs *pipelined,
2769void i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj); 2769 const struct i915_ggtt_view *view);
2770void i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj,
2771 const struct i915_ggtt_view *view);
2770int i915_gem_object_attach_phys(struct drm_i915_gem_object *obj, 2772int i915_gem_object_attach_phys(struct drm_i915_gem_object *obj,
2771 int align); 2773 int align);
2772int i915_gem_open(struct drm_device *dev, struct drm_file *file); 2774int i915_gem_open(struct drm_device *dev, struct drm_file *file);
@@ -2875,7 +2877,13 @@ i915_gem_object_ggtt_unbind(struct drm_i915_gem_object *obj)
2875 return i915_vma_unbind(i915_gem_obj_to_ggtt(obj)); 2877 return i915_vma_unbind(i915_gem_obj_to_ggtt(obj));
2876} 2878}
2877 2879
2878void i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj); 2880void i915_gem_object_ggtt_unpin_view(struct drm_i915_gem_object *obj,
2881 const struct i915_ggtt_view *view);
2882static inline void
2883i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj)
2884{
2885 i915_gem_object_ggtt_unpin_view(obj, &i915_ggtt_view_normal);
2886}
2879 2887
2880/* i915_gem_context.c */ 2888/* i915_gem_context.c */
2881int __must_check i915_gem_context_init(struct drm_device *dev); 2889int __must_check i915_gem_context_init(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 84e2a231b03c..31978b07b6a6 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3871,7 +3871,8 @@ static bool is_pin_display(struct drm_i915_gem_object *obj)
3871int 3871int
3872i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj, 3872i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
3873 u32 alignment, 3873 u32 alignment,
3874 struct intel_engine_cs *pipelined) 3874 struct intel_engine_cs *pipelined,
3875 const struct i915_ggtt_view *view)
3875{ 3876{
3876 u32 old_read_domains, old_write_domain; 3877 u32 old_read_domains, old_write_domain;
3877 bool was_pin_display; 3878 bool was_pin_display;
@@ -3907,7 +3908,7 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
3907 * (e.g. libkms for the bootup splash), we have to ensure that we 3908 * (e.g. libkms for the bootup splash), we have to ensure that we
3908 * always use map_and_fenceable for all scanout buffers. 3909 * always use map_and_fenceable for all scanout buffers.
3909 */ 3910 */
3910 ret = i915_gem_obj_ggtt_pin(obj, alignment, PIN_MAPPABLE); 3911 ret = i915_gem_object_ggtt_pin(obj, view, alignment, PIN_MAPPABLE);
3911 if (ret) 3912 if (ret)
3912 goto err_unpin_display; 3913 goto err_unpin_display;
3913 3914
@@ -3935,9 +3936,11 @@ err_unpin_display:
3935} 3936}
3936 3937
3937void 3938void
3938i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj) 3939i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj,
3940 const struct i915_ggtt_view *view)
3939{ 3941{
3940 i915_gem_object_ggtt_unpin(obj); 3942 i915_gem_object_ggtt_unpin_view(obj, view);
3943
3941 obj->pin_display = is_pin_display(obj); 3944 obj->pin_display = is_pin_display(obj);
3942} 3945}
3943 3946
@@ -4214,15 +4217,16 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
4214} 4217}
4215 4218
4216void 4219void
4217i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj) 4220i915_gem_object_ggtt_unpin_view(struct drm_i915_gem_object *obj,
4221 const struct i915_ggtt_view *view)
4218{ 4222{
4219 struct i915_vma *vma = i915_gem_obj_to_ggtt(obj); 4223 struct i915_vma *vma = i915_gem_obj_to_ggtt_view(obj, view);
4220 4224
4221 BUG_ON(!vma); 4225 BUG_ON(!vma);
4222 BUG_ON(vma->pin_count == 0); 4226 WARN_ON(vma->pin_count == 0);
4223 BUG_ON(!i915_gem_obj_ggtt_bound(obj)); 4227 WARN_ON(!i915_gem_obj_ggtt_bound_view(obj, view->type));
4224 4228
4225 if (--vma->pin_count == 0) 4229 if (--vma->pin_count == 0 && view->type == I915_GGTT_VIEW_NORMAL)
4226 obj->pin_mappable = false; 4230 obj->pin_mappable = false;
4227} 4231}
4228 4232
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3b9ce89d2a98..39380f414aff 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2350,7 +2350,8 @@ intel_pin_and_fence_fb_obj(struct drm_plane *plane,
2350 intel_runtime_pm_get(dev_priv); 2350 intel_runtime_pm_get(dev_priv);
2351 2351
2352 dev_priv->mm.interruptible = false; 2352 dev_priv->mm.interruptible = false;
2353 ret = i915_gem_object_pin_to_display_plane(obj, alignment, pipelined); 2353 ret = i915_gem_object_pin_to_display_plane(obj, alignment, pipelined,
2354 &i915_ggtt_view_normal);
2354 if (ret) 2355 if (ret)
2355 goto err_interruptible; 2356 goto err_interruptible;
2356 2357
@@ -2370,7 +2371,7 @@ intel_pin_and_fence_fb_obj(struct drm_plane *plane,
2370 return 0; 2371 return 0;
2371 2372
2372err_unpin: 2373err_unpin:
2373 i915_gem_object_unpin_from_display_plane(obj); 2374 i915_gem_object_unpin_from_display_plane(obj, &i915_ggtt_view_normal);
2374err_interruptible: 2375err_interruptible:
2375 dev_priv->mm.interruptible = true; 2376 dev_priv->mm.interruptible = true;
2376 intel_runtime_pm_put(dev_priv); 2377 intel_runtime_pm_put(dev_priv);
@@ -2382,7 +2383,7 @@ static void intel_unpin_fb_obj(struct drm_i915_gem_object *obj)
2382 WARN_ON(!mutex_is_locked(&obj->base.dev->struct_mutex)); 2383 WARN_ON(!mutex_is_locked(&obj->base.dev->struct_mutex));
2383 2384
2384 i915_gem_object_unpin_fence(obj); 2385 i915_gem_object_unpin_fence(obj);
2385 i915_gem_object_unpin_from_display_plane(obj); 2386 i915_gem_object_unpin_from_display_plane(obj, &i915_ggtt_view_normal);
2386} 2387}
2387 2388
2388/* Computes the linear offset to the base tile and adjusts x, y. bytes per pixel 2389/* Computes the linear offset to the base tile and adjusts x, y. bytes per pixel
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index 823d1d97a000..dd92122ed95c 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -720,7 +720,8 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
720 if (ret != 0) 720 if (ret != 0)
721 return ret; 721 return ret;
722 722
723 ret = i915_gem_object_pin_to_display_plane(new_bo, 0, NULL); 723 ret = i915_gem_object_pin_to_display_plane(new_bo, 0, NULL,
724 &i915_ggtt_view_normal);
724 if (ret != 0) 725 if (ret != 0)
725 return ret; 726 return ret;
726 727