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authorMichal Simek <michal.simek@xilinx.com>2014-08-21 06:45:05 -0400
committerMichal Simek <michal.simek@xilinx.com>2014-09-01 07:12:35 -0400
commite65b15852a4ac11113d42e9f6e55af908a2b30ef (patch)
treea7dec67da0b1286405ddfcd50ce88401674a6e63
parent41683583126c7c5ca302b43e7b6295dc58dba779 (diff)
ARM: zynq: DT: Fix coding style issues in dtsi
Remove space before semicolon. sed -i 's/}\ ;/};/g' arch/arm/boot/dts/zynq-* Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-rw-r--r--arch/arm/boot/dts/zynq-7000.dtsi8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 5185a7cba041..5e68c241ab8b 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -218,7 +218,7 @@
218 interrupt-parent = <&intc>; 218 interrupt-parent = <&intc>;
219 interrupts = <0 24 4>; 219 interrupts = <0 24 4>;
220 reg = <0xe0100000 0x1000>; 220 reg = <0xe0100000 0x1000>;
221 } ; 221 };
222 222
223 sdhci1: sdhci@e0101000 { 223 sdhci1: sdhci@e0101000 {
224 compatible = "arasan,sdhci-8.9a"; 224 compatible = "arasan,sdhci-8.9a";
@@ -228,7 +228,7 @@
228 interrupt-parent = <&intc>; 228 interrupt-parent = <&intc>;
229 interrupts = <0 47 4>; 229 interrupts = <0 47 4>;
230 reg = <0xe0101000 0x1000>; 230 reg = <0xe0101000 0x1000>;
231 } ; 231 };
232 232
233 slcr: slcr@f8000000 { 233 slcr: slcr@f8000000 {
234 #address-cells = <1>; 234 #address-cells = <1>;
@@ -277,7 +277,7 @@
277 devcfg: devcfg@f8007000 { 277 devcfg: devcfg@f8007000 {
278 compatible = "xlnx,zynq-devcfg-1.0"; 278 compatible = "xlnx,zynq-devcfg-1.0";
279 reg = <0xf8007000 0x100>; 279 reg = <0xf8007000 0x100>;
280 } ; 280 };
281 281
282 global_timer: timer@f8f00200 { 282 global_timer: timer@f8f00200 {
283 compatible = "arm,cortex-a9-global-timer"; 283 compatible = "arm,cortex-a9-global-timer";
@@ -309,6 +309,6 @@
309 compatible = "arm,cortex-a9-twd-timer"; 309 compatible = "arm,cortex-a9-twd-timer";
310 reg = <0xf8f00600 0x20>; 310 reg = <0xf8f00600 0x20>;
311 clocks = <&clkc 4>; 311 clocks = <&clkc 4>;
312 } ; 312 };
313 }; 313 };
314}; 314};