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authorVipin Kumar <vipin.kumar@st.com>2012-07-04 06:41:13 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2012-07-04 07:34:28 -0400
commite584f9b4c2a919eb665fea8536ecd2bd7260e876 (patch)
tree7e915a3d14555ecdf5a584b6247d8c64dd50e4e3
parent3be58dbb92871442191188ae51b449e1a9f0fe64 (diff)
ASoC: SPEAr spdif_out: Add spdif out support
This patch implements the spdif out driver for ST peripheral. This peripheral implements IEC60958 standard Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
-rw-r--r--sound/soc/spear/spdif_out.c389
-rw-r--r--sound/soc/spear/spdif_out_regs.h79
2 files changed, 468 insertions, 0 deletions
diff --git a/sound/soc/spear/spdif_out.c b/sound/soc/spear/spdif_out.c
new file mode 100644
index 000000000000..5eac4cda2fd7
--- /dev/null
+++ b/sound/soc/spear/spdif_out.c
@@ -0,0 +1,389 @@
1/*
2 * ALSA SoC SPDIF Out Audio Layer for spear processors
3 *
4 * Copyright (C) 2012 ST Microelectronics
5 * Vipin Kumar <vipin.kumar@st.com>
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12#include <linux/clk.h>
13#include <linux/delay.h>
14#include <linux/device.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/io.h>
18#include <linux/ioport.h>
19#include <linux/module.h>
20#include <linux/platform_device.h>
21#include <sound/soc.h>
22#include <sound/spear_dma.h>
23#include <sound/spear_spdif.h>
24#include "spdif_out_regs.h"
25
26struct spdif_out_params {
27 u32 rate;
28 u32 core_freq;
29 u32 mute;
30};
31
32struct spdif_out_dev {
33 struct clk *clk;
34 struct spear_dma_data dma_params;
35 struct spdif_out_params saved_params;
36 u32 running;
37 void __iomem *io_base;
38};
39
40static void spdif_out_configure(struct spdif_out_dev *host)
41{
42 writel(SPDIF_OUT_RESET, host->io_base + SPDIF_OUT_SOFT_RST);
43 mdelay(1);
44 writel(readl(host->io_base + SPDIF_OUT_SOFT_RST) & ~SPDIF_OUT_RESET,
45 host->io_base + SPDIF_OUT_SOFT_RST);
46
47 writel(SPDIF_OUT_FDMA_TRIG_16 | SPDIF_OUT_MEMFMT_16_16 |
48 SPDIF_OUT_VALID_HW | SPDIF_OUT_USER_HW |
49 SPDIF_OUT_CHNLSTA_HW | SPDIF_OUT_PARITY_HW,
50 host->io_base + SPDIF_OUT_CFG);
51
52 writel(0x7F, host->io_base + SPDIF_OUT_INT_STA_CLR);
53 writel(0x7F, host->io_base + SPDIF_OUT_INT_EN_CLR);
54}
55
56static int spdif_out_startup(struct snd_pcm_substream *substream,
57 struct snd_soc_dai *cpu_dai)
58{
59 struct spdif_out_dev *host = snd_soc_dai_get_drvdata(cpu_dai);
60 int ret;
61
62 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
63 return -EINVAL;
64
65 snd_soc_dai_set_dma_data(cpu_dai, substream, (void *)&host->dma_params);
66
67 ret = clk_enable(host->clk);
68 if (ret)
69 return ret;
70
71 host->running = true;
72 spdif_out_configure(host);
73
74 return 0;
75}
76
77static void spdif_out_shutdown(struct snd_pcm_substream *substream,
78 struct snd_soc_dai *dai)
79{
80 struct spdif_out_dev *host = snd_soc_dai_get_drvdata(dai);
81
82 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
83 return;
84
85 clk_disable(host->clk);
86 host->running = false;
87 snd_soc_dai_set_dma_data(dai, substream, NULL);
88}
89
90static void spdif_out_clock(struct spdif_out_dev *host, u32 core_freq,
91 u32 rate)
92{
93 u32 divider, ctrl;
94
95 clk_set_rate(host->clk, core_freq);
96 divider = DIV_ROUND_CLOSEST(clk_get_rate(host->clk), (rate * 128));
97
98 ctrl = readl(host->io_base + SPDIF_OUT_CTRL);
99 ctrl &= ~SPDIF_DIVIDER_MASK;
100 ctrl |= (divider << SPDIF_DIVIDER_SHIFT) & SPDIF_DIVIDER_MASK;
101 writel(ctrl, host->io_base + SPDIF_OUT_CTRL);
102}
103
104static int spdif_out_hw_params(struct snd_pcm_substream *substream,
105 struct snd_pcm_hw_params *params,
106 struct snd_soc_dai *dai)
107{
108 struct spdif_out_dev *host = snd_soc_dai_get_drvdata(dai);
109 u32 rate, core_freq;
110
111 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
112 return -EINVAL;
113
114 rate = params_rate(params);
115
116 switch (rate) {
117 case 8000:
118 case 16000:
119 case 32000:
120 case 64000:
121 /*
122 * The clock is multiplied by 10 to bring it to feasible range
123 * of frequencies for sscg
124 */
125 core_freq = 64000 * 128 * 10; /* 81.92 MHz */
126 break;
127 case 5512:
128 case 11025:
129 case 22050:
130 case 44100:
131 case 88200:
132 case 176400:
133 core_freq = 176400 * 128; /* 22.5792 MHz */
134 break;
135 case 48000:
136 case 96000:
137 case 192000:
138 default:
139 core_freq = 192000 * 128; /* 24.576 MHz */
140 break;
141 }
142
143 spdif_out_clock(host, core_freq, rate);
144 host->saved_params.core_freq = core_freq;
145 host->saved_params.rate = rate;
146
147 return 0;
148}
149
150static int spdif_out_trigger(struct snd_pcm_substream *substream, int cmd,
151 struct snd_soc_dai *dai)
152{
153 struct spdif_out_dev *host = snd_soc_dai_get_drvdata(dai);
154 u32 ctrl;
155 int ret = 0;
156
157 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
158 return -EINVAL;
159
160 switch (cmd) {
161 case SNDRV_PCM_TRIGGER_START:
162 case SNDRV_PCM_TRIGGER_RESUME:
163 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
164 ctrl = readl(host->io_base + SPDIF_OUT_CTRL);
165 ctrl &= ~SPDIF_OPMODE_MASK;
166 if (!host->saved_params.mute)
167 ctrl |= SPDIF_OPMODE_AUD_DATA |
168 SPDIF_STATE_NORMAL;
169 else
170 ctrl |= SPDIF_OPMODE_MUTE_PCM;
171 writel(ctrl, host->io_base + SPDIF_OUT_CTRL);
172 break;
173
174 case SNDRV_PCM_TRIGGER_STOP:
175 case SNDRV_PCM_TRIGGER_SUSPEND:
176 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
177 ctrl = readl(host->io_base + SPDIF_OUT_CTRL);
178 ctrl &= ~SPDIF_OPMODE_MASK;
179 ctrl |= SPDIF_OPMODE_OFF;
180 writel(ctrl, host->io_base + SPDIF_OUT_CTRL);
181 break;
182
183 default:
184 ret = -EINVAL;
185 break;
186 }
187 return ret;
188}
189
190static int spdif_digital_mute(struct snd_soc_dai *dai, int mute)
191{
192 struct spdif_out_dev *host = snd_soc_dai_get_drvdata(dai);
193 u32 val;
194
195 host->saved_params.mute = mute;
196 val = readl(host->io_base + SPDIF_OUT_CTRL);
197 val &= ~SPDIF_OPMODE_MASK;
198
199 if (mute)
200 val |= SPDIF_OPMODE_MUTE_PCM;
201 else {
202 if (host->running)
203 val |= SPDIF_OPMODE_AUD_DATA | SPDIF_STATE_NORMAL;
204 else
205 val |= SPDIF_OPMODE_OFF;
206 }
207
208 writel(val, host->io_base + SPDIF_OUT_CTRL);
209 return 0;
210}
211
212static int spdif_mute_get(struct snd_kcontrol *kcontrol,
213 struct snd_ctl_elem_value *ucontrol)
214{
215 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
216 struct snd_soc_card *card = codec->card;
217 struct snd_soc_pcm_runtime *rtd = card->rtd;
218 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
219 struct spdif_out_dev *host = snd_soc_dai_get_drvdata(cpu_dai);
220
221 ucontrol->value.integer.value[0] = host->saved_params.mute;
222 return 0;
223}
224
225static int spdif_mute_put(struct snd_kcontrol *kcontrol,
226 struct snd_ctl_elem_value *ucontrol)
227{
228 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
229 struct snd_soc_card *card = codec->card;
230 struct snd_soc_pcm_runtime *rtd = card->rtd;
231 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
232 struct spdif_out_dev *host = snd_soc_dai_get_drvdata(cpu_dai);
233
234 if (host->saved_params.mute == ucontrol->value.integer.value[0])
235 return 0;
236
237 spdif_digital_mute(cpu_dai, ucontrol->value.integer.value[0]);
238
239 return 1;
240}
241static const struct snd_kcontrol_new spdif_out_controls[] = {
242 SOC_SINGLE_BOOL_EXT("IEC958 Playback Switch", 0,
243 spdif_mute_get, spdif_mute_put),
244};
245
246int spdif_soc_dai_probe(struct snd_soc_dai *dai)
247{
248 return snd_soc_add_dai_controls(dai, spdif_out_controls,
249 ARRAY_SIZE(spdif_out_controls));
250}
251
252static const struct snd_soc_dai_ops spdif_out_dai_ops = {
253 .digital_mute = spdif_digital_mute,
254 .startup = spdif_out_startup,
255 .shutdown = spdif_out_shutdown,
256 .trigger = spdif_out_trigger,
257 .hw_params = spdif_out_hw_params,
258};
259
260static struct snd_soc_dai_driver spdif_out_dai = {
261 .playback = {
262 .channels_min = 2,
263 .channels_max = 2,
264 .rates = (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
265 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | \
266 SNDRV_PCM_RATE_192000),
267 .formats = SNDRV_PCM_FMTBIT_S16_LE,
268 },
269 .probe = spdif_soc_dai_probe,
270 .ops = &spdif_out_dai_ops,
271};
272
273static int spdif_out_probe(struct platform_device *pdev)
274{
275 struct spdif_out_dev *host;
276 struct spear_spdif_platform_data *pdata;
277 struct resource *res;
278 int ret;
279
280 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
281 if (!res)
282 return -EINVAL;
283
284 if (!devm_request_mem_region(&pdev->dev, res->start,
285 resource_size(res), pdev->name)) {
286 dev_warn(&pdev->dev, "Failed to get memory resourse\n");
287 return -ENOENT;
288 }
289
290 host = devm_kzalloc(&pdev->dev, sizeof(*host), GFP_KERNEL);
291 if (!host) {
292 dev_warn(&pdev->dev, "kzalloc fail\n");
293 return -ENOMEM;
294 }
295
296 host->io_base = devm_ioremap(&pdev->dev, res->start,
297 resource_size(res));
298 if (!host->io_base) {
299 dev_warn(&pdev->dev, "ioremap failed\n");
300 return -ENOMEM;
301 }
302
303 host->clk = clk_get(&pdev->dev, NULL);
304 if (IS_ERR(host->clk))
305 return PTR_ERR(host->clk);
306
307 pdata = dev_get_platdata(&pdev->dev);
308
309 host->dma_params.data = pdata->dma_params;
310 host->dma_params.addr = res->start + SPDIF_OUT_FIFO_DATA;
311 host->dma_params.max_burst = 16;
312 host->dma_params.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
313 host->dma_params.filter = pdata->filter;
314
315 dev_set_drvdata(&pdev->dev, host);
316
317 ret = snd_soc_register_dai(&pdev->dev, &spdif_out_dai);
318 if (ret != 0) {
319 clk_put(host->clk);
320 return ret;
321 }
322
323 return 0;
324}
325
326static int spdif_out_remove(struct platform_device *pdev)
327{
328 struct spdif_out_dev *host = dev_get_drvdata(&pdev->dev);
329
330 snd_soc_unregister_dai(&pdev->dev);
331 dev_set_drvdata(&pdev->dev, NULL);
332
333 clk_put(host->clk);
334
335 return 0;
336}
337
338#ifdef CONFIG_PM
339static int spdif_out_suspend(struct device *dev)
340{
341 struct platform_device *pdev = to_platform_device(dev);
342 struct spdif_out_dev *host = dev_get_drvdata(&pdev->dev);
343
344 if (host->running)
345 clk_disable(host->clk);
346
347 return 0;
348}
349
350static int spdif_out_resume(struct device *dev)
351{
352 struct platform_device *pdev = to_platform_device(dev);
353 struct spdif_out_dev *host = dev_get_drvdata(&pdev->dev);
354
355 if (host->running) {
356 clk_enable(host->clk);
357 spdif_out_configure(host);
358 spdif_out_clock(host, host->saved_params.core_freq,
359 host->saved_params.rate);
360 }
361 return 0;
362}
363
364static SIMPLE_DEV_PM_OPS(spdif_out_dev_pm_ops, spdif_out_suspend, \
365 spdif_out_resume);
366
367#define SPDIF_OUT_DEV_PM_OPS (&spdif_out_dev_pm_ops)
368
369#else
370#define SPDIF_OUT_DEV_PM_OPS NULL
371
372#endif
373
374static struct platform_driver spdif_out_driver = {
375 .probe = spdif_out_probe,
376 .remove = spdif_out_remove,
377 .driver = {
378 .name = "spdif-out",
379 .owner = THIS_MODULE,
380 .pm = SPDIF_OUT_DEV_PM_OPS,
381 },
382};
383
384module_platform_driver(spdif_out_driver);
385
386MODULE_AUTHOR("Vipin Kumar <vipin.kumar@st.com>");
387MODULE_DESCRIPTION("SPEAr SPDIF OUT SoC Interface");
388MODULE_LICENSE("GPL");
389MODULE_ALIAS("platform:spdif_out");
diff --git a/sound/soc/spear/spdif_out_regs.h b/sound/soc/spear/spdif_out_regs.h
new file mode 100644
index 000000000000..a5e53324b452
--- /dev/null
+++ b/sound/soc/spear/spdif_out_regs.h
@@ -0,0 +1,79 @@
1/*
2 * SPEAr SPDIF OUT controller header file
3 *
4 * Copyright (ST) 2011 Vipin Kumar (vipin.kumar@st.com)
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef SPDIF_OUT_REGS_H
22#define SPDIF_OUT_REGS_H
23
24#define SPDIF_OUT_SOFT_RST 0x00
25 #define SPDIF_OUT_RESET (1 << 0)
26#define SPDIF_OUT_FIFO_DATA 0x04
27#define SPDIF_OUT_INT_STA 0x08
28#define SPDIF_OUT_INT_STA_CLR 0x0C
29 #define SPDIF_INT_UNDERFLOW (1 << 0)
30 #define SPDIF_INT_EODATA (1 << 1)
31 #define SPDIF_INT_EOBLOCK (1 << 2)
32 #define SPDIF_INT_EOLATENCY (1 << 3)
33 #define SPDIF_INT_EOPD_DATA (1 << 4)
34 #define SPDIF_INT_MEMFULLREAD (1 << 5)
35 #define SPDIF_INT_EOPD_PAUSE (1 << 6)
36
37#define SPDIF_OUT_INT_EN 0x10
38#define SPDIF_OUT_INT_EN_SET 0x14
39#define SPDIF_OUT_INT_EN_CLR 0x18
40#define SPDIF_OUT_CTRL 0x1C
41 #define SPDIF_OPMODE_MASK (7 << 0)
42 #define SPDIF_OPMODE_OFF (0 << 0)
43 #define SPDIF_OPMODE_MUTE_PCM (1 << 0)
44 #define SPDIF_OPMODE_MUTE_PAUSE (2 << 0)
45 #define SPDIF_OPMODE_AUD_DATA (3 << 0)
46 #define SPDIF_OPMODE_ENCODE (4 << 0)
47 #define SPDIF_STATE_NORMAL (1 << 3)
48 #define SPDIF_DIVIDER_MASK (0xff << 5)
49 #define SPDIF_DIVIDER_SHIFT (5)
50 #define SPDIF_SAMPLEREAD_MASK (0x1ffff << 15)
51 #define SPDIF_SAMPLEREAD_SHIFT (15)
52#define SPDIF_OUT_STA 0x20
53#define SPDIF_OUT_PA_PB 0x24
54#define SPDIF_OUT_PC_PD 0x28
55#define SPDIF_OUT_CL1 0x2C
56#define SPDIF_OUT_CR1 0x30
57#define SPDIF_OUT_CL2_CR2_UV 0x34
58#define SPDIF_OUT_PAUSE_LAT 0x38
59#define SPDIF_OUT_FRMLEN_BRST 0x3C
60#define SPDIF_OUT_CFG 0x40
61 #define SPDIF_OUT_MEMFMT_16_0 (0 << 5)
62 #define SPDIF_OUT_MEMFMT_16_16 (1 << 5)
63 #define SPDIF_OUT_VALID_DMA (0 << 3)
64 #define SPDIF_OUT_VALID_HW (1 << 3)
65 #define SPDIF_OUT_USER_DMA (0 << 2)
66 #define SPDIF_OUT_USER_HW (1 << 2)
67 #define SPDIF_OUT_CHNLSTA_DMA (0 << 1)
68 #define SPDIF_OUT_CHNLSTA_HW (1 << 1)
69 #define SPDIF_OUT_PARITY_HW (0 << 0)
70 #define SPDIF_OUT_PARITY_DMA (1 << 0)
71 #define SPDIF_OUT_FDMA_TRIG_2 (2 << 8)
72 #define SPDIF_OUT_FDMA_TRIG_6 (6 << 8)
73 #define SPDIF_OUT_FDMA_TRIG_8 (8 << 8)
74 #define SPDIF_OUT_FDMA_TRIG_10 (10 << 8)
75 #define SPDIF_OUT_FDMA_TRIG_12 (12 << 8)
76 #define SPDIF_OUT_FDMA_TRIG_16 (16 << 8)
77 #define SPDIF_OUT_FDMA_TRIG_18 (18 << 8)
78
79#endif /* SPDIF_OUT_REGS_H */