diff options
author | Aaro Koskinen <aaro.koskinen@iki.fi> | 2010-12-20 16:50:16 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2010-12-21 22:57:01 -0500 |
commit | e57d413681b6d9c3d256eeac1e34f0d1b8b81e26 (patch) | |
tree | a207c80f91dd9384649006fe74413a5e1fc9beb7 | |
parent | 63e13f8e2b4873b97d78567de8ad4dbcc63740db (diff) |
sisfb: replace inSISIDXREG with SiS_GetReg
Replace inSISIDXREG() with SiS_GetReg().
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Thomas Winischhofer <thomas@winischhofer.net>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r-- | drivers/video/sis/sis_main.c | 256 |
1 files changed, 128 insertions, 128 deletions
diff --git a/drivers/video/sis/sis_main.c b/drivers/video/sis/sis_main.c index fa8f01c534b5..6ea71b89b1ce 100644 --- a/drivers/video/sis/sis_main.c +++ b/drivers/video/sis/sis_main.c | |||
@@ -737,7 +737,7 @@ sisfb_bridgeisslave(struct sis_video_info *ivideo) | |||
737 | if(!(ivideo->vbflags2 & VB2_VIDEOBRIDGE)) | 737 | if(!(ivideo->vbflags2 & VB2_VIDEOBRIDGE)) |
738 | return false; | 738 | return false; |
739 | 739 | ||
740 | inSISIDXREG(SISPART1,0x00,P1_00); | 740 | P1_00 = SiS_GetReg(SISPART1, 0x00); |
741 | if( ((ivideo->sisvga_engine == SIS_300_VGA) && (P1_00 & 0xa0) == 0x20) || | 741 | if( ((ivideo->sisvga_engine == SIS_300_VGA) && (P1_00 & 0xa0) == 0x20) || |
742 | ((ivideo->sisvga_engine == SIS_315_VGA) && (P1_00 & 0x50) == 0x10) ) { | 742 | ((ivideo->sisvga_engine == SIS_315_VGA) && (P1_00 & 0x50) == 0x10) ) { |
743 | return true; | 743 | return true; |
@@ -751,11 +751,11 @@ sisfballowretracecrt1(struct sis_video_info *ivideo) | |||
751 | { | 751 | { |
752 | u8 temp; | 752 | u8 temp; |
753 | 753 | ||
754 | inSISIDXREG(SISCR,0x17,temp); | 754 | temp = SiS_GetReg(SISCR, 0x17); |
755 | if(!(temp & 0x80)) | 755 | if(!(temp & 0x80)) |
756 | return false; | 756 | return false; |
757 | 757 | ||
758 | inSISIDXREG(SISSR,0x1f,temp); | 758 | temp = SiS_GetReg(SISSR, 0x1f); |
759 | if(temp & 0xc0) | 759 | if(temp & 0xc0) |
760 | return false; | 760 | return false; |
761 | 761 | ||
@@ -799,7 +799,7 @@ sisfbcheckvretracecrt2(struct sis_video_info *ivideo) | |||
799 | default: return false; | 799 | default: return false; |
800 | } | 800 | } |
801 | 801 | ||
802 | inSISIDXREG(SISPART1, reg, temp); | 802 | temp = SiS_GetReg(SISPART1, reg); |
803 | if(temp & 0x02) | 803 | if(temp & 0x02) |
804 | return true; | 804 | return true; |
805 | else | 805 | else |
@@ -837,10 +837,10 @@ sisfb_setupvbblankflags(struct sis_video_info *ivideo, u32 *vcount, u32 *hcount) | |||
837 | default: | 837 | default: |
838 | case SIS_315_VGA: idx = 0x30; break; | 838 | case SIS_315_VGA: idx = 0x30; break; |
839 | } | 839 | } |
840 | inSISIDXREG(SISPART1,(idx+0),reg1); /* 30 */ | 840 | reg1 = SiS_GetReg(SISPART1, (idx+0)); /* 30 */ |
841 | inSISIDXREG(SISPART1,(idx+1),reg2); /* 31 */ | 841 | reg2 = SiS_GetReg(SISPART1, (idx+1)); /* 31 */ |
842 | inSISIDXREG(SISPART1,(idx+2),reg3); /* 32 */ | 842 | reg3 = SiS_GetReg(SISPART1, (idx+2)); /* 32 */ |
843 | inSISIDXREG(SISPART1,(idx+3),reg4); /* 33 */ | 843 | reg4 = SiS_GetReg(SISPART1, (idx+3)); /* 33 */ |
844 | if(reg1 & 0x01) ret |= FB_VBLANK_VBLANKING; | 844 | if(reg1 & 0x01) ret |= FB_VBLANK_VBLANKING; |
845 | if(reg1 & 0x02) ret |= FB_VBLANK_VSYNCING; | 845 | if(reg1 & 0x02) ret |= FB_VBLANK_VSYNCING; |
846 | if(reg4 & 0x80) ret |= FB_VBLANK_HBLANKING; | 846 | if(reg4 & 0x80) ret |= FB_VBLANK_HBLANKING; |
@@ -856,10 +856,10 @@ sisfb_setupvbblankflags(struct sis_video_info *ivideo, u32 *vcount, u32 *hcount) | |||
856 | reg1 = SiS_GetRegByte(SISINPSTAT); | 856 | reg1 = SiS_GetRegByte(SISINPSTAT); |
857 | if(reg1 & 0x08) ret |= FB_VBLANK_VSYNCING; | 857 | if(reg1 & 0x08) ret |= FB_VBLANK_VSYNCING; |
858 | if(reg1 & 0x01) ret |= FB_VBLANK_VBLANKING; | 858 | if(reg1 & 0x01) ret |= FB_VBLANK_VBLANKING; |
859 | inSISIDXREG(SISCR,0x20,reg1); | 859 | reg1 = SiS_GetReg(SISCR, 0x20); |
860 | inSISIDXREG(SISCR,0x1b,reg1); | 860 | reg1 = SiS_GetReg(SISCR, 0x1b); |
861 | inSISIDXREG(SISCR,0x1c,reg2); | 861 | reg2 = SiS_GetReg(SISCR, 0x1c); |
862 | inSISIDXREG(SISCR,0x1d,reg3); | 862 | reg3 = SiS_GetReg(SISCR, 0x1d); |
863 | (*vcount) = reg2 | ((reg3 & 0x07) << 8); | 863 | (*vcount) = reg2 | ((reg3 & 0x07) << 8); |
864 | (*hcount) = (reg1 | ((reg3 & 0x10) << 4)) << 3; | 864 | (*hcount) = (reg1 | ((reg3 & 0x10) << 4)) << 3; |
865 | } | 865 | } |
@@ -1961,7 +1961,7 @@ sisfb_get_dram_size(struct sis_video_info *ivideo) | |||
1961 | switch(ivideo->chip) { | 1961 | switch(ivideo->chip) { |
1962 | #ifdef CONFIG_FB_SIS_300 | 1962 | #ifdef CONFIG_FB_SIS_300 |
1963 | case SIS_300: | 1963 | case SIS_300: |
1964 | inSISIDXREG(SISSR, 0x14, reg); | 1964 | reg = SiS_GetReg(SISSR, 0x14); |
1965 | ivideo->video_size = ((reg & 0x3F) + 1) << 20; | 1965 | ivideo->video_size = ((reg & 0x3F) + 1) << 20; |
1966 | break; | 1966 | break; |
1967 | case SIS_540: | 1967 | case SIS_540: |
@@ -1977,7 +1977,7 @@ sisfb_get_dram_size(struct sis_video_info *ivideo) | |||
1977 | case SIS_315H: | 1977 | case SIS_315H: |
1978 | case SIS_315PRO: | 1978 | case SIS_315PRO: |
1979 | case SIS_315: | 1979 | case SIS_315: |
1980 | inSISIDXREG(SISSR, 0x14, reg); | 1980 | reg = SiS_GetReg(SISSR, 0x14); |
1981 | ivideo->video_size = (1 << ((reg & 0xf0) >> 4)) << 20; | 1981 | ivideo->video_size = (1 << ((reg & 0xf0) >> 4)) << 20; |
1982 | switch((reg >> 2) & 0x03) { | 1982 | switch((reg >> 2) & 0x03) { |
1983 | case 0x01: | 1983 | case 0x01: |
@@ -1989,31 +1989,31 @@ sisfb_get_dram_size(struct sis_video_info *ivideo) | |||
1989 | } | 1989 | } |
1990 | break; | 1990 | break; |
1991 | case SIS_330: | 1991 | case SIS_330: |
1992 | inSISIDXREG(SISSR, 0x14, reg); | 1992 | reg = SiS_GetReg(SISSR, 0x14); |
1993 | ivideo->video_size = (1 << ((reg & 0xf0) >> 4)) << 20; | 1993 | ivideo->video_size = (1 << ((reg & 0xf0) >> 4)) << 20; |
1994 | if(reg & 0x0c) ivideo->video_size <<= 1; | 1994 | if(reg & 0x0c) ivideo->video_size <<= 1; |
1995 | break; | 1995 | break; |
1996 | case SIS_550: | 1996 | case SIS_550: |
1997 | case SIS_650: | 1997 | case SIS_650: |
1998 | case SIS_740: | 1998 | case SIS_740: |
1999 | inSISIDXREG(SISSR, 0x14, reg); | 1999 | reg = SiS_GetReg(SISSR, 0x14); |
2000 | ivideo->video_size = (((reg & 0x3f) + 1) << 2) << 20; | 2000 | ivideo->video_size = (((reg & 0x3f) + 1) << 2) << 20; |
2001 | break; | 2001 | break; |
2002 | case SIS_661: | 2002 | case SIS_661: |
2003 | case SIS_741: | 2003 | case SIS_741: |
2004 | inSISIDXREG(SISCR, 0x79, reg); | 2004 | reg = SiS_GetReg(SISCR, 0x79); |
2005 | ivideo->video_size = (1 << ((reg & 0xf0) >> 4)) << 20; | 2005 | ivideo->video_size = (1 << ((reg & 0xf0) >> 4)) << 20; |
2006 | break; | 2006 | break; |
2007 | case SIS_660: | 2007 | case SIS_660: |
2008 | case SIS_760: | 2008 | case SIS_760: |
2009 | case SIS_761: | 2009 | case SIS_761: |
2010 | inSISIDXREG(SISCR, 0x79, reg); | 2010 | reg = SiS_GetReg(SISCR, 0x79); |
2011 | reg = (reg & 0xf0) >> 4; | 2011 | reg = (reg & 0xf0) >> 4; |
2012 | if(reg) { | 2012 | if(reg) { |
2013 | ivideo->video_size = (1 << reg) << 20; | 2013 | ivideo->video_size = (1 << reg) << 20; |
2014 | ivideo->UMAsize = ivideo->video_size; | 2014 | ivideo->UMAsize = ivideo->video_size; |
2015 | } | 2015 | } |
2016 | inSISIDXREG(SISCR, 0x78, reg); | 2016 | reg = SiS_GetReg(SISCR, 0x78); |
2017 | reg &= 0x30; | 2017 | reg &= 0x30; |
2018 | if(reg) { | 2018 | if(reg) { |
2019 | if(reg == 0x10) { | 2019 | if(reg == 0x10) { |
@@ -2027,7 +2027,7 @@ sisfb_get_dram_size(struct sis_video_info *ivideo) | |||
2027 | case SIS_340: | 2027 | case SIS_340: |
2028 | case XGI_20: | 2028 | case XGI_20: |
2029 | case XGI_40: | 2029 | case XGI_40: |
2030 | inSISIDXREG(SISSR, 0x14, reg); | 2030 | reg = SiS_GetReg(SISSR, 0x14); |
2031 | ivideo->video_size = (1 << ((reg & 0xf0) >> 4)) << 20; | 2031 | ivideo->video_size = (1 << ((reg & 0xf0) >> 4)) << 20; |
2032 | if(ivideo->chip != XGI_20) { | 2032 | if(ivideo->chip != XGI_20) { |
2033 | reg = (reg & 0x0c) >> 2; | 2033 | reg = (reg & 0x0c) >> 2; |
@@ -2061,11 +2061,11 @@ sisfb_detect_VB_connect(struct sis_video_info *ivideo) | |||
2061 | 2061 | ||
2062 | #ifdef CONFIG_FB_SIS_300 | 2062 | #ifdef CONFIG_FB_SIS_300 |
2063 | if(ivideo->sisvga_engine == SIS_300_VGA) { | 2063 | if(ivideo->sisvga_engine == SIS_300_VGA) { |
2064 | inSISIDXREG(SISSR, 0x17, temp); | 2064 | temp = SiS_GetReg(SISSR, 0x17); |
2065 | if((temp & 0x0F) && (ivideo->chip != SIS_300)) { | 2065 | if((temp & 0x0F) && (ivideo->chip != SIS_300)) { |
2066 | /* PAL/NTSC is stored on SR16 on such machines */ | 2066 | /* PAL/NTSC is stored on SR16 on such machines */ |
2067 | if(!(ivideo->vbflags & (TV_PAL | TV_NTSC | TV_PALM | TV_PALN))) { | 2067 | if(!(ivideo->vbflags & (TV_PAL | TV_NTSC | TV_PALM | TV_PALN))) { |
2068 | inSISIDXREG(SISSR, 0x16, temp); | 2068 | temp = SiS_GetReg(SISSR, 0x16); |
2069 | if(temp & 0x20) | 2069 | if(temp & 0x20) |
2070 | ivideo->vbflags |= TV_PAL; | 2070 | ivideo->vbflags |= TV_PAL; |
2071 | else | 2071 | else |
@@ -2075,7 +2075,7 @@ sisfb_detect_VB_connect(struct sis_video_info *ivideo) | |||
2075 | } | 2075 | } |
2076 | #endif | 2076 | #endif |
2077 | 2077 | ||
2078 | inSISIDXREG(SISCR, 0x32, cr32); | 2078 | cr32 = SiS_GetReg(SISCR, 0x32); |
2079 | 2079 | ||
2080 | if(cr32 & SIS_CRT1) { | 2080 | if(cr32 & SIS_CRT1) { |
2081 | ivideo->sisfb_crt1off = 0; | 2081 | ivideo->sisfb_crt1off = 0; |
@@ -2151,15 +2151,15 @@ sisfb_detect_VB_connect(struct sis_video_info *ivideo) | |||
2151 | } | 2151 | } |
2152 | if(!(ivideo->vbflags & (TV_PAL | TV_NTSC | TV_PALM | TV_PALN | TV_NTSCJ))) { | 2152 | if(!(ivideo->vbflags & (TV_PAL | TV_NTSC | TV_PALM | TV_PALN | TV_NTSCJ))) { |
2153 | if(ivideo->sisvga_engine == SIS_300_VGA) { | 2153 | if(ivideo->sisvga_engine == SIS_300_VGA) { |
2154 | inSISIDXREG(SISSR, 0x38, temp); | 2154 | temp = SiS_GetReg(SISSR, 0x38); |
2155 | if(temp & 0x01) ivideo->vbflags |= TV_PAL; | 2155 | if(temp & 0x01) ivideo->vbflags |= TV_PAL; |
2156 | else ivideo->vbflags |= TV_NTSC; | 2156 | else ivideo->vbflags |= TV_NTSC; |
2157 | } else if((ivideo->chip <= SIS_315PRO) || (ivideo->chip >= SIS_330)) { | 2157 | } else if((ivideo->chip <= SIS_315PRO) || (ivideo->chip >= SIS_330)) { |
2158 | inSISIDXREG(SISSR, 0x38, temp); | 2158 | temp = SiS_GetReg(SISSR, 0x38); |
2159 | if(temp & 0x01) ivideo->vbflags |= TV_PAL; | 2159 | if(temp & 0x01) ivideo->vbflags |= TV_PAL; |
2160 | else ivideo->vbflags |= TV_NTSC; | 2160 | else ivideo->vbflags |= TV_NTSC; |
2161 | } else { | 2161 | } else { |
2162 | inSISIDXREG(SISCR, 0x79, temp); | 2162 | temp = SiS_GetReg(SISCR, 0x79); |
2163 | if(temp & 0x20) ivideo->vbflags |= TV_PAL; | 2163 | if(temp & 0x20) ivideo->vbflags |= TV_PAL; |
2164 | else ivideo->vbflags |= TV_NTSC; | 2164 | else ivideo->vbflags |= TV_NTSC; |
2165 | } | 2165 | } |
@@ -2198,20 +2198,20 @@ sisfb_sense_crt1(struct sis_video_info *ivideo) | |||
2198 | u16 temp = 0xffff; | 2198 | u16 temp = 0xffff; |
2199 | int i; | 2199 | int i; |
2200 | 2200 | ||
2201 | inSISIDXREG(SISSR,0x1F,sr1F); | 2201 | sr1F = SiS_GetReg(SISSR, 0x1F); |
2202 | orSISIDXREG(SISSR,0x1F,0x04); | 2202 | orSISIDXREG(SISSR,0x1F,0x04); |
2203 | andSISIDXREG(SISSR,0x1F,0x3F); | 2203 | andSISIDXREG(SISSR,0x1F,0x3F); |
2204 | if(sr1F & 0xc0) mustwait = true; | 2204 | if(sr1F & 0xc0) mustwait = true; |
2205 | 2205 | ||
2206 | #ifdef CONFIG_FB_SIS_315 | 2206 | #ifdef CONFIG_FB_SIS_315 |
2207 | if(ivideo->sisvga_engine == SIS_315_VGA) { | 2207 | if(ivideo->sisvga_engine == SIS_315_VGA) { |
2208 | inSISIDXREG(SISCR,ivideo->SiS_Pr.SiS_MyCR63,cr63); | 2208 | cr63 = SiS_GetReg(SISCR, ivideo->SiS_Pr.SiS_MyCR63); |
2209 | cr63 &= 0x40; | 2209 | cr63 &= 0x40; |
2210 | andSISIDXREG(SISCR,ivideo->SiS_Pr.SiS_MyCR63,0xBF); | 2210 | andSISIDXREG(SISCR,ivideo->SiS_Pr.SiS_MyCR63,0xBF); |
2211 | } | 2211 | } |
2212 | #endif | 2212 | #endif |
2213 | 2213 | ||
2214 | inSISIDXREG(SISCR,0x17,cr17); | 2214 | cr17 = SiS_GetReg(SISCR, 0x17); |
2215 | cr17 &= 0x80; | 2215 | cr17 &= 0x80; |
2216 | if(!cr17) { | 2216 | if(!cr17) { |
2217 | orSISIDXREG(SISCR,0x17,0x80); | 2217 | orSISIDXREG(SISCR,0x17,0x80); |
@@ -2286,7 +2286,7 @@ SiS_SenseLCD(struct sis_video_info *ivideo) | |||
2286 | return; | 2286 | return; |
2287 | 2287 | ||
2288 | /* If LCD already set up by BIOS, skip it */ | 2288 | /* If LCD already set up by BIOS, skip it */ |
2289 | inSISIDXREG(SISCR, 0x32, reg); | 2289 | reg = SiS_GetReg(SISCR, 0x32); |
2290 | if(reg & 0x08) | 2290 | if(reg & 0x08) |
2291 | return; | 2291 | return; |
2292 | 2292 | ||
@@ -2372,7 +2372,7 @@ SISDoSense(struct sis_video_info *ivideo, u16 type, u16 test) | |||
2372 | SiS_DDC2Delay(&ivideo->SiS_Pr, 0x1500); | 2372 | SiS_DDC2Delay(&ivideo->SiS_Pr, 0x1500); |
2373 | mytest >>= 8; | 2373 | mytest >>= 8; |
2374 | mytest &= 0x7f; | 2374 | mytest &= 0x7f; |
2375 | inSISIDXREG(SISPART4,0x03,temp); | 2375 | temp = SiS_GetReg(SISPART4, 0x03); |
2376 | temp ^= 0x0e; | 2376 | temp ^= 0x0e; |
2377 | temp &= mytest; | 2377 | temp &= mytest; |
2378 | if(temp == mytest) result++; | 2378 | if(temp == mytest) result++; |
@@ -2400,7 +2400,7 @@ SiS_Sense30x(struct sis_video_info *ivideo) | |||
2400 | 2400 | ||
2401 | if(ivideo->vbflags2 & VB2_301) { | 2401 | if(ivideo->vbflags2 & VB2_301) { |
2402 | svhs = 0x00b9; cvbs = 0x00b3; vga2 = 0x00d1; | 2402 | svhs = 0x00b9; cvbs = 0x00b3; vga2 = 0x00d1; |
2403 | inSISIDXREG(SISPART4,0x01,myflag); | 2403 | myflag = SiS_GetReg(SISPART4, 0x01); |
2404 | if(myflag & 0x04) { | 2404 | if(myflag & 0x04) { |
2405 | svhs = 0x00dd; cvbs = 0x00ee; vga2 = 0x00fd; | 2405 | svhs = 0x00dd; cvbs = 0x00ee; vga2 = 0x00fd; |
2406 | } | 2406 | } |
@@ -2430,7 +2430,7 @@ SiS_Sense30x(struct sis_video_info *ivideo) | |||
2430 | } | 2430 | } |
2431 | 2431 | ||
2432 | if(ivideo->chip == SIS_300) { | 2432 | if(ivideo->chip == SIS_300) { |
2433 | inSISIDXREG(SISSR,0x3b,myflag); | 2433 | myflag = SiS_GetReg(SISSR, 0x3b); |
2434 | if(!(myflag & 0x01)) vga2 = vga2_c = 0; | 2434 | if(!(myflag & 0x01)) vga2 = vga2_c = 0; |
2435 | } | 2435 | } |
2436 | 2436 | ||
@@ -2438,10 +2438,10 @@ SiS_Sense30x(struct sis_video_info *ivideo) | |||
2438 | vga2 = vga2_c = 0; | 2438 | vga2 = vga2_c = 0; |
2439 | } | 2439 | } |
2440 | 2440 | ||
2441 | inSISIDXREG(SISSR,0x1e,backupSR_1e); | 2441 | backupSR_1e = SiS_GetReg(SISSR, 0x1e); |
2442 | orSISIDXREG(SISSR,0x1e,0x20); | 2442 | orSISIDXREG(SISSR,0x1e,0x20); |
2443 | 2443 | ||
2444 | inSISIDXREG(SISPART4,0x0d,backupP4_0d); | 2444 | backupP4_0d = SiS_GetReg(SISPART4, 0x0d); |
2445 | if(ivideo->vbflags2 & VB2_30xC) { | 2445 | if(ivideo->vbflags2 & VB2_30xC) { |
2446 | setSISIDXREG(SISPART4,0x0d,~0x07,0x01); | 2446 | setSISIDXREG(SISPART4,0x0d,~0x07,0x01); |
2447 | } else { | 2447 | } else { |
@@ -2449,10 +2449,10 @@ SiS_Sense30x(struct sis_video_info *ivideo) | |||
2449 | } | 2449 | } |
2450 | SiS_DDC2Delay(&ivideo->SiS_Pr, 0x2000); | 2450 | SiS_DDC2Delay(&ivideo->SiS_Pr, 0x2000); |
2451 | 2451 | ||
2452 | inSISIDXREG(SISPART2,0x00,backupP2_00); | 2452 | backupP2_00 = SiS_GetReg(SISPART2, 0x00); |
2453 | outSISIDXREG(SISPART2,0x00,((backupP2_00 | 0x1c) & 0xfc)); | 2453 | outSISIDXREG(SISPART2,0x00,((backupP2_00 | 0x1c) & 0xfc)); |
2454 | 2454 | ||
2455 | inSISIDXREG(SISPART2,0x4d,backupP2_4d); | 2455 | backupP2_4d = SiS_GetReg(SISPART2, 0x4d); |
2456 | if(ivideo->vbflags2 & VB2_SISYPBPRBRIDGE) { | 2456 | if(ivideo->vbflags2 & VB2_SISYPBPRBRIDGE) { |
2457 | outSISIDXREG(SISPART2,0x4d,(backupP2_4d & ~0x10)); | 2457 | outSISIDXREG(SISPART2,0x4d,(backupP2_4d & ~0x10)); |
2458 | } | 2458 | } |
@@ -2515,7 +2515,7 @@ SiS_Sense30x(struct sis_video_info *ivideo) | |||
2515 | outSISIDXREG(SISSR,0x1e,backupSR_1e); | 2515 | outSISIDXREG(SISSR,0x1e,backupSR_1e); |
2516 | 2516 | ||
2517 | if(ivideo->vbflags2 & VB2_30xCLV) { | 2517 | if(ivideo->vbflags2 & VB2_30xCLV) { |
2518 | inSISIDXREG(SISPART2,0x00,biosflag); | 2518 | biosflag = SiS_GetReg(SISPART2, 0x00); |
2519 | if(biosflag & 0x20) { | 2519 | if(biosflag & 0x20) { |
2520 | for(myflag = 2; myflag > 0; myflag--) { | 2520 | for(myflag = 2; myflag > 0; myflag--) { |
2521 | biosflag ^= 0x20; | 2521 | biosflag ^= 0x20; |
@@ -2665,10 +2665,10 @@ sisfb_get_VB_type(struct sis_video_info *ivideo) | |||
2665 | if(ivideo->chip == XGI_20) | 2665 | if(ivideo->chip == XGI_20) |
2666 | return; | 2666 | return; |
2667 | 2667 | ||
2668 | inSISIDXREG(SISPART4, 0x00, vb_chipid); | 2668 | vb_chipid = SiS_GetReg(SISPART4, 0x00); |
2669 | switch(vb_chipid) { | 2669 | switch(vb_chipid) { |
2670 | case 0x01: | 2670 | case 0x01: |
2671 | inSISIDXREG(SISPART4, 0x01, reg); | 2671 | reg = SiS_GetReg(SISPART4, 0x01); |
2672 | if(reg < 0xb0) { | 2672 | if(reg < 0xb0) { |
2673 | ivideo->vbflags |= VB_301; /* Deprecated */ | 2673 | ivideo->vbflags |= VB_301; /* Deprecated */ |
2674 | ivideo->vbflags2 |= VB2_301; | 2674 | ivideo->vbflags2 |= VB2_301; |
@@ -2676,7 +2676,7 @@ sisfb_get_VB_type(struct sis_video_info *ivideo) | |||
2676 | } else if(reg < 0xc0) { | 2676 | } else if(reg < 0xc0) { |
2677 | ivideo->vbflags |= VB_301B; /* Deprecated */ | 2677 | ivideo->vbflags |= VB_301B; /* Deprecated */ |
2678 | ivideo->vbflags2 |= VB2_301B; | 2678 | ivideo->vbflags2 |= VB2_301B; |
2679 | inSISIDXREG(SISPART4,0x23,reg); | 2679 | reg = SiS_GetReg(SISPART4, 0x23); |
2680 | if(!(reg & 0x02)) { | 2680 | if(!(reg & 0x02)) { |
2681 | ivideo->vbflags |= VB_30xBDH; /* Deprecated */ | 2681 | ivideo->vbflags |= VB_30xBDH; /* Deprecated */ |
2682 | ivideo->vbflags2 |= VB2_30xBDH; | 2682 | ivideo->vbflags2 |= VB2_30xBDH; |
@@ -2693,7 +2693,7 @@ sisfb_get_VB_type(struct sis_video_info *ivideo) | |||
2693 | ivideo->vbflags2 |= VB2_301LV; | 2693 | ivideo->vbflags2 |= VB2_301LV; |
2694 | printk(KERN_INFO "%s SiS301LV %s\n", stdstr, bridgestr); | 2694 | printk(KERN_INFO "%s SiS301LV %s\n", stdstr, bridgestr); |
2695 | } else if(reg <= 0xe1) { | 2695 | } else if(reg <= 0xe1) { |
2696 | inSISIDXREG(SISPART4,0x39,reg); | 2696 | reg = SiS_GetReg(SISPART4, 0x39); |
2697 | if(reg == 0xff) { | 2697 | if(reg == 0xff) { |
2698 | ivideo->vbflags |= VB_302LV; /* Deprecated */ | 2698 | ivideo->vbflags |= VB_302LV; /* Deprecated */ |
2699 | ivideo->vbflags2 |= VB2_302LV; | 2699 | ivideo->vbflags2 |= VB2_302LV; |
@@ -2718,7 +2718,7 @@ sisfb_get_VB_type(struct sis_video_info *ivideo) | |||
2718 | } | 2718 | } |
2719 | 2719 | ||
2720 | if((!(ivideo->vbflags2 & VB2_VIDEOBRIDGE)) && (ivideo->chip != SIS_300)) { | 2720 | if((!(ivideo->vbflags2 & VB2_VIDEOBRIDGE)) && (ivideo->chip != SIS_300)) { |
2721 | inSISIDXREG(SISCR, 0x37, reg); | 2721 | reg = SiS_GetReg(SISCR, 0x37); |
2722 | reg &= SIS_EXTERNAL_CHIP_MASK; | 2722 | reg &= SIS_EXTERNAL_CHIP_MASK; |
2723 | reg >>= 1; | 2723 | reg >>= 1; |
2724 | if(ivideo->sisvga_engine == SIS_300_VGA) { | 2724 | if(ivideo->sisvga_engine == SIS_300_VGA) { |
@@ -2759,7 +2759,7 @@ sisfb_get_VB_type(struct sis_video_info *ivideo) | |||
2759 | #endif | 2759 | #endif |
2760 | } else if(ivideo->chip >= SIS_661) { | 2760 | } else if(ivideo->chip >= SIS_661) { |
2761 | #ifdef CONFIG_FB_SIS_315 | 2761 | #ifdef CONFIG_FB_SIS_315 |
2762 | inSISIDXREG(SISCR, 0x38, reg); | 2762 | reg = SiS_GetReg(SISCR, 0x38); |
2763 | reg >>= 5; | 2763 | reg >>= 5; |
2764 | switch(reg) { | 2764 | switch(reg) { |
2765 | case 0x02: | 2765 | case 0x02: |
@@ -2822,7 +2822,7 @@ sisfb_engine_init(struct sis_video_info *ivideo) | |||
2822 | 2822 | ||
2823 | tqueue_pos = (ivideo->video_size - ivideo->cmdQueueSize) / (64 * 1024); | 2823 | tqueue_pos = (ivideo->video_size - ivideo->cmdQueueSize) / (64 * 1024); |
2824 | 2824 | ||
2825 | inSISIDXREG(SISSR, IND_SIS_TURBOQUEUE_SET, tq_state); | 2825 | tq_state = SiS_GetReg(SISSR, IND_SIS_TURBOQUEUE_SET); |
2826 | tq_state |= 0xf0; | 2826 | tq_state |= 0xf0; |
2827 | tq_state &= 0xfc; | 2827 | tq_state &= 0xfc; |
2828 | tq_state |= (u8)(tqueue_pos >> 8); | 2828 | tq_state |= (u8)(tqueue_pos >> 8); |
@@ -2922,7 +2922,7 @@ sisfb_detect_lcd_type(struct sis_video_info *ivideo) | |||
2922 | u8 reg; | 2922 | u8 reg; |
2923 | int i; | 2923 | int i; |
2924 | 2924 | ||
2925 | inSISIDXREG(SISCR, 0x36, reg); | 2925 | reg = SiS_GetReg(SISCR, 0x36); |
2926 | reg &= 0x0f; | 2926 | reg &= 0x0f; |
2927 | if(ivideo->sisvga_engine == SIS_300_VGA) { | 2927 | if(ivideo->sisvga_engine == SIS_300_VGA) { |
2928 | ivideo->CRT2LCDType = sis300paneltype[reg]; | 2928 | ivideo->CRT2LCDType = sis300paneltype[reg]; |
@@ -2980,10 +2980,10 @@ sisfb_save_pdc_emi(struct sis_video_info *ivideo) | |||
2980 | if(ivideo->sisvga_engine == SIS_300_VGA) { | 2980 | if(ivideo->sisvga_engine == SIS_300_VGA) { |
2981 | if(ivideo->vbflags2 & (VB2_LVDS | VB2_30xBDH)) { | 2981 | if(ivideo->vbflags2 & (VB2_LVDS | VB2_30xBDH)) { |
2982 | int tmp; | 2982 | int tmp; |
2983 | inSISIDXREG(SISCR,0x30,tmp); | 2983 | tmp = SiS_GetReg(SISCR, 0x30); |
2984 | if(tmp & 0x20) { | 2984 | if(tmp & 0x20) { |
2985 | /* Currently on LCD? If yes, read current pdc */ | 2985 | /* Currently on LCD? If yes, read current pdc */ |
2986 | inSISIDXREG(SISPART1,0x13,ivideo->detectedpdc); | 2986 | ivideo->detectedpdc = SiS_GetReg(SISPART1, 0x13); |
2987 | ivideo->detectedpdc &= 0x3c; | 2987 | ivideo->detectedpdc &= 0x3c; |
2988 | if(ivideo->SiS_Pr.PDC == -1) { | 2988 | if(ivideo->SiS_Pr.PDC == -1) { |
2989 | /* Let option override detection */ | 2989 | /* Let option override detection */ |
@@ -3007,7 +3007,7 @@ sisfb_save_pdc_emi(struct sis_video_info *ivideo) | |||
3007 | /* Try to find about LCDA */ | 3007 | /* Try to find about LCDA */ |
3008 | if(ivideo->vbflags2 & VB2_SISLCDABRIDGE) { | 3008 | if(ivideo->vbflags2 & VB2_SISLCDABRIDGE) { |
3009 | int tmp; | 3009 | int tmp; |
3010 | inSISIDXREG(SISPART1,0x13,tmp); | 3010 | tmp = SiS_GetReg(SISPART1, 0x13); |
3011 | if(tmp & 0x04) { | 3011 | if(tmp & 0x04) { |
3012 | ivideo->SiS_Pr.SiS_UseLCDA = true; | 3012 | ivideo->SiS_Pr.SiS_UseLCDA = true; |
3013 | ivideo->detectedlcda = 0x03; | 3013 | ivideo->detectedlcda = 0x03; |
@@ -3017,16 +3017,16 @@ sisfb_save_pdc_emi(struct sis_video_info *ivideo) | |||
3017 | /* Save PDC */ | 3017 | /* Save PDC */ |
3018 | if(ivideo->vbflags2 & VB2_SISLVDSBRIDGE) { | 3018 | if(ivideo->vbflags2 & VB2_SISLVDSBRIDGE) { |
3019 | int tmp; | 3019 | int tmp; |
3020 | inSISIDXREG(SISCR,0x30,tmp); | 3020 | tmp = SiS_GetReg(SISCR, 0x30); |
3021 | if((tmp & 0x20) || (ivideo->detectedlcda != 0xff)) { | 3021 | if((tmp & 0x20) || (ivideo->detectedlcda != 0xff)) { |
3022 | /* Currently on LCD? If yes, read current pdc */ | 3022 | /* Currently on LCD? If yes, read current pdc */ |
3023 | u8 pdc; | 3023 | u8 pdc; |
3024 | inSISIDXREG(SISPART1,0x2D,pdc); | 3024 | pdc = SiS_GetReg(SISPART1, 0x2D); |
3025 | ivideo->detectedpdc = (pdc & 0x0f) << 1; | 3025 | ivideo->detectedpdc = (pdc & 0x0f) << 1; |
3026 | ivideo->detectedpdca = (pdc & 0xf0) >> 3; | 3026 | ivideo->detectedpdca = (pdc & 0xf0) >> 3; |
3027 | inSISIDXREG(SISPART1,0x35,pdc); | 3027 | pdc = SiS_GetReg(SISPART1, 0x35); |
3028 | ivideo->detectedpdc |= ((pdc >> 7) & 0x01); | 3028 | ivideo->detectedpdc |= ((pdc >> 7) & 0x01); |
3029 | inSISIDXREG(SISPART1,0x20,pdc); | 3029 | pdc = SiS_GetReg(SISPART1, 0x20); |
3030 | ivideo->detectedpdca |= ((pdc >> 6) & 0x01); | 3030 | ivideo->detectedpdca |= ((pdc >> 6) & 0x01); |
3031 | if(ivideo->newrom) { | 3031 | if(ivideo->newrom) { |
3032 | /* New ROM invalidates other PDC resp. */ | 3032 | /* New ROM invalidates other PDC resp. */ |
@@ -3060,10 +3060,10 @@ sisfb_save_pdc_emi(struct sis_video_info *ivideo) | |||
3060 | 3060 | ||
3061 | /* Save EMI */ | 3061 | /* Save EMI */ |
3062 | if(ivideo->vbflags2 & VB2_SISEMIBRIDGE) { | 3062 | if(ivideo->vbflags2 & VB2_SISEMIBRIDGE) { |
3063 | inSISIDXREG(SISPART4,0x30,ivideo->SiS_Pr.EMI_30); | 3063 | ivideo->SiS_Pr.EMI_30 = SiS_GetReg(SISPART4, 0x30); |
3064 | inSISIDXREG(SISPART4,0x31,ivideo->SiS_Pr.EMI_31); | 3064 | ivideo->SiS_Pr.EMI_31 = SiS_GetReg(SISPART4, 0x31); |
3065 | inSISIDXREG(SISPART4,0x32,ivideo->SiS_Pr.EMI_32); | 3065 | ivideo->SiS_Pr.EMI_32 = SiS_GetReg(SISPART4, 0x32); |
3066 | inSISIDXREG(SISPART4,0x33,ivideo->SiS_Pr.EMI_33); | 3066 | ivideo->SiS_Pr.EMI_33 = SiS_GetReg(SISPART4, 0x33); |
3067 | ivideo->SiS_Pr.HaveEMI = true; | 3067 | ivideo->SiS_Pr.HaveEMI = true; |
3068 | if((tmp & 0x20) || (ivideo->detectedlcda != 0xff)) { | 3068 | if((tmp & 0x20) || (ivideo->detectedlcda != 0xff)) { |
3069 | ivideo->SiS_Pr.HaveEMILCD = true; | 3069 | ivideo->SiS_Pr.HaveEMILCD = true; |
@@ -3488,8 +3488,8 @@ sisfb_check_engine_and_sync(struct sis_video_info *ivideo) | |||
3488 | * ivideo->accel here, as this might have | 3488 | * ivideo->accel here, as this might have |
3489 | * been changed before this is called. | 3489 | * been changed before this is called. |
3490 | */ | 3490 | */ |
3491 | inSISIDXREG(SISSR, IND_SIS_PCI_ADDRESS_SET, cr30); | 3491 | cr30 = SiS_GetReg(SISSR, IND_SIS_PCI_ADDRESS_SET); |
3492 | inSISIDXREG(SISSR, IND_SIS_MODULE_ENABLE, cr31); | 3492 | cr31 = SiS_GetReg(SISSR, IND_SIS_MODULE_ENABLE); |
3493 | /* MMIO and 2D/3D engine enabled? */ | 3493 | /* MMIO and 2D/3D engine enabled? */ |
3494 | if((cr30 & SIS_MEM_MAP_IO_ENABLE) && (cr31 & 0x42)) { | 3494 | if((cr30 & SIS_MEM_MAP_IO_ENABLE) && (cr31 & 0x42)) { |
3495 | #ifdef CONFIG_FB_SIS_300 | 3495 | #ifdef CONFIG_FB_SIS_300 |
@@ -3507,7 +3507,7 @@ sisfb_check_engine_and_sync(struct sis_video_info *ivideo) | |||
3507 | * enabled, and that the queue | 3507 | * enabled, and that the queue |
3508 | * is not in the state of "reset" | 3508 | * is not in the state of "reset" |
3509 | */ | 3509 | */ |
3510 | inSISIDXREG(SISSR, 0x26, cr30); | 3510 | cr30 = SiS_GetReg(SISSR, 0x26); |
3511 | if((cr30 & 0xe0) && (!(cr30 & 0x01))) { | 3511 | if((cr30 & 0xe0) && (!(cr30 & 0x01))) { |
3512 | sisfb_syncaccel(ivideo); | 3512 | sisfb_syncaccel(ivideo); |
3513 | } | 3513 | } |
@@ -3526,7 +3526,7 @@ sisfb_pre_setmode(struct sis_video_info *ivideo) | |||
3526 | 3526 | ||
3527 | outSISIDXREG(SISSR, 0x05, 0x86); | 3527 | outSISIDXREG(SISSR, 0x05, 0x86); |
3528 | 3528 | ||
3529 | inSISIDXREG(SISCR, 0x31, cr31); | 3529 | cr31 = SiS_GetReg(SISCR, 0x31); |
3530 | cr31 &= ~0x60; | 3530 | cr31 &= ~0x60; |
3531 | cr31 |= 0x04; | 3531 | cr31 |= 0x04; |
3532 | 3532 | ||
@@ -3535,11 +3535,11 @@ sisfb_pre_setmode(struct sis_video_info *ivideo) | |||
3535 | #ifdef CONFIG_FB_SIS_315 | 3535 | #ifdef CONFIG_FB_SIS_315 |
3536 | if(ivideo->sisvga_engine == SIS_315_VGA) { | 3536 | if(ivideo->sisvga_engine == SIS_315_VGA) { |
3537 | if(ivideo->chip >= SIS_661) { | 3537 | if(ivideo->chip >= SIS_661) { |
3538 | inSISIDXREG(SISCR, 0x38, cr38); | 3538 | cr38 = SiS_GetReg(SISCR, 0x38); |
3539 | cr38 &= ~0x07; /* Clear LCDA/DualEdge and YPbPr bits */ | 3539 | cr38 &= ~0x07; /* Clear LCDA/DualEdge and YPbPr bits */ |
3540 | } else { | 3540 | } else { |
3541 | tvregnum = 0x38; | 3541 | tvregnum = 0x38; |
3542 | inSISIDXREG(SISCR, tvregnum, cr38); | 3542 | cr38 = SiS_GetReg(SISCR, tvregnum); |
3543 | cr38 &= ~0x3b; /* Clear LCDA/DualEdge and YPbPr bits */ | 3543 | cr38 &= ~0x3b; /* Clear LCDA/DualEdge and YPbPr bits */ |
3544 | } | 3544 | } |
3545 | } | 3545 | } |
@@ -3547,7 +3547,7 @@ sisfb_pre_setmode(struct sis_video_info *ivideo) | |||
3547 | #ifdef CONFIG_FB_SIS_300 | 3547 | #ifdef CONFIG_FB_SIS_300 |
3548 | if(ivideo->sisvga_engine == SIS_300_VGA) { | 3548 | if(ivideo->sisvga_engine == SIS_300_VGA) { |
3549 | tvregnum = 0x35; | 3549 | tvregnum = 0x35; |
3550 | inSISIDXREG(SISCR, tvregnum, cr38); | 3550 | cr38 = SiS_GetReg(SISCR, tvregnum); |
3551 | } | 3551 | } |
3552 | #endif | 3552 | #endif |
3553 | 3553 | ||
@@ -3682,12 +3682,12 @@ sisfb_fixup_SR11(struct sis_video_info *ivideo) | |||
3682 | u8 tmpreg; | 3682 | u8 tmpreg; |
3683 | 3683 | ||
3684 | if(ivideo->chip >= SIS_661) { | 3684 | if(ivideo->chip >= SIS_661) { |
3685 | inSISIDXREG(SISSR,0x11,tmpreg); | 3685 | tmpreg = SiS_GetReg(SISSR, 0x11); |
3686 | if(tmpreg & 0x20) { | 3686 | if(tmpreg & 0x20) { |
3687 | inSISIDXREG(SISSR,0x3e,tmpreg); | 3687 | tmpreg = SiS_GetReg(SISSR, 0x3e); |
3688 | tmpreg = (tmpreg + 1) & 0xff; | 3688 | tmpreg = (tmpreg + 1) & 0xff; |
3689 | outSISIDXREG(SISSR,0x3e,tmpreg); | 3689 | outSISIDXREG(SISSR,0x3e,tmpreg); |
3690 | inSISIDXREG(SISSR,0x11,tmpreg); | 3690 | tmpreg = SiS_GetReg(SISSR, 0x11); |
3691 | } | 3691 | } |
3692 | if(tmpreg & 0xf0) { | 3692 | if(tmpreg & 0xf0) { |
3693 | andSISIDXREG(SISSR,0x11,0x0f); | 3693 | andSISIDXREG(SISSR,0x11,0x0f); |
@@ -3875,13 +3875,13 @@ sisfb_post_setmode(struct sis_video_info *ivideo) | |||
3875 | 3875 | ||
3876 | if(ivideo->currentvbflags & CRT2_TV) { | 3876 | if(ivideo->currentvbflags & CRT2_TV) { |
3877 | if(ivideo->vbflags2 & VB2_SISBRIDGE) { | 3877 | if(ivideo->vbflags2 & VB2_SISBRIDGE) { |
3878 | inSISIDXREG(SISPART2,0x1f,ivideo->p2_1f); | 3878 | ivideo->p2_1f = SiS_GetReg(SISPART2, 0x1f); |
3879 | inSISIDXREG(SISPART2,0x20,ivideo->p2_20); | 3879 | ivideo->p2_20 = SiS_GetReg(SISPART2, 0x20); |
3880 | inSISIDXREG(SISPART2,0x2b,ivideo->p2_2b); | 3880 | ivideo->p2_2b = SiS_GetReg(SISPART2, 0x2b); |
3881 | inSISIDXREG(SISPART2,0x42,ivideo->p2_42); | 3881 | ivideo->p2_42 = SiS_GetReg(SISPART2, 0x42); |
3882 | inSISIDXREG(SISPART2,0x43,ivideo->p2_43); | 3882 | ivideo->p2_43 = SiS_GetReg(SISPART2, 0x43); |
3883 | inSISIDXREG(SISPART2,0x01,ivideo->p2_01); | 3883 | ivideo->p2_01 = SiS_GetReg(SISPART2, 0x01); |
3884 | inSISIDXREG(SISPART2,0x02,ivideo->p2_02); | 3884 | ivideo->p2_02 = SiS_GetReg(SISPART2, 0x02); |
3885 | } else if(ivideo->vbflags2 & VB2_CHRONTEL) { | 3885 | } else if(ivideo->vbflags2 & VB2_CHRONTEL) { |
3886 | if(ivideo->chronteltype == 1) { | 3886 | if(ivideo->chronteltype == 1) { |
3887 | ivideo->tvx = SiS_GetCH700x(&ivideo->SiS_Pr, 0x0a); | 3887 | ivideo->tvx = SiS_GetCH700x(&ivideo->SiS_Pr, 0x0a); |
@@ -4206,11 +4206,11 @@ sisfb_post_300_buswidth(struct sis_video_info *ivideo) | |||
4206 | if(readw(FBAddress) == temp) | 4206 | if(readw(FBAddress) == temp) |
4207 | break; | 4207 | break; |
4208 | orSISIDXREG(SISSR, 0x3c, 0x01); | 4208 | orSISIDXREG(SISSR, 0x3c, 0x01); |
4209 | inSISIDXREG(SISSR, 0x05, reg); | 4209 | reg = SiS_GetReg(SISSR, 0x05); |
4210 | inSISIDXREG(SISSR, 0x05, reg); | 4210 | reg = SiS_GetReg(SISSR, 0x05); |
4211 | andSISIDXREG(SISSR, 0x3c, 0xfe); | 4211 | andSISIDXREG(SISSR, 0x3c, 0xfe); |
4212 | inSISIDXREG(SISSR, 0x05, reg); | 4212 | reg = SiS_GetReg(SISSR, 0x05); |
4213 | inSISIDXREG(SISSR, 0x05, reg); | 4213 | reg = SiS_GetReg(SISSR, 0x05); |
4214 | temp++; | 4214 | temp++; |
4215 | } | 4215 | } |
4216 | } | 4216 | } |
@@ -4220,7 +4220,7 @@ sisfb_post_300_buswidth(struct sis_video_info *ivideo) | |||
4220 | writel(0x89ABCDEFL, (FBAddress + 8)); | 4220 | writel(0x89ABCDEFL, (FBAddress + 8)); |
4221 | writel(0xCDEF0123L, (FBAddress + 12)); | 4221 | writel(0xCDEF0123L, (FBAddress + 12)); |
4222 | 4222 | ||
4223 | inSISIDXREG(SISSR, 0x3b, reg); | 4223 | reg = SiS_GetReg(SISSR, 0x3b); |
4224 | if(reg & 0x01) { | 4224 | if(reg & 0x01) { |
4225 | if(readl((FBAddress + 12)) == 0xCDEF0123L) | 4225 | if(readl((FBAddress + 12)) == 0xCDEF0123L) |
4226 | return 4; /* Channel A 128bit */ | 4226 | return 4; /* Channel A 128bit */ |
@@ -4362,7 +4362,7 @@ sisfb_post_sis300(struct pci_dev *pdev) | |||
4362 | if(bios[0x52] & 0x80) { | 4362 | if(bios[0x52] & 0x80) { |
4363 | memtype = bios[0x52]; | 4363 | memtype = bios[0x52]; |
4364 | } else { | 4364 | } else { |
4365 | inSISIDXREG(SISSR, 0x3a, memtype); | 4365 | memtype = SiS_GetReg(SISSR, 0x3a); |
4366 | } | 4366 | } |
4367 | memtype &= 0x07; | 4367 | memtype &= 0x07; |
4368 | } | 4368 | } |
@@ -4459,7 +4459,7 @@ sisfb_post_sis300(struct pci_dev *pdev) | |||
4459 | if(ivideo->revision_id >= 0x80) | 4459 | if(ivideo->revision_id >= 0x80) |
4460 | v2 &= ~0x01; | 4460 | v2 &= ~0x01; |
4461 | 4461 | ||
4462 | inSISIDXREG(SISPART4, 0x00, reg); | 4462 | reg = SiS_GetReg(SISPART4, 0x00); |
4463 | if((reg == 1) || (reg == 2)) { | 4463 | if((reg == 1) || (reg == 2)) { |
4464 | outSISIDXREG(SISCR, 0x37, 0x02); | 4464 | outSISIDXREG(SISCR, 0x37, 0x02); |
4465 | outSISIDXREG(SISPART2, 0x00, 0x1c); | 4465 | outSISIDXREG(SISPART2, 0x00, 0x1c); |
@@ -4473,9 +4473,9 @@ sisfb_post_sis300(struct pci_dev *pdev) | |||
4473 | outSISIDXREG(SISPART4, 0x0e, v5); | 4473 | outSISIDXREG(SISPART4, 0x0e, v5); |
4474 | outSISIDXREG(SISPART4, 0x10, v6); | 4474 | outSISIDXREG(SISPART4, 0x10, v6); |
4475 | outSISIDXREG(SISPART4, 0x0f, 0x3f); | 4475 | outSISIDXREG(SISPART4, 0x0f, 0x3f); |
4476 | inSISIDXREG(SISPART4, 0x01, reg); | 4476 | reg = SiS_GetReg(SISPART4, 0x01); |
4477 | if(reg >= 0xb0) { | 4477 | if(reg >= 0xb0) { |
4478 | inSISIDXREG(SISPART4, 0x23, reg); | 4478 | reg = SiS_GetReg(SISPART4, 0x23); |
4479 | reg &= 0x20; | 4479 | reg &= 0x20; |
4480 | reg <<= 1; | 4480 | reg <<= 1; |
4481 | outSISIDXREG(SISPART4, 0x23, reg); | 4481 | outSISIDXREG(SISPART4, 0x23, reg); |
@@ -4487,7 +4487,7 @@ sisfb_post_sis300(struct pci_dev *pdev) | |||
4487 | 4487 | ||
4488 | andSISIDXREG(SISPART1, 0x24, 0xfe); /* Lock CRT2 */ | 4488 | andSISIDXREG(SISPART1, 0x24, 0xfe); /* Lock CRT2 */ |
4489 | 4489 | ||
4490 | inSISIDXREG(SISSR, 0x16, reg); | 4490 | reg = SiS_GetReg(SISSR, 0x16); |
4491 | reg &= 0xc3; | 4491 | reg &= 0xc3; |
4492 | outSISIDXREG(SISCR, 0x35, reg); | 4492 | outSISIDXREG(SISCR, 0x35, reg); |
4493 | outSISIDXREG(SISCR, 0x83, 0x00); | 4493 | outSISIDXREG(SISCR, 0x83, 0x00); |
@@ -4518,7 +4518,7 @@ sisfb_post_sis300(struct pci_dev *pdev) | |||
4518 | v1 = bios[0xe6]; | 4518 | v1 = bios[0xe6]; |
4519 | v2 = bios[0xe7]; | 4519 | v2 = bios[0xe7]; |
4520 | } else { | 4520 | } else { |
4521 | inSISIDXREG(SISSR, 0x3a, reg); | 4521 | reg = SiS_GetReg(SISSR, 0x3a); |
4522 | if((reg & 0x30) == 0x30) { | 4522 | if((reg & 0x30) == 0x30) { |
4523 | v1 = 0x04; /* PCI */ | 4523 | v1 = 0x04; /* PCI */ |
4524 | v2 = 0x92; | 4524 | v2 = 0x92; |
@@ -4570,7 +4570,7 @@ sisfb_post_xgi_delay(struct sis_video_info *ivideo, int delay) | |||
4570 | u8 reg; | 4570 | u8 reg; |
4571 | 4571 | ||
4572 | for(i = 0; i <= (delay * 10 * 36); i++) { | 4572 | for(i = 0; i <= (delay * 10 * 36); i++) { |
4573 | inSISIDXREG(SISSR, 0x05, reg); | 4573 | reg = SiS_GetReg(SISSR, 0x05); |
4574 | reg++; | 4574 | reg++; |
4575 | } | 4575 | } |
4576 | } | 4576 | } |
@@ -4684,7 +4684,7 @@ sisfb_post_xgi_ramsize(struct sis_video_info *ivideo) | |||
4684 | if(ivideo->chip == XGI_20) { | 4684 | if(ivideo->chip == XGI_20) { |
4685 | 4685 | ||
4686 | channelab = 1; | 4686 | channelab = 1; |
4687 | inSISIDXREG(SISCR, 0x97, reg); | 4687 | reg = SiS_GetReg(SISCR, 0x97); |
4688 | if(!(reg & 0x01)) { /* Single 32/16 */ | 4688 | if(!(reg & 0x01)) { /* Single 32/16 */ |
4689 | buswidth = 32; | 4689 | buswidth = 32; |
4690 | outSISIDXREG(SISSR, 0x13, 0xb1); | 4690 | outSISIDXREG(SISSR, 0x13, 0xb1); |
@@ -4737,9 +4737,9 @@ sisfb_post_xgi_ramsize(struct sis_video_info *ivideo) | |||
4737 | 4737 | ||
4738 | } else { /* XGI_40 */ | 4738 | } else { /* XGI_40 */ |
4739 | 4739 | ||
4740 | inSISIDXREG(SISCR, 0x97, reg); | 4740 | reg = SiS_GetReg(SISCR, 0x97); |
4741 | if(!(reg & 0x10)) { | 4741 | if(!(reg & 0x10)) { |
4742 | inSISIDXREG(SISSR, 0x39, reg); | 4742 | reg = SiS_GetReg(SISSR, 0x39); |
4743 | reg >>= 1; | 4743 | reg >>= 1; |
4744 | } | 4744 | } |
4745 | 4745 | ||
@@ -4846,7 +4846,7 @@ bail_out: | |||
4846 | ranksize = (ivideo->chip == XGI_20) ? | 4846 | ranksize = (ivideo->chip == XGI_20) ? |
4847 | dramsr13[(i * 5) + 3] : dramsr13_4[(i * 5) + 3]; | 4847 | dramsr13[(i * 5) + 3] : dramsr13_4[(i * 5) + 3]; |
4848 | 4848 | ||
4849 | inSISIDXREG(SISSR, 0x13, reg); | 4849 | reg = SiS_GetReg(SISSR, 0x13); |
4850 | if(reg & 0x80) ranksize <<= 1; | 4850 | if(reg & 0x80) ranksize <<= 1; |
4851 | 4851 | ||
4852 | if(ivideo->chip == XGI_20) { | 4852 | if(ivideo->chip == XGI_20) { |
@@ -5007,7 +5007,7 @@ sisfb_post_xgi(struct pci_dev *pdev) | |||
5007 | 5007 | ||
5008 | /* Unlock SR */ | 5008 | /* Unlock SR */ |
5009 | outSISIDXREG(SISSR, 0x05, 0x86); | 5009 | outSISIDXREG(SISSR, 0x05, 0x86); |
5010 | inSISIDXREG(SISSR, 0x05, reg); | 5010 | reg = SiS_GetReg(SISSR, 0x05); |
5011 | if(reg != 0xa1) | 5011 | if(reg != 0xa1) |
5012 | return 0; | 5012 | return 0; |
5013 | 5013 | ||
@@ -5068,7 +5068,7 @@ sisfb_post_xgi(struct pci_dev *pdev) | |||
5068 | } | 5068 | } |
5069 | if(ivideo->revision_id == 0) { /* 40 *and* 20? */ | 5069 | if(ivideo->revision_id == 0) { /* 40 *and* 20? */ |
5070 | andSISIDXREG(SISCR, 0x58, 0xd7); | 5070 | andSISIDXREG(SISCR, 0x58, 0xd7); |
5071 | inSISIDXREG(SISCR, 0xcb, reg); | 5071 | reg = SiS_GetReg(SISCR, 0xcb); |
5072 | if(reg & 0x20) { | 5072 | if(reg & 0x20) { |
5073 | setSISIDXREG(SISCR, 0x58, 0xd7, (reg & 0x10) ? 0x08 : 0x20); /* =0x28 Z7 ? */ | 5073 | setSISIDXREG(SISCR, 0x58, 0xd7, (reg & 0x10) ? 0x08 : 0x20); /* =0x28 Z7 ? */ |
5074 | } | 5074 | } |
@@ -5095,7 +5095,7 @@ sisfb_post_xgi(struct pci_dev *pdev) | |||
5095 | andSISIDXREG(SISPART1, 0x35, 0x7f); | 5095 | andSISIDXREG(SISPART1, 0x35, 0x7f); |
5096 | andSISIDXREG(SISPART1, 0x50, 0xfe); | 5096 | andSISIDXREG(SISPART1, 0x50, 0xfe); |
5097 | 5097 | ||
5098 | inSISIDXREG(SISPART4, 0x00, reg); | 5098 | reg = SiS_GetReg(SISPART4, 0x00); |
5099 | if(reg == 1 || reg == 2) { | 5099 | if(reg == 1 || reg == 2) { |
5100 | outSISIDXREG(SISPART2, 0x00, 0x1c); | 5100 | outSISIDXREG(SISPART2, 0x00, 0x1c); |
5101 | outSISIDXREG(SISPART4, 0x0d, bios[0x7f]); | 5101 | outSISIDXREG(SISPART4, 0x0d, bios[0x7f]); |
@@ -5103,9 +5103,9 @@ sisfb_post_xgi(struct pci_dev *pdev) | |||
5103 | outSISIDXREG(SISPART4, 0x10, bios[0x81]); | 5103 | outSISIDXREG(SISPART4, 0x10, bios[0x81]); |
5104 | andSISIDXREG(SISPART4, 0x0f, 0x3f); | 5104 | andSISIDXREG(SISPART4, 0x0f, 0x3f); |
5105 | 5105 | ||
5106 | inSISIDXREG(SISPART4, 0x01, reg); | 5106 | reg = SiS_GetReg(SISPART4, 0x01); |
5107 | if((reg & 0xf0) >= 0xb0) { | 5107 | if((reg & 0xf0) >= 0xb0) { |
5108 | inSISIDXREG(SISPART4, 0x23, reg); | 5108 | reg = SiS_GetReg(SISPART4, 0x23); |
5109 | if(reg & 0x20) reg |= 0x40; | 5109 | if(reg & 0x20) reg |= 0x40; |
5110 | outSISIDXREG(SISPART4, 0x23, reg); | 5110 | outSISIDXREG(SISPART4, 0x23, reg); |
5111 | reg = (reg & 0x20) ? 0x02 : 0x00; | 5111 | reg = (reg & 0x20) ? 0x02 : 0x00; |
@@ -5115,12 +5115,12 @@ sisfb_post_xgi(struct pci_dev *pdev) | |||
5115 | 5115 | ||
5116 | v1 = bios[0x77]; | 5116 | v1 = bios[0x77]; |
5117 | 5117 | ||
5118 | inSISIDXREG(SISSR, 0x3b, reg); | 5118 | reg = SiS_GetReg(SISSR, 0x3b); |
5119 | if(reg & 0x02) { | 5119 | if(reg & 0x02) { |
5120 | inSISIDXREG(SISSR, 0x3a, reg); | 5120 | reg = SiS_GetReg(SISSR, 0x3a); |
5121 | v2 = (reg & 0x30) >> 3; | 5121 | v2 = (reg & 0x30) >> 3; |
5122 | if(!(v2 & 0x04)) v2 ^= 0x02; | 5122 | if(!(v2 & 0x04)) v2 ^= 0x02; |
5123 | inSISIDXREG(SISSR, 0x39, reg); | 5123 | reg = SiS_GetReg(SISSR, 0x39); |
5124 | if(reg & 0x80) v2 |= 0x80; | 5124 | if(reg & 0x80) v2 |= 0x80; |
5125 | v2 |= 0x01; | 5125 | v2 |= 0x01; |
5126 | 5126 | ||
@@ -5158,8 +5158,8 @@ sisfb_post_xgi(struct pci_dev *pdev) | |||
5158 | outSISIDXREG(SISSR, 0x22, v1); | 5158 | outSISIDXREG(SISSR, 0x22, v1); |
5159 | 5159 | ||
5160 | if(ivideo->revision_id == 2) { | 5160 | if(ivideo->revision_id == 2) { |
5161 | inSISIDXREG(SISSR, 0x3b, v1); | 5161 | v1 = SiS_GetReg(SISSR, 0x3b); |
5162 | inSISIDXREG(SISSR, 0x3a, v2); | 5162 | v2 = SiS_GetReg(SISSR, 0x3a); |
5163 | regd = bios[0x90 + 3] | (bios[0x90 + 4] << 8); | 5163 | regd = bios[0x90 + 3] | (bios[0x90 + 4] << 8); |
5164 | if( (!(v1 & 0x02)) && (v2 & 0x30) && (regd < 0xcf) ) | 5164 | if( (!(v1 & 0x02)) && (v2 & 0x30) && (regd < 0xcf) ) |
5165 | setSISIDXREG(SISCR, 0x5f, 0xf1, 0x01); | 5165 | setSISIDXREG(SISCR, 0x5f, 0xf1, 0x01); |
@@ -5175,8 +5175,8 @@ sisfb_post_xgi(struct pci_dev *pdev) | |||
5175 | } | 5175 | } |
5176 | 5176 | ||
5177 | v1 = 0x30; | 5177 | v1 = 0x30; |
5178 | inSISIDXREG(SISSR, 0x3b, reg); | 5178 | reg = SiS_GetReg(SISSR, 0x3b); |
5179 | inSISIDXREG(SISCR, 0x5f, v2); | 5179 | v2 = SiS_GetReg(SISCR, 0x5f); |
5180 | if((!(reg & 0x02)) && (v2 & 0x0e)) | 5180 | if((!(reg & 0x02)) && (v2 & 0x0e)) |
5181 | v1 |= 0x08; | 5181 | v1 |= 0x08; |
5182 | outSISIDXREG(SISSR, 0x27, v1); | 5182 | outSISIDXREG(SISSR, 0x27, v1); |
@@ -5253,8 +5253,8 @@ sisfb_post_xgi(struct pci_dev *pdev) | |||
5253 | if(regd & 0x02) reg |= 0x08; | 5253 | if(regd & 0x02) reg |= 0x08; |
5254 | regd >>= 2; | 5254 | regd >>= 2; |
5255 | outSISIDXREG(SISCR, rega, reg); | 5255 | outSISIDXREG(SISCR, rega, reg); |
5256 | inSISIDXREG(SISCR, rega, reg); | 5256 | reg = SiS_GetReg(SISCR, rega); |
5257 | inSISIDXREG(SISCR, rega, reg); | 5257 | reg = SiS_GetReg(SISCR, rega); |
5258 | reg += 0x10; | 5258 | reg += 0x10; |
5259 | } | 5259 | } |
5260 | } | 5260 | } |
@@ -5282,8 +5282,8 @@ sisfb_post_xgi(struct pci_dev *pdev) | |||
5282 | if(regd & 0x02) reg |= 0x02; | 5282 | if(regd & 0x02) reg |= 0x02; |
5283 | regd >>= 2; | 5283 | regd >>= 2; |
5284 | outSISIDXREG(SISCR, 0x6f, reg); | 5284 | outSISIDXREG(SISCR, 0x6f, reg); |
5285 | inSISIDXREG(SISCR, 0x6f, reg); | 5285 | reg = SiS_GetReg(SISCR, 0x6f); |
5286 | inSISIDXREG(SISCR, 0x6f, reg); | 5286 | reg = SiS_GetReg(SISCR, 0x6f); |
5287 | reg += 0x08; | 5287 | reg += 0x08; |
5288 | } | 5288 | } |
5289 | } | 5289 | } |
@@ -5312,8 +5312,8 @@ sisfb_post_xgi(struct pci_dev *pdev) | |||
5312 | if(regd & 0x02) reg |= 0x02; | 5312 | if(regd & 0x02) reg |= 0x02; |
5313 | regd >>= 2; | 5313 | regd >>= 2; |
5314 | outSISIDXREG(SISCR, 0x89, reg); | 5314 | outSISIDXREG(SISCR, 0x89, reg); |
5315 | inSISIDXREG(SISCR, 0x89, reg); | 5315 | reg = SiS_GetReg(SISCR, 0x89); |
5316 | inSISIDXREG(SISCR, 0x89, reg); | 5316 | reg = SiS_GetReg(SISCR, 0x89); |
5317 | reg += 0x10; | 5317 | reg += 0x10; |
5318 | } | 5318 | } |
5319 | 5319 | ||
@@ -5383,15 +5383,15 @@ sisfb_post_xgi(struct pci_dev *pdev) | |||
5383 | if(!(ramtype & 0x80)) { | 5383 | if(!(ramtype & 0x80)) { |
5384 | if(ivideo->chip == XGI_20) { | 5384 | if(ivideo->chip == XGI_20) { |
5385 | outSISIDXREG(SISCR, 0x97, v1); | 5385 | outSISIDXREG(SISCR, 0x97, v1); |
5386 | inSISIDXREG(SISCR, 0x97, reg); | 5386 | reg = SiS_GetReg(SISCR, 0x97); |
5387 | if(reg & 0x10) { | 5387 | if(reg & 0x10) { |
5388 | ramtype = (reg & 0x01) << 1; | 5388 | ramtype = (reg & 0x01) << 1; |
5389 | } | 5389 | } |
5390 | } else { | 5390 | } else { |
5391 | inSISIDXREG(SISSR, 0x39, reg); | 5391 | reg = SiS_GetReg(SISSR, 0x39); |
5392 | ramtype = reg & 0x02; | 5392 | ramtype = reg & 0x02; |
5393 | if(!(ramtype)) { | 5393 | if(!(ramtype)) { |
5394 | inSISIDXREG(SISSR, 0x3a, reg); | 5394 | reg = SiS_GetReg(SISSR, 0x3a); |
5395 | ramtype = (reg >> 1) & 0x01; | 5395 | ramtype = (reg >> 1) & 0x01; |
5396 | } | 5396 | } |
5397 | } | 5397 | } |
@@ -5418,15 +5418,15 @@ sisfb_post_xgi(struct pci_dev *pdev) | |||
5418 | } else { | 5418 | } else { |
5419 | outSISIDXREG(SISCR, 0x82, 0x88); | 5419 | outSISIDXREG(SISCR, 0x82, 0x88); |
5420 | outSISIDXREG(SISCR, 0x86, 0x00); | 5420 | outSISIDXREG(SISCR, 0x86, 0x00); |
5421 | inSISIDXREG(SISCR, 0x86, reg); | 5421 | reg = SiS_GetReg(SISCR, 0x86); |
5422 | outSISIDXREG(SISCR, 0x86, 0x88); | 5422 | outSISIDXREG(SISCR, 0x86, 0x88); |
5423 | inSISIDXREG(SISCR, 0x86, reg); | 5423 | reg = SiS_GetReg(SISCR, 0x86); |
5424 | outSISIDXREG(SISCR, 0x86, bios[regb + 0x168]); | 5424 | outSISIDXREG(SISCR, 0x86, bios[regb + 0x168]); |
5425 | outSISIDXREG(SISCR, 0x82, 0x77); | 5425 | outSISIDXREG(SISCR, 0x82, 0x77); |
5426 | outSISIDXREG(SISCR, 0x85, 0x00); | 5426 | outSISIDXREG(SISCR, 0x85, 0x00); |
5427 | inSISIDXREG(SISCR, 0x85, reg); | 5427 | reg = SiS_GetReg(SISCR, 0x85); |
5428 | outSISIDXREG(SISCR, 0x85, 0x88); | 5428 | outSISIDXREG(SISCR, 0x85, 0x88); |
5429 | inSISIDXREG(SISCR, 0x85, reg); | 5429 | reg = SiS_GetReg(SISCR, 0x85); |
5430 | outSISIDXREG(SISCR, 0x85, bios[regb + 0x160]); | 5430 | outSISIDXREG(SISCR, 0x85, bios[regb + 0x160]); |
5431 | outSISIDXREG(SISCR, 0x82, bios[regb + 0x158]); | 5431 | outSISIDXREG(SISCR, 0x82, bios[regb + 0x158]); |
5432 | } | 5432 | } |
@@ -5487,9 +5487,9 @@ sisfb_post_xgi(struct pci_dev *pdev) | |||
5487 | case 1: | 5487 | case 1: |
5488 | outSISIDXREG(SISCR, 0x82, 0x77); | 5488 | outSISIDXREG(SISCR, 0x82, 0x77); |
5489 | outSISIDXREG(SISCR, 0x86, 0x00); | 5489 | outSISIDXREG(SISCR, 0x86, 0x00); |
5490 | inSISIDXREG(SISCR, 0x86, reg); | 5490 | reg = SiS_GetReg(SISCR, 0x86); |
5491 | outSISIDXREG(SISCR, 0x86, 0x88); | 5491 | outSISIDXREG(SISCR, 0x86, 0x88); |
5492 | inSISIDXREG(SISCR, 0x86, reg); | 5492 | reg = SiS_GetReg(SISCR, 0x86); |
5493 | v1 = cs168[regb]; v2 = cs160[regb]; v3 = cs158[regb]; | 5493 | v1 = cs168[regb]; v2 = cs160[regb]; v3 = cs158[regb]; |
5494 | if(ivideo->haveXGIROM) { | 5494 | if(ivideo->haveXGIROM) { |
5495 | v1 = bios[regb + 0x168]; | 5495 | v1 = bios[regb + 0x168]; |
@@ -5499,9 +5499,9 @@ sisfb_post_xgi(struct pci_dev *pdev) | |||
5499 | outSISIDXREG(SISCR, 0x86, v1); | 5499 | outSISIDXREG(SISCR, 0x86, v1); |
5500 | outSISIDXREG(SISCR, 0x82, 0x77); | 5500 | outSISIDXREG(SISCR, 0x82, 0x77); |
5501 | outSISIDXREG(SISCR, 0x85, 0x00); | 5501 | outSISIDXREG(SISCR, 0x85, 0x00); |
5502 | inSISIDXREG(SISCR, 0x85, reg); | 5502 | reg = SiS_GetReg(SISCR, 0x85); |
5503 | outSISIDXREG(SISCR, 0x85, 0x88); | 5503 | outSISIDXREG(SISCR, 0x85, 0x88); |
5504 | inSISIDXREG(SISCR, 0x85, reg); | 5504 | reg = SiS_GetReg(SISCR, 0x85); |
5505 | outSISIDXREG(SISCR, 0x85, v2); | 5505 | outSISIDXREG(SISCR, 0x85, v2); |
5506 | outSISIDXREG(SISCR, 0x82, v3); | 5506 | outSISIDXREG(SISCR, 0x82, v3); |
5507 | outSISIDXREG(SISCR, 0x98, 0x01); | 5507 | outSISIDXREG(SISCR, 0x98, 0x01); |
@@ -5552,13 +5552,13 @@ sisfb_post_xgi(struct pci_dev *pdev) | |||
5552 | } else { | 5552 | } else { |
5553 | outSISIDXREG(SISCR, 0x82, 0x88); | 5553 | outSISIDXREG(SISCR, 0x82, 0x88); |
5554 | outSISIDXREG(SISCR, 0x86, 0x00); | 5554 | outSISIDXREG(SISCR, 0x86, 0x00); |
5555 | inSISIDXREG(SISCR, 0x86, reg); | 5555 | reg = SiS_GetReg(SISCR, 0x86); |
5556 | outSISIDXREG(SISCR, 0x86, 0x88); | 5556 | outSISIDXREG(SISCR, 0x86, 0x88); |
5557 | outSISIDXREG(SISCR, 0x82, 0x77); | 5557 | outSISIDXREG(SISCR, 0x82, 0x77); |
5558 | outSISIDXREG(SISCR, 0x85, 0x00); | 5558 | outSISIDXREG(SISCR, 0x85, 0x00); |
5559 | inSISIDXREG(SISCR, 0x85, reg); | 5559 | reg = SiS_GetReg(SISCR, 0x85); |
5560 | outSISIDXREG(SISCR, 0x85, 0x88); | 5560 | outSISIDXREG(SISCR, 0x85, 0x88); |
5561 | inSISIDXREG(SISCR, 0x85, reg); | 5561 | reg = SiS_GetReg(SISCR, 0x85); |
5562 | v1 = cs160[regb]; v2 = cs158[regb]; | 5562 | v1 = cs160[regb]; v2 = cs158[regb]; |
5563 | if(ivideo->haveXGIROM) { | 5563 | if(ivideo->haveXGIROM) { |
5564 | v1 = bios[regb + 0x160]; | 5564 | v1 = bios[regb + 0x160]; |
@@ -5670,11 +5670,11 @@ sisfb_post_xgi(struct pci_dev *pdev) | |||
5670 | #if 0 | 5670 | #if 0 |
5671 | printk(KERN_DEBUG "-----------------\n"); | 5671 | printk(KERN_DEBUG "-----------------\n"); |
5672 | for(i = 0; i < 0xff; i++) { | 5672 | for(i = 0; i < 0xff; i++) { |
5673 | inSISIDXREG(SISCR, i, reg); | 5673 | reg = SiS_GetReg(SISCR, i); |
5674 | printk(KERN_DEBUG "CR%02x(%x) = 0x%02x\n", i, SISCR, reg); | 5674 | printk(KERN_DEBUG "CR%02x(%x) = 0x%02x\n", i, SISCR, reg); |
5675 | } | 5675 | } |
5676 | for(i = 0; i < 0x40; i++) { | 5676 | for(i = 0; i < 0x40; i++) { |
5677 | inSISIDXREG(SISSR, i, reg); | 5677 | reg = SiS_GetReg(SISSR, i); |
5678 | printk(KERN_DEBUG "SR%02x(%x) = 0x%02x\n", i, SISSR, reg); | 5678 | printk(KERN_DEBUG "SR%02x(%x) = 0x%02x\n", i, SISSR, reg); |
5679 | } | 5679 | } |
5680 | printk(KERN_DEBUG "-----------------\n"); | 5680 | printk(KERN_DEBUG "-----------------\n"); |
@@ -5684,7 +5684,7 @@ sisfb_post_xgi(struct pci_dev *pdev) | |||
5684 | if(ivideo->chip == XGI_20) { | 5684 | if(ivideo->chip == XGI_20) { |
5685 | orSISIDXREG(SISCR, 0x32, 0x20); | 5685 | orSISIDXREG(SISCR, 0x32, 0x20); |
5686 | } else { | 5686 | } else { |
5687 | inSISIDXREG(SISPART4, 0x00, reg); | 5687 | reg = SiS_GetReg(SISPART4, 0x00); |
5688 | if((reg == 1) || (reg == 2)) { | 5688 | if((reg == 1) || (reg == 2)) { |
5689 | sisfb_sense_crt1(ivideo); | 5689 | sisfb_sense_crt1(ivideo); |
5690 | } else { | 5690 | } else { |
@@ -5711,8 +5711,8 @@ sisfb_post_xgi(struct pci_dev *pdev) | |||
5711 | ivideo->modeprechange = 0x2e; | 5711 | ivideo->modeprechange = 0x2e; |
5712 | 5712 | ||
5713 | if(ivideo->chip == XGI_40) { | 5713 | if(ivideo->chip == XGI_40) { |
5714 | inSISIDXREG(SISCR, 0xca, reg); | 5714 | reg = SiS_GetReg(SISCR, 0xca); |
5715 | inSISIDXREG(SISCR, 0xcc, v1); | 5715 | v1 = SiS_GetReg(SISCR, 0xcc); |
5716 | if((reg & 0x10) && (!(v1 & 0x04))) { | 5716 | if((reg & 0x10) && (!(v1 & 0x04))) { |
5717 | printk(KERN_ERR | 5717 | printk(KERN_ERR |
5718 | "sisfb: Please connect power to the card.\n"); | 5718 | "sisfb: Please connect power to the card.\n"); |
@@ -5969,7 +5969,7 @@ sisfb_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
5969 | 5969 | ||
5970 | /* Find out about current video mode */ | 5970 | /* Find out about current video mode */ |
5971 | ivideo->modeprechange = 0x03; | 5971 | ivideo->modeprechange = 0x03; |
5972 | inSISIDXREG(SISCR, 0x34, reg); | 5972 | reg = SiS_GetReg(SISCR, 0x34); |
5973 | if(reg & 0x7f) { | 5973 | if(reg & 0x7f) { |
5974 | ivideo->modeprechange = reg & 0x7f; | 5974 | ivideo->modeprechange = reg & 0x7f; |
5975 | } else if(ivideo->sisvga_enabled) { | 5975 | } else if(ivideo->sisvga_enabled) { |