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authorMarc Zyngier <marc.zyngier@arm.com>2011-09-08 08:15:22 -0400
committerArnd Bergmann <arnd@arndb.de>2012-09-14 05:15:00 -0400
commite4f2d97920f2256e5af035281e8ac35030493bf8 (patch)
tree8abfc534847e5d8368f0b3dfb637fde84e4f1f25
parent7ad71b61e744e7c565eec9e7aa734b0c42d93b16 (diff)
ARM: SoC: convert imx6q to SMP operations
Convert the imx6q platform to use struct smp_operations to provide its SMP and CPU hotplug operations. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Nicolas Pitre <nico@linaro.org> Cc: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r--arch/arm/mach-imx/hotplug.c16
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c1
-rw-r--r--arch/arm/mach-imx/platsmp.c18
-rw-r--r--arch/arm/plat-mxc/include/mach/common.h4
4 files changed, 20 insertions, 19 deletions
diff --git a/arch/arm/mach-imx/hotplug.c b/arch/arm/mach-imx/hotplug.c
index f8f7437c83b8..b07b778dc9a8 100644
--- a/arch/arm/mach-imx/hotplug.c
+++ b/arch/arm/mach-imx/hotplug.c
@@ -15,11 +15,6 @@
15#include <asm/cp15.h> 15#include <asm/cp15.h>
16#include <mach/common.h> 16#include <mach/common.h>
17 17
18int platform_cpu_kill(unsigned int cpu)
19{
20 return 1;
21}
22
23static inline void cpu_enter_lowpower(void) 18static inline void cpu_enter_lowpower(void)
24{ 19{
25 unsigned int v; 20 unsigned int v;
@@ -47,7 +42,7 @@ static inline void cpu_enter_lowpower(void)
47 * 42 *
48 * Called with IRQs disabled 43 * Called with IRQs disabled
49 */ 44 */
50void platform_cpu_die(unsigned int cpu) 45void imx_cpu_die(unsigned int cpu)
51{ 46{
52 cpu_enter_lowpower(); 47 cpu_enter_lowpower();
53 imx_enable_cpu(cpu, false); 48 imx_enable_cpu(cpu, false);
@@ -56,12 +51,3 @@ void platform_cpu_die(unsigned int cpu)
56 while (1) 51 while (1)
57 ; 52 ;
58} 53}
59
60int platform_cpu_disable(unsigned int cpu)
61{
62 /*
63 * we don't allow CPU 0 to be shutdown (it is still too special
64 * e.g. clock tick interrupts)
65 */
66 return cpu == 0 ? -EPERM : 0;
67}
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 045b3f6a387d..9591b4d6df12 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -226,6 +226,7 @@ static const char *imx6q_dt_compat[] __initdata = {
226}; 226};
227 227
228DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)") 228DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
229 .smp = smp_ops(imx_smp_ops),
229 .map_io = imx6q_map_io, 230 .map_io = imx6q_map_io,
230 .init_irq = imx6q_init_irq, 231 .init_irq = imx6q_init_irq,
231 .handle_irq = imx6q_handle_irq, 232 .handle_irq = imx6q_handle_irq,
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c
index ab98c6fec9eb..2ac43e1a2dfd 100644
--- a/arch/arm/mach-imx/platsmp.c
+++ b/arch/arm/mach-imx/platsmp.c
@@ -41,7 +41,7 @@ void __init imx_scu_map_io(void)
41 scu_base = IMX_IO_ADDRESS(base); 41 scu_base = IMX_IO_ADDRESS(base);
42} 42}
43 43
44void __cpuinit platform_secondary_init(unsigned int cpu) 44static void __cpuinit imx_secondary_init(unsigned int cpu)
45{ 45{
46 /* 46 /*
47 * if any interrupts are already enabled for the primary 47 * if any interrupts are already enabled for the primary
@@ -51,7 +51,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
51 gic_secondary_init(0); 51 gic_secondary_init(0);
52} 52}
53 53
54int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) 54static int __cpuinit imx_boot_secondary(unsigned int cpu, struct task_struct *idle)
55{ 55{
56 imx_set_cpu_jump(cpu, v7_secondary_startup); 56 imx_set_cpu_jump(cpu, v7_secondary_startup);
57 imx_enable_cpu(cpu, true); 57 imx_enable_cpu(cpu, true);
@@ -62,7 +62,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
62 * Initialise the CPU possible map early - this describes the CPUs 62 * Initialise the CPU possible map early - this describes the CPUs
63 * which may be present or become present in the system. 63 * which may be present or become present in the system.
64 */ 64 */
65void __init smp_init_cpus(void) 65static void __init imx_smp_init_cpus(void)
66{ 66{
67 int i, ncores; 67 int i, ncores;
68 68
@@ -79,7 +79,17 @@ void imx_smp_prepare(void)
79 scu_enable(scu_base); 79 scu_enable(scu_base);
80} 80}
81 81
82void __init platform_smp_prepare_cpus(unsigned int max_cpus) 82static void __init imx_smp_prepare_cpus(unsigned int max_cpus)
83{ 83{
84 imx_smp_prepare(); 84 imx_smp_prepare();
85} 85}
86
87struct smp_operations imx_smp_ops __initdata = {
88 .smp_init_cpus = imx_smp_init_cpus,
89 .smp_prepare_cpus = imx_smp_prepare_cpus,
90 .smp_secondary_init = imx_secondary_init,
91 .smp_boot_secondary = imx_boot_secondary,
92#ifdef CONFIG_HOTPLUG_CPU
93 .cpu_die = imx_cpu_die,
94#endif
95};
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 7128e9710417..e8b51502e32e 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -145,6 +145,8 @@ extern void imx53_smd_common_init(void);
145extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode); 145extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
146extern void imx6q_clock_map_io(void); 146extern void imx6q_clock_map_io(void);
147 147
148extern void imx_cpu_die(unsigned int cpu);
149
148#ifdef CONFIG_PM 150#ifdef CONFIG_PM
149extern void imx6q_pm_init(void); 151extern void imx6q_pm_init(void);
150extern void imx51_pm_init(void); 152extern void imx51_pm_init(void);
@@ -161,4 +163,6 @@ extern int mx51_neon_fixup(void);
161static inline int mx51_neon_fixup(void) { return 0; } 163static inline int mx51_neon_fixup(void) { return 0; }
162#endif 164#endif
163 165
166extern struct smp_operations imx_smp_ops;
167
164#endif 168#endif