diff options
author | Sachin Kamat <sachin.kamat@linaro.org> | 2013-10-08 07:17:41 -0400 |
---|---|---|
committer | Mike Turquette <mturquette@linaro.org> | 2013-12-19 20:47:31 -0500 |
commit | e47e12f973a95634c11fe98330fe3a1df6f844d4 (patch) | |
tree | c68d027c7bfd11524263f79678dca6d2f20bfaf8 | |
parent | 3c9210bd3ada4e249054e8c31656936e073ad30c (diff) |
clk: tegra: Staticize local variables in clk-pll.c
Local variables used only in this file are made static.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
-rw-r--r-- | drivers/clk/tegra/clk-pll.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c index 2dd432266ef6..0d20241e0770 100644 --- a/drivers/clk/tegra/clk-pll.c +++ b/drivers/clk/tegra/clk-pll.c | |||
@@ -1433,7 +1433,7 @@ struct clk *tegra_clk_register_plle(const char *name, const char *parent_name, | |||
1433 | } | 1433 | } |
1434 | 1434 | ||
1435 | #if defined(CONFIG_ARCH_TEGRA_114_SOC) || defined(CONFIG_ARCH_TEGRA_124_SOC) | 1435 | #if defined(CONFIG_ARCH_TEGRA_114_SOC) || defined(CONFIG_ARCH_TEGRA_124_SOC) |
1436 | const struct clk_ops tegra_clk_pllxc_ops = { | 1436 | static const struct clk_ops tegra_clk_pllxc_ops = { |
1437 | .is_enabled = clk_pll_is_enabled, | 1437 | .is_enabled = clk_pll_is_enabled, |
1438 | .enable = clk_pll_iddq_enable, | 1438 | .enable = clk_pll_iddq_enable, |
1439 | .disable = clk_pll_iddq_disable, | 1439 | .disable = clk_pll_iddq_disable, |
@@ -1442,7 +1442,7 @@ const struct clk_ops tegra_clk_pllxc_ops = { | |||
1442 | .set_rate = clk_pllxc_set_rate, | 1442 | .set_rate = clk_pllxc_set_rate, |
1443 | }; | 1443 | }; |
1444 | 1444 | ||
1445 | const struct clk_ops tegra_clk_pllm_ops = { | 1445 | static const struct clk_ops tegra_clk_pllm_ops = { |
1446 | .is_enabled = clk_pll_is_enabled, | 1446 | .is_enabled = clk_pll_is_enabled, |
1447 | .enable = clk_pll_iddq_enable, | 1447 | .enable = clk_pll_iddq_enable, |
1448 | .disable = clk_pll_iddq_disable, | 1448 | .disable = clk_pll_iddq_disable, |
@@ -1451,7 +1451,7 @@ const struct clk_ops tegra_clk_pllm_ops = { | |||
1451 | .set_rate = clk_pllm_set_rate, | 1451 | .set_rate = clk_pllm_set_rate, |
1452 | }; | 1452 | }; |
1453 | 1453 | ||
1454 | const struct clk_ops tegra_clk_pllc_ops = { | 1454 | static const struct clk_ops tegra_clk_pllc_ops = { |
1455 | .is_enabled = clk_pll_is_enabled, | 1455 | .is_enabled = clk_pll_is_enabled, |
1456 | .enable = clk_pllc_enable, | 1456 | .enable = clk_pllc_enable, |
1457 | .disable = clk_pllc_disable, | 1457 | .disable = clk_pllc_disable, |
@@ -1460,7 +1460,7 @@ const struct clk_ops tegra_clk_pllc_ops = { | |||
1460 | .set_rate = clk_pllc_set_rate, | 1460 | .set_rate = clk_pllc_set_rate, |
1461 | }; | 1461 | }; |
1462 | 1462 | ||
1463 | const struct clk_ops tegra_clk_pllre_ops = { | 1463 | static const struct clk_ops tegra_clk_pllre_ops = { |
1464 | .is_enabled = clk_pll_is_enabled, | 1464 | .is_enabled = clk_pll_is_enabled, |
1465 | .enable = clk_pll_iddq_enable, | 1465 | .enable = clk_pll_iddq_enable, |
1466 | .disable = clk_pll_iddq_disable, | 1466 | .disable = clk_pll_iddq_disable, |
@@ -1469,7 +1469,7 @@ const struct clk_ops tegra_clk_pllre_ops = { | |||
1469 | .set_rate = clk_pllre_set_rate, | 1469 | .set_rate = clk_pllre_set_rate, |
1470 | }; | 1470 | }; |
1471 | 1471 | ||
1472 | const struct clk_ops tegra_clk_plle_tegra114_ops = { | 1472 | static const struct clk_ops tegra_clk_plle_tegra114_ops = { |
1473 | .is_enabled = clk_pll_is_enabled, | 1473 | .is_enabled = clk_pll_is_enabled, |
1474 | .enable = clk_plle_tegra114_enable, | 1474 | .enable = clk_plle_tegra114_enable, |
1475 | .disable = clk_plle_tegra114_disable, | 1475 | .disable = clk_plle_tegra114_disable, |
@@ -1731,7 +1731,7 @@ struct clk *tegra_clk_register_plle_tegra114(const char *name, | |||
1731 | #endif | 1731 | #endif |
1732 | 1732 | ||
1733 | #ifdef CONFIG_ARCH_TEGRA_124_SOC | 1733 | #ifdef CONFIG_ARCH_TEGRA_124_SOC |
1734 | const struct clk_ops tegra_clk_pllss_ops = { | 1734 | static const struct clk_ops tegra_clk_pllss_ops = { |
1735 | .is_enabled = clk_pll_is_enabled, | 1735 | .is_enabled = clk_pll_is_enabled, |
1736 | .enable = clk_pll_iddq_enable, | 1736 | .enable = clk_pll_iddq_enable, |
1737 | .disable = clk_pll_iddq_disable, | 1737 | .disable = clk_pll_iddq_disable, |