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authorJavier Martin <javier.martin@vista-silicon.com>2012-03-22 09:54:08 -0400
committerVinod Koul <vinod.koul@linux.intel.com>2012-03-26 02:01:31 -0400
commite4756b5e068d866239b6880a7030c9d31400b254 (patch)
treefd9d157f437252aed259712a6a6e9f4ab3d40b31
parent833bc03bf14ef6d3f82d86845c29aa1f7e2037e3 (diff)
dmaengine: imx-dma: remove 'in_use' field of 'internal' structure.
It makes no sense keeping an 'in_use' flag when the multiple descriptor mechanism already prevents a new DMA transfer to be issued when another one is in course. Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
-rw-r--r--drivers/dma/imx-dma.c9
1 files changed, 0 insertions, 9 deletions
diff --git a/drivers/dma/imx-dma.c b/drivers/dma/imx-dma.c
index 82d4099bd8f4..d7309e44c0df 100644
--- a/drivers/dma/imx-dma.c
+++ b/drivers/dma/imx-dma.c
@@ -131,8 +131,6 @@ enum imxdma_prep_type {
131struct imxdma_channel_internal { 131struct imxdma_channel_internal {
132 unsigned int resbytes; 132 unsigned int resbytes;
133 133
134 int in_use;
135
136 struct timer_list watchdog; 134 struct timer_list watchdog;
137 135
138 int hw_chaining; 136 int hw_chaining;
@@ -266,9 +264,6 @@ static void imxdma_enable_hw(struct imxdma_desc *d)
266 264
267 pr_debug("imxdma%d: imx_dma_enable\n", channel); 265 pr_debug("imxdma%d: imx_dma_enable\n", channel);
268 266
269 if (imxdmac->internal.in_use)
270 return;
271
272 local_irq_save(flags); 267 local_irq_save(flags);
273 268
274 imx_dmav1_writel(1 << channel, DMA_DISR); 269 imx_dmav1_writel(1 << channel, DMA_DISR);
@@ -287,7 +282,6 @@ static void imxdma_enable_hw(struct imxdma_desc *d)
287 DMA_CCR(channel)); 282 DMA_CCR(channel));
288 } 283 }
289 } 284 }
290 imxdmac->internal.in_use = 1;
291 285
292 local_irq_restore(flags); 286 local_irq_restore(flags);
293} 287}
@@ -307,7 +301,6 @@ static void imxdma_disable_hw(struct imxdma_channel *imxdmac)
307 imx_dmav1_writel(imx_dmav1_readl(DMA_CCR(channel)) & ~CCR_CEN, 301 imx_dmav1_writel(imx_dmav1_readl(DMA_CCR(channel)) & ~CCR_CEN,
308 DMA_CCR(channel)); 302 DMA_CCR(channel));
309 imx_dmav1_writel(1 << channel, DMA_DISR); 303 imx_dmav1_writel(1 << channel, DMA_DISR);
310 imxdmac->internal.in_use = 0;
311 local_irq_restore(flags); 304 local_irq_restore(flags);
312} 305}
313 306
@@ -317,7 +310,6 @@ static void imxdma_watchdog(unsigned long data)
317 int channel = imxdmac->channel; 310 int channel = imxdmac->channel;
318 311
319 imx_dmav1_writel(0, DMA_CCR(channel)); 312 imx_dmav1_writel(0, DMA_CCR(channel));
320 imxdmac->internal.in_use = 0;
321 313
322 /* Tasklet watchdog error handler */ 314 /* Tasklet watchdog error handler */
323 tasklet_schedule(&imxdmac->dma_tasklet); 315 tasklet_schedule(&imxdmac->dma_tasklet);
@@ -436,7 +428,6 @@ static void dma_irq_handle_channel(struct imxdma_channel *imxdmac)
436 428
437out: 429out:
438 imx_dmav1_writel(0, DMA_CCR(chno)); 430 imx_dmav1_writel(0, DMA_CCR(chno));
439 imxdma->in_use = 0;
440 /* Tasklet irq */ 431 /* Tasklet irq */
441 tasklet_schedule(&imxdmac->dma_tasklet); 432 tasklet_schedule(&imxdmac->dma_tasklet);
442} 433}