aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2014-11-10 09:10:32 -0500
committerThierry Reding <treding@nvidia.com>2014-11-10 09:59:01 -0500
commite43b21cbbd816aebbb275093f22a974f7b0cb345 (patch)
treeb5ff8b657bea36337a5c49aded1217de61c29b91
parent2cd0f55961d87da617adae717737d13cb9518e7f (diff)
ARM: ixp4xx: Fix build with IXP4XX_INDIRECT_PCI
Provide *_relaxed() accessors and make sure to pass the volatile void __iomem * to accessors rather than the value cast to a u32. This allows ixp4xx to build with IXP4XX_INDIRECT_PCI enabled. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
-rw-r--r--arch/arm/mach-ixp4xx/common.c2
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/io.h16
2 files changed, 13 insertions, 5 deletions
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index fc4b7b24265e..8537d4c41e34 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -652,7 +652,7 @@ static void __iomem *ixp4xx_ioremap_caller(phys_addr_t addr, size_t size,
652 return (void __iomem *)addr; 652 return (void __iomem *)addr;
653} 653}
654 654
655static void ixp4xx_iounmap(void __iomem *addr) 655static void ixp4xx_iounmap(volatile void __iomem *addr)
656{ 656{
657 if (!is_pci_memory((__force u32)addr)) 657 if (!is_pci_memory((__force u32)addr))
658 __iounmap(addr); 658 __iounmap(addr);
diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h
index 559c69a47731..0f737fcebcc1 100644
--- a/arch/arm/mach-ixp4xx/include/mach/io.h
+++ b/arch/arm/mach-ixp4xx/include/mach/io.h
@@ -58,6 +58,10 @@ static inline int is_pci_memory(u32 addr)
58#define writew(v, p) __indirect_writew(v, p) 58#define writew(v, p) __indirect_writew(v, p)
59#define writel(v, p) __indirect_writel(v, p) 59#define writel(v, p) __indirect_writel(v, p)
60 60
61#define writeb_relaxed(v, p) __indirect_writeb(v, p)
62#define writew_relaxed(v, p) __indirect_writew(v, p)
63#define writel_relaxed(v, p) __indirect_writel(v, p)
64
61#define writesb(p, v, l) __indirect_writesb(p, v, l) 65#define writesb(p, v, l) __indirect_writesb(p, v, l)
62#define writesw(p, v, l) __indirect_writesw(p, v, l) 66#define writesw(p, v, l) __indirect_writesw(p, v, l)
63#define writesl(p, v, l) __indirect_writesl(p, v, l) 67#define writesl(p, v, l) __indirect_writesl(p, v, l)
@@ -66,6 +70,10 @@ static inline int is_pci_memory(u32 addr)
66#define readw(p) __indirect_readw(p) 70#define readw(p) __indirect_readw(p)
67#define readl(p) __indirect_readl(p) 71#define readl(p) __indirect_readl(p)
68 72
73#define readb_relaxed(p) __indirect_readb(p)
74#define readw_relaxed(p) __indirect_readw(p)
75#define readl_relaxed(p) __indirect_readl(p)
76
69#define readsb(p, v, l) __indirect_readsb(p, v, l) 77#define readsb(p, v, l) __indirect_readsb(p, v, l)
70#define readsw(p, v, l) __indirect_readsw(p, v, l) 78#define readsw(p, v, l) __indirect_readsw(p, v, l)
71#define readsl(p, v, l) __indirect_readsl(p, v, l) 79#define readsl(p, v, l) __indirect_readsl(p, v, l)
@@ -76,7 +84,7 @@ static inline void __indirect_writeb(u8 value, volatile void __iomem *p)
76 u32 n, byte_enables, data; 84 u32 n, byte_enables, data;
77 85
78 if (!is_pci_memory(addr)) { 86 if (!is_pci_memory(addr)) {
79 __raw_writeb(value, addr); 87 __raw_writeb(value, p);
80 return; 88 return;
81 } 89 }
82 90
@@ -99,7 +107,7 @@ static inline void __indirect_writew(u16 value, volatile void __iomem *p)
99 u32 n, byte_enables, data; 107 u32 n, byte_enables, data;
100 108
101 if (!is_pci_memory(addr)) { 109 if (!is_pci_memory(addr)) {
102 __raw_writew(value, addr); 110 __raw_writew(value, p);
103 return; 111 return;
104 } 112 }
105 113
@@ -141,7 +149,7 @@ static inline unsigned char __indirect_readb(const volatile void __iomem *p)
141 u32 n, byte_enables, data; 149 u32 n, byte_enables, data;
142 150
143 if (!is_pci_memory(addr)) 151 if (!is_pci_memory(addr))
144 return __raw_readb(addr); 152 return __raw_readb(p);
145 153
146 n = addr % 4; 154 n = addr % 4;
147 byte_enables = (0xf & ~BIT(n)) << IXP4XX_PCI_NP_CBE_BESL; 155 byte_enables = (0xf & ~BIT(n)) << IXP4XX_PCI_NP_CBE_BESL;
@@ -164,7 +172,7 @@ static inline unsigned short __indirect_readw(const volatile void __iomem *p)
164 u32 n, byte_enables, data; 172 u32 n, byte_enables, data;
165 173
166 if (!is_pci_memory(addr)) 174 if (!is_pci_memory(addr))
167 return __raw_readw(addr); 175 return __raw_readw(p);
168 176
169 n = addr % 4; 177 n = addr % 4;
170 byte_enables = (0xf & ~(BIT(n) | BIT(n+1))) << IXP4XX_PCI_NP_CBE_BESL; 178 byte_enables = (0xf & ~(BIT(n) | BIT(n+1))) << IXP4XX_PCI_NP_CBE_BESL;