diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2011-03-25 16:04:38 -0400 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2011-03-29 08:48:05 -0400 |
commit | e3d781227808d12a5d5228028bf01de3e3824f69 (patch) | |
tree | df847cdcb2c5b582301d52867b2a7d5d29de6fc4 | |
parent | f5e5bf088bd3d30990efb7429aaf9f1e5134ffd6 (diff) |
ia64: Use generic show_interrupts()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r-- | arch/ia64/Kconfig | 1 | ||||
-rw-r--r-- | arch/ia64/kernel/irq.c | 42 |
2 files changed, 3 insertions, 40 deletions
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig index fcf3b437a2d9..c4ea0925cdbd 100644 --- a/arch/ia64/Kconfig +++ b/arch/ia64/Kconfig | |||
@@ -26,6 +26,7 @@ config IA64 | |||
26 | select GENERIC_IRQ_PROBE | 26 | select GENERIC_IRQ_PROBE |
27 | select GENERIC_PENDING_IRQ if SMP | 27 | select GENERIC_PENDING_IRQ if SMP |
28 | select IRQ_PER_CPU | 28 | select IRQ_PER_CPU |
29 | select GENERIC_IRQ_SHOW | ||
29 | default y | 30 | default y |
30 | help | 31 | help |
31 | The Itanium Processor Family is Intel's 64-bit successor to | 32 | The Itanium Processor Family is Intel's 64-bit successor to |
diff --git a/arch/ia64/kernel/irq.c b/arch/ia64/kernel/irq.c index ba2760d99e9f..ad69606613eb 100644 --- a/arch/ia64/kernel/irq.c +++ b/arch/ia64/kernel/irq.c | |||
@@ -53,47 +53,9 @@ atomic_t irq_err_count; | |||
53 | /* | 53 | /* |
54 | * /proc/interrupts printing: | 54 | * /proc/interrupts printing: |
55 | */ | 55 | */ |
56 | 56 | int arch_show_interrupts(struct seq_file *p, int prec) | |
57 | int show_interrupts(struct seq_file *p, void *v) | ||
58 | { | 57 | { |
59 | int i = *(loff_t *) v, j; | 58 | seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count)); |
60 | struct irqaction * action; | ||
61 | unsigned long flags; | ||
62 | |||
63 | if (i == 0) { | ||
64 | char cpuname[16]; | ||
65 | seq_printf(p, " "); | ||
66 | for_each_online_cpu(j) { | ||
67 | snprintf(cpuname, 10, "CPU%d", j); | ||
68 | seq_printf(p, "%10s ", cpuname); | ||
69 | } | ||
70 | seq_putc(p, '\n'); | ||
71 | } | ||
72 | |||
73 | if (i < NR_IRQS) { | ||
74 | raw_spin_lock_irqsave(&irq_desc[i].lock, flags); | ||
75 | action = irq_desc[i].action; | ||
76 | if (!action) | ||
77 | goto skip; | ||
78 | seq_printf(p, "%3d: ",i); | ||
79 | #ifndef CONFIG_SMP | ||
80 | seq_printf(p, "%10u ", kstat_irqs(i)); | ||
81 | #else | ||
82 | for_each_online_cpu(j) { | ||
83 | seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); | ||
84 | } | ||
85 | #endif | ||
86 | seq_printf(p, " %14s", irq_desc[i].chip->name); | ||
87 | seq_printf(p, " %s", action->name); | ||
88 | |||
89 | for (action=action->next; action; action = action->next) | ||
90 | seq_printf(p, ", %s", action->name); | ||
91 | |||
92 | seq_putc(p, '\n'); | ||
93 | skip: | ||
94 | raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags); | ||
95 | } else if (i == NR_IRQS) | ||
96 | seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count)); | ||
97 | return 0; | 59 | return 0; |
98 | } | 60 | } |
99 | 61 | ||