diff options
author | Jinyoung Jeon <jy0.jeon@samsung.com> | 2012-12-22 03:49:28 -0500 |
---|---|---|
committer | Inki Dae <inki.dae@samsung.com> | 2013-01-04 01:54:33 -0500 |
commit | e39d5ce13201b18a3ae458c023fc7b4cb33263e8 (patch) | |
tree | ef6c98ace1077916411c408c6f2e65101040bda9 | |
parent | b5c0b5526a97ff5d9e72d1c5d460ca20257987ae (diff) |
drm/exynos: fix incorrect interrupt induced by m2m operation.
This patch fixes incorrect interrupt induced by m2m operation.
the m2m operation calls s/w reset every frame but there is the case that
the interrupt to m2m operation occures after s/w reset sometimes.
So this patch makes dma and capture operations stop at s/w reset
to avoid incorrect interrupt.
Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_drm_fimc.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.c b/drivers/gpu/drm/exynos/exynos_drm_fimc.c index a99ceefcc286..9f52b7faa4b3 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fimc.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fimc.c | |||
@@ -169,10 +169,23 @@ static void fimc_sw_reset(struct fimc_context *ctx) | |||
169 | 169 | ||
170 | DRM_DEBUG_KMS("%s\n", __func__); | 170 | DRM_DEBUG_KMS("%s\n", __func__); |
171 | 171 | ||
172 | /* stop dma operation */ | ||
173 | cfg = fimc_read(EXYNOS_CISTATUS); | ||
174 | if (EXYNOS_CISTATUS_GET_ENVID_STATUS(cfg)) { | ||
175 | cfg = fimc_read(EXYNOS_MSCTRL); | ||
176 | cfg &= ~EXYNOS_MSCTRL_ENVID; | ||
177 | fimc_write(cfg, EXYNOS_MSCTRL); | ||
178 | } | ||
179 | |||
172 | cfg = fimc_read(EXYNOS_CISRCFMT); | 180 | cfg = fimc_read(EXYNOS_CISRCFMT); |
173 | cfg |= EXYNOS_CISRCFMT_ITU601_8BIT; | 181 | cfg |= EXYNOS_CISRCFMT_ITU601_8BIT; |
174 | fimc_write(cfg, EXYNOS_CISRCFMT); | 182 | fimc_write(cfg, EXYNOS_CISRCFMT); |
175 | 183 | ||
184 | /* disable image capture */ | ||
185 | cfg = fimc_read(EXYNOS_CIIMGCPT); | ||
186 | cfg &= ~(EXYNOS_CIIMGCPT_IMGCPTEN_SC | EXYNOS_CIIMGCPT_IMGCPTEN); | ||
187 | fimc_write(cfg, EXYNOS_CIIMGCPT); | ||
188 | |||
176 | /* s/w reset */ | 189 | /* s/w reset */ |
177 | cfg = fimc_read(EXYNOS_CIGCTRL); | 190 | cfg = fimc_read(EXYNOS_CIGCTRL); |
178 | cfg |= (EXYNOS_CIGCTRL_SWRST); | 191 | cfg |= (EXYNOS_CIGCTRL_SWRST); |