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authorJoerg Albert <jal2@gmx.de>2009-08-04 19:52:07 -0400
committerJohn W. Linville <linville@tuxdriver.com>2009-08-14 09:12:39 -0400
commite30eb4ab45211c2f27b6bb9b29124ac431e01ce9 (patch)
treebc20d4f62a07d7b594bfb356256cbdfd19213238
parentc458bc50e31631f7e9333ea6f1832fc54d4e2c1e (diff)
ath5k: fix missing output in monitor mode after ifconfig up
Let ath5k_chan_set() always call ath5k_reset(). This fixes the bug that we don't get any packets in monitor mode after: ifconfig wlan0 down iwconfig wlan0 mode monitor channel 1 ifconfig wlan0 up but they arrive after iwconfig wlan0 channel 2 Signed-off-by: Joerg Albert <jal2@gmx.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r--drivers/net/wireless/ath/ath5k/base.c35
1 files changed, 15 insertions, 20 deletions
diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c
index 3a1c156d275f..5d5028538ac2 100644
--- a/drivers/net/wireless/ath/ath5k/base.c
+++ b/drivers/net/wireless/ath/ath5k/base.c
@@ -1071,10 +1071,9 @@ ath5k_setup_bands(struct ieee80211_hw *hw)
1071} 1071}
1072 1072
1073/* 1073/*
1074 * Set/change channels. If the channel is really being changed, 1074 * Set/change channels. We always reset the chip.
1075 * it's done by reseting the chip. To accomplish this we must 1075 * To accomplish this we must first cleanup any pending DMA,
1076 * first cleanup any pending DMA, then restart stuff after a la 1076 * then restart stuff after a la ath5k_init.
1077 * ath5k_init.
1078 * 1077 *
1079 * Called with sc->lock. 1078 * Called with sc->lock.
1080 */ 1079 */
@@ -1084,19 +1083,13 @@ ath5k_chan_set(struct ath5k_softc *sc, struct ieee80211_channel *chan)
1084 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "(%u MHz) -> (%u MHz)\n", 1083 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "(%u MHz) -> (%u MHz)\n",
1085 sc->curchan->center_freq, chan->center_freq); 1084 sc->curchan->center_freq, chan->center_freq);
1086 1085
1087 if (chan->center_freq != sc->curchan->center_freq || 1086 /*
1088 chan->hw_value != sc->curchan->hw_value) { 1087 * To switch channels clear any pending DMA operations;
1089 1088 * wait long enough for the RX fifo to drain, reset the
1090 /* 1089 * hardware at the new frequency, and then re-enable
1091 * To switch channels clear any pending DMA operations; 1090 * the relevant bits of the h/w.
1092 * wait long enough for the RX fifo to drain, reset the 1091 */
1093 * hardware at the new frequency, and then re-enable 1092 return ath5k_reset(sc, chan);
1094 * the relevant bits of the h/w.
1095 */
1096 return ath5k_reset(sc, chan);
1097 }
1098
1099 return 0;
1100} 1093}
1101 1094
1102static void 1095static void
@@ -2811,9 +2804,11 @@ ath5k_config(struct ieee80211_hw *hw, u32 changed)
2811 2804
2812 mutex_lock(&sc->lock); 2805 mutex_lock(&sc->lock);
2813 2806
2814 ret = ath5k_chan_set(sc, conf->channel); 2807 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
2815 if (ret < 0) 2808 ret = ath5k_chan_set(sc, conf->channel);
2816 goto unlock; 2809 if (ret < 0)
2810 goto unlock;
2811 }
2817 2812
2818 if ((changed & IEEE80211_CONF_CHANGE_POWER) && 2813 if ((changed & IEEE80211_CONF_CHANGE_POWER) &&
2819 (sc->power_level != conf->power_level)) { 2814 (sc->power_level != conf->power_level)) {