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authorNishanth Menon <nm@ti.com>2014-05-23 01:04:02 -0400
committerNishanth Menon <nm@ti.com>2014-09-09 09:33:03 -0400
commite2265abe7a18e5e6880d0cd35e2db08bcd237366 (patch)
tree8578bf478a7807966ad4b0023e3561c7c1df5beb
parentd8c5bab676774b9c260c7990b84a06a09310fbec (diff)
ARM: dts: OMAP5 / DRA7: switch over to interrupts-extended property for UART
We've had deeper idle states working on omaps for few years now, but only in the legacy mode. When booted with device tree, the wake-up events did not have a chance to work until commit 3e6cee1786a1 ("pinctrl: single: Add support for wake-up interrupts") that recently got merged. In addition to that we also needed commit 79d9701559a9 ("of/irq: create interrupts-extended property") that's now also merged. Note that there's no longer need to specify the wake-up bit in the pinctrl settings, the request_irq on the wake-up pin takes care of that. Signed-off-by: Nishanth Menon <nm@ti.com>
-rw-r--r--arch/arm/boot/dts/dra7.dtsi20
-rw-r--r--arch/arm/boot/dts/omap5.dtsi12
2 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index f8654a8b6aa2..4e50deaa0fb6 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -330,7 +330,7 @@
330 uart1: serial@4806a000 { 330 uart1: serial@4806a000 {
331 compatible = "ti,omap4-uart"; 331 compatible = "ti,omap4-uart";
332 reg = <0x4806a000 0x100>; 332 reg = <0x4806a000 0x100>;
333 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 333 interrupts-extended = <&gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
334 ti,hwmods = "uart1"; 334 ti,hwmods = "uart1";
335 clock-frequency = <48000000>; 335 clock-frequency = <48000000>;
336 status = "disabled"; 336 status = "disabled";
@@ -339,7 +339,7 @@
339 uart2: serial@4806c000 { 339 uart2: serial@4806c000 {
340 compatible = "ti,omap4-uart"; 340 compatible = "ti,omap4-uart";
341 reg = <0x4806c000 0x100>; 341 reg = <0x4806c000 0x100>;
342 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 342 interrupts-extended = <&gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
343 ti,hwmods = "uart2"; 343 ti,hwmods = "uart2";
344 clock-frequency = <48000000>; 344 clock-frequency = <48000000>;
345 status = "disabled"; 345 status = "disabled";
@@ -348,7 +348,7 @@
348 uart3: serial@48020000 { 348 uart3: serial@48020000 {
349 compatible = "ti,omap4-uart"; 349 compatible = "ti,omap4-uart";
350 reg = <0x48020000 0x100>; 350 reg = <0x48020000 0x100>;
351 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 351 interrupts-extended = <&gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
352 ti,hwmods = "uart3"; 352 ti,hwmods = "uart3";
353 clock-frequency = <48000000>; 353 clock-frequency = <48000000>;
354 status = "disabled"; 354 status = "disabled";
@@ -357,7 +357,7 @@
357 uart4: serial@4806e000 { 357 uart4: serial@4806e000 {
358 compatible = "ti,omap4-uart"; 358 compatible = "ti,omap4-uart";
359 reg = <0x4806e000 0x100>; 359 reg = <0x4806e000 0x100>;
360 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 360 interrupts-extended = <&gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
361 ti,hwmods = "uart4"; 361 ti,hwmods = "uart4";
362 clock-frequency = <48000000>; 362 clock-frequency = <48000000>;
363 status = "disabled"; 363 status = "disabled";
@@ -366,7 +366,7 @@
366 uart5: serial@48066000 { 366 uart5: serial@48066000 {
367 compatible = "ti,omap4-uart"; 367 compatible = "ti,omap4-uart";
368 reg = <0x48066000 0x100>; 368 reg = <0x48066000 0x100>;
369 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 369 interrupts-extended = <&gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
370 ti,hwmods = "uart5"; 370 ti,hwmods = "uart5";
371 clock-frequency = <48000000>; 371 clock-frequency = <48000000>;
372 status = "disabled"; 372 status = "disabled";
@@ -375,7 +375,7 @@
375 uart6: serial@48068000 { 375 uart6: serial@48068000 {
376 compatible = "ti,omap4-uart"; 376 compatible = "ti,omap4-uart";
377 reg = <0x48068000 0x100>; 377 reg = <0x48068000 0x100>;
378 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 378 interrupts-extended = <&gic GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
379 ti,hwmods = "uart6"; 379 ti,hwmods = "uart6";
380 clock-frequency = <48000000>; 380 clock-frequency = <48000000>;
381 status = "disabled"; 381 status = "disabled";
@@ -384,7 +384,7 @@
384 uart7: serial@48420000 { 384 uart7: serial@48420000 {
385 compatible = "ti,omap4-uart"; 385 compatible = "ti,omap4-uart";
386 reg = <0x48420000 0x100>; 386 reg = <0x48420000 0x100>;
387 interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>; 387 interrupts-extended = <&gic GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
388 ti,hwmods = "uart7"; 388 ti,hwmods = "uart7";
389 clock-frequency = <48000000>; 389 clock-frequency = <48000000>;
390 status = "disabled"; 390 status = "disabled";
@@ -393,7 +393,7 @@
393 uart8: serial@48422000 { 393 uart8: serial@48422000 {
394 compatible = "ti,omap4-uart"; 394 compatible = "ti,omap4-uart";
395 reg = <0x48422000 0x100>; 395 reg = <0x48422000 0x100>;
396 interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>; 396 interrupts-extended = <&gic GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
397 ti,hwmods = "uart8"; 397 ti,hwmods = "uart8";
398 clock-frequency = <48000000>; 398 clock-frequency = <48000000>;
399 status = "disabled"; 399 status = "disabled";
@@ -402,7 +402,7 @@
402 uart9: serial@48424000 { 402 uart9: serial@48424000 {
403 compatible = "ti,omap4-uart"; 403 compatible = "ti,omap4-uart";
404 reg = <0x48424000 0x100>; 404 reg = <0x48424000 0x100>;
405 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>; 405 interrupts-extended = <&gic GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
406 ti,hwmods = "uart9"; 406 ti,hwmods = "uart9";
407 clock-frequency = <48000000>; 407 clock-frequency = <48000000>;
408 status = "disabled"; 408 status = "disabled";
@@ -411,7 +411,7 @@
411 uart10: serial@4ae2b000 { 411 uart10: serial@4ae2b000 {
412 compatible = "ti,omap4-uart"; 412 compatible = "ti,omap4-uart";
413 reg = <0x4ae2b000 0x100>; 413 reg = <0x4ae2b000 0x100>;
414 interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; 414 interrupts-extended = <&gic GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
415 ti,hwmods = "uart10"; 415 ti,hwmods = "uart10";
416 clock-frequency = <48000000>; 416 clock-frequency = <48000000>;
417 status = "disabled"; 417 status = "disabled";
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index ea08ad874f82..b840db0d16d1 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -451,7 +451,7 @@
451 uart1: serial@4806a000 { 451 uart1: serial@4806a000 {
452 compatible = "ti,omap4-uart"; 452 compatible = "ti,omap4-uart";
453 reg = <0x4806a000 0x100>; 453 reg = <0x4806a000 0x100>;
454 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 454 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
455 ti,hwmods = "uart1"; 455 ti,hwmods = "uart1";
456 clock-frequency = <48000000>; 456 clock-frequency = <48000000>;
457 }; 457 };
@@ -459,7 +459,7 @@
459 uart2: serial@4806c000 { 459 uart2: serial@4806c000 {
460 compatible = "ti,omap4-uart"; 460 compatible = "ti,omap4-uart";
461 reg = <0x4806c000 0x100>; 461 reg = <0x4806c000 0x100>;
462 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 462 interrupts-extended = <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
463 ti,hwmods = "uart2"; 463 ti,hwmods = "uart2";
464 clock-frequency = <48000000>; 464 clock-frequency = <48000000>;
465 }; 465 };
@@ -467,7 +467,7 @@
467 uart3: serial@48020000 { 467 uart3: serial@48020000 {
468 compatible = "ti,omap4-uart"; 468 compatible = "ti,omap4-uart";
469 reg = <0x48020000 0x100>; 469 reg = <0x48020000 0x100>;
470 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 470 interrupts-extended = <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
471 ti,hwmods = "uart3"; 471 ti,hwmods = "uart3";
472 clock-frequency = <48000000>; 472 clock-frequency = <48000000>;
473 }; 473 };
@@ -475,7 +475,7 @@
475 uart4: serial@4806e000 { 475 uart4: serial@4806e000 {
476 compatible = "ti,omap4-uart"; 476 compatible = "ti,omap4-uart";
477 reg = <0x4806e000 0x100>; 477 reg = <0x4806e000 0x100>;
478 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 478 interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
479 ti,hwmods = "uart4"; 479 ti,hwmods = "uart4";
480 clock-frequency = <48000000>; 480 clock-frequency = <48000000>;
481 }; 481 };
@@ -483,7 +483,7 @@
483 uart5: serial@48066000 { 483 uart5: serial@48066000 {
484 compatible = "ti,omap4-uart"; 484 compatible = "ti,omap4-uart";
485 reg = <0x48066000 0x100>; 485 reg = <0x48066000 0x100>;
486 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 486 interrupts-extended = <&gic GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
487 ti,hwmods = "uart5"; 487 ti,hwmods = "uart5";
488 clock-frequency = <48000000>; 488 clock-frequency = <48000000>;
489 }; 489 };
@@ -491,7 +491,7 @@
491 uart6: serial@48068000 { 491 uart6: serial@48068000 {
492 compatible = "ti,omap4-uart"; 492 compatible = "ti,omap4-uart";
493 reg = <0x48068000 0x100>; 493 reg = <0x48068000 0x100>;
494 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 494 interrupts-extended = <&gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
495 ti,hwmods = "uart6"; 495 ti,hwmods = "uart6";
496 clock-frequency = <48000000>; 496 clock-frequency = <48000000>;
497 }; 497 };