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authorMika Westerberg <mika.westerberg@linux.intel.com>2014-07-25 02:54:47 -0400
committerLinus Walleij <linus.walleij@linaro.org>2014-07-28 06:21:00 -0400
commite1ee5c578fb1fa24b7ccaf1a11237a2bd70b6f9a (patch)
tree26c058afba930d2333a2dc7711d66622ca550ad6
parent343f132752bede1dc3a740ba469b665ffb111500 (diff)
pinctrl: baytrail: Convert to use gpiolib irqchip
Instead of open-coding irqchip handling in the driver we can take advantage of the new irqchip helpers provided by the gpiolib core. While doing this we also make sure that we call gpiochip_irqchip_add() after the gpiochip itself is registered as required. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--drivers/pinctrl/Kconfig2
-rw-r--r--drivers/pinctrl/pinctrl-baytrail.c87
2 files changed, 20 insertions, 69 deletions
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 3d94e47546ec..4e3231ad03cd 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -70,7 +70,7 @@ config PINCTRL_AT91
70config PINCTRL_BAYTRAIL 70config PINCTRL_BAYTRAIL
71 bool "Intel Baytrail GPIO pin control" 71 bool "Intel Baytrail GPIO pin control"
72 depends on GPIOLIB && ACPI && X86 72 depends on GPIOLIB && ACPI && X86
73 select IRQ_DOMAIN 73 select GPIOLIB_IRQCHIP
74 help 74 help
75 driver for memory mapped GPIO functionality on Intel Baytrail 75 driver for memory mapped GPIO functionality on Intel Baytrail
76 platforms. Supports 3 banks with 102, 28 and 44 gpios. 76 platforms. Supports 3 banks with 102, 28 and 44 gpios.
diff --git a/drivers/pinctrl/pinctrl-baytrail.c b/drivers/pinctrl/pinctrl-baytrail.c
index d8e946992323..9ca59a018743 100644
--- a/drivers/pinctrl/pinctrl-baytrail.c
+++ b/drivers/pinctrl/pinctrl-baytrail.c
@@ -25,9 +25,7 @@
25#include <linux/types.h> 25#include <linux/types.h>
26#include <linux/bitops.h> 26#include <linux/bitops.h>
27#include <linux/interrupt.h> 27#include <linux/interrupt.h>
28#include <linux/irq.h>
29#include <linux/gpio.h> 28#include <linux/gpio.h>
30#include <linux/irqdomain.h>
31#include <linux/acpi.h> 29#include <linux/acpi.h>
32#include <linux/platform_device.h> 30#include <linux/platform_device.h>
33#include <linux/seq_file.h> 31#include <linux/seq_file.h>
@@ -138,7 +136,6 @@ static struct pinctrl_gpio_range byt_ranges[] = {
138 136
139struct byt_gpio { 137struct byt_gpio {
140 struct gpio_chip chip; 138 struct gpio_chip chip;
141 struct irq_domain *domain;
142 struct platform_device *pdev; 139 struct platform_device *pdev;
143 spinlock_t lock; 140 spinlock_t lock;
144 void __iomem *reg_base; 141 void __iomem *reg_base;
@@ -218,7 +215,7 @@ static void byt_gpio_free(struct gpio_chip *chip, unsigned offset)
218 215
219static int byt_irq_type(struct irq_data *d, unsigned type) 216static int byt_irq_type(struct irq_data *d, unsigned type)
220{ 217{
221 struct byt_gpio *vg = irq_data_get_irq_chip_data(d); 218 struct byt_gpio *vg = to_byt_gpio(irq_data_get_irq_chip_data(d));
222 u32 offset = irqd_to_hwirq(d); 219 u32 offset = irqd_to_hwirq(d);
223 u32 value; 220 u32 value;
224 unsigned long flags; 221 unsigned long flags;
@@ -404,16 +401,10 @@ static void byt_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
404 spin_unlock_irqrestore(&vg->lock, flags); 401 spin_unlock_irqrestore(&vg->lock, flags);
405} 402}
406 403
407static int byt_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
408{
409 struct byt_gpio *vg = to_byt_gpio(chip);
410 return irq_create_mapping(vg->domain, offset);
411}
412
413static void byt_gpio_irq_handler(unsigned irq, struct irq_desc *desc) 404static void byt_gpio_irq_handler(unsigned irq, struct irq_desc *desc)
414{ 405{
415 struct irq_data *data = irq_desc_get_irq_data(desc); 406 struct irq_data *data = irq_desc_get_irq_data(desc);
416 struct byt_gpio *vg = irq_data_get_irq_handler_data(data); 407 struct byt_gpio *vg = to_byt_gpio(irq_desc_get_handler_data(desc));
417 struct irq_chip *chip = irq_data_get_irq_chip(data); 408 struct irq_chip *chip = irq_data_get_irq_chip(data);
418 u32 base, pin, mask; 409 u32 base, pin, mask;
419 void __iomem *reg; 410 void __iomem *reg;
@@ -432,7 +423,7 @@ static void byt_gpio_irq_handler(unsigned irq, struct irq_desc *desc)
432 /* Clear before handling so we can't lose an edge */ 423 /* Clear before handling so we can't lose an edge */
433 writel(mask, reg); 424 writel(mask, reg);
434 425
435 virq = irq_find_mapping(vg->domain, base + pin); 426 virq = irq_find_mapping(vg->chip.irqdomain, base + pin);
436 generic_handle_irq(virq); 427 generic_handle_irq(virq);
437 428
438 /* In case bios or user sets triggering incorretly a pin 429 /* In case bios or user sets triggering incorretly a pin
@@ -465,33 +456,11 @@ static void byt_irq_mask(struct irq_data *d)
465{ 456{
466} 457}
467 458
468static int byt_irq_reqres(struct irq_data *d)
469{
470 struct byt_gpio *vg = irq_data_get_irq_chip_data(d);
471
472 if (gpio_lock_as_irq(&vg->chip, irqd_to_hwirq(d))) {
473 dev_err(vg->chip.dev,
474 "unable to lock HW IRQ %lu for IRQ\n",
475 irqd_to_hwirq(d));
476 return -EINVAL;
477 }
478 return 0;
479}
480
481static void byt_irq_relres(struct irq_data *d)
482{
483 struct byt_gpio *vg = irq_data_get_irq_chip_data(d);
484
485 gpio_unlock_as_irq(&vg->chip, irqd_to_hwirq(d));
486}
487
488static struct irq_chip byt_irqchip = { 459static struct irq_chip byt_irqchip = {
489 .name = "BYT-GPIO", 460 .name = "BYT-GPIO",
490 .irq_mask = byt_irq_mask, 461 .irq_mask = byt_irq_mask,
491 .irq_unmask = byt_irq_unmask, 462 .irq_unmask = byt_irq_unmask,
492 .irq_set_type = byt_irq_type, 463 .irq_set_type = byt_irq_type,
493 .irq_request_resources = byt_irq_reqres,
494 .irq_release_resources = byt_irq_relres,
495}; 464};
496 465
497static void byt_gpio_irq_init_hw(struct byt_gpio *vg) 466static void byt_gpio_irq_init_hw(struct byt_gpio *vg)
@@ -512,23 +481,6 @@ static void byt_gpio_irq_init_hw(struct byt_gpio *vg)
512 } 481 }
513} 482}
514 483
515static int byt_gpio_irq_map(struct irq_domain *d, unsigned int virq,
516 irq_hw_number_t hw)
517{
518 struct byt_gpio *vg = d->host_data;
519
520 irq_set_chip_and_handler_name(virq, &byt_irqchip, handle_simple_irq,
521 "demux");
522 irq_set_chip_data(virq, vg);
523 irq_set_irq_type(virq, IRQ_TYPE_NONE);
524
525 return 0;
526}
527
528static const struct irq_domain_ops byt_gpio_irq_ops = {
529 .map = byt_gpio_irq_map,
530};
531
532static int byt_gpio_probe(struct platform_device *pdev) 484static int byt_gpio_probe(struct platform_device *pdev)
533{ 485{
534 struct byt_gpio *vg; 486 struct byt_gpio *vg;
@@ -538,7 +490,6 @@ static int byt_gpio_probe(struct platform_device *pdev)
538 struct acpi_device *acpi_dev; 490 struct acpi_device *acpi_dev;
539 struct pinctrl_gpio_range *range; 491 struct pinctrl_gpio_range *range;
540 acpi_handle handle = ACPI_HANDLE(dev); 492 acpi_handle handle = ACPI_HANDLE(dev);
541 unsigned hwirq;
542 int ret; 493 int ret;
543 494
544 if (acpi_bus_get_device(handle, &acpi_dev)) 495 if (acpi_bus_get_device(handle, &acpi_dev))
@@ -585,27 +536,27 @@ static int byt_gpio_probe(struct platform_device *pdev)
585 gc->can_sleep = false; 536 gc->can_sleep = false;
586 gc->dev = dev; 537 gc->dev = dev;
587 538
539 ret = gpiochip_add(gc);
540 if (ret) {
541 dev_err(&pdev->dev, "failed adding byt-gpio chip\n");
542 return ret;
543 }
544
588 /* set up interrupts */ 545 /* set up interrupts */
589 irq_rc = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 546 irq_rc = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
590 if (irq_rc && irq_rc->start) { 547 if (irq_rc && irq_rc->start) {
591 hwirq = irq_rc->start;
592 gc->to_irq = byt_gpio_to_irq;
593
594 vg->domain = irq_domain_add_linear(NULL, gc->ngpio,
595 &byt_gpio_irq_ops, vg);
596 if (!vg->domain)
597 return -ENXIO;
598
599 byt_gpio_irq_init_hw(vg); 548 byt_gpio_irq_init_hw(vg);
549 ret = gpiochip_irqchip_add(gc, &byt_irqchip, 0,
550 handle_simple_irq, IRQ_TYPE_NONE);
551 if (ret) {
552 dev_err(dev, "failed to add irqchip\n");
553 gpiochip_remove(gc);
554 return ret;
555 }
600 556
601 irq_set_handler_data(hwirq, vg); 557 gpiochip_set_chained_irqchip(gc, &byt_irqchip,
602 irq_set_chained_handler(hwirq, byt_gpio_irq_handler); 558 (unsigned)irq_rc->start,
603 } 559 byt_gpio_irq_handler);
604
605 ret = gpiochip_add(gc);
606 if (ret) {
607 dev_err(&pdev->dev, "failed adding byt-gpio chip\n");
608 return ret;
609 } 560 }
610 561
611 pm_runtime_enable(dev); 562 pm_runtime_enable(dev);