diff options
author | Shobhit Kumar <shobhit.kumar@intel.com> | 2015-03-12 12:31:26 -0400 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2015-03-26 04:09:17 -0400 |
commit | e189ca56d91bbf1d3fe2f88ab6858bf919d42adf (patch) | |
tree | cd907cd4f20aebdbb60d34c7e57167a5b23f10ce | |
parent | a4dd4ddd4b4f2a7f4e08d29f2c2fa46c8f5ce379 (diff) |
gpio/crystalcove: Add additional GPIO for Panel control
Export PANEL_EN/DISABLE (offset 0x52) as additional GPIO. Needed
by display driver to enable the DSI panel on BYT platform where
the Panel EN/Disable control is routed thorugh CRC PMIC
CC: Samuel Ortiz <sameo@linux.intel.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r-- | drivers/gpio/gpio-crystalcove.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/gpio/gpio-crystalcove.c b/drivers/gpio/gpio-crystalcove.c index 3d9e08f7e823..91a7ffe83135 100644 --- a/drivers/gpio/gpio-crystalcove.c +++ b/drivers/gpio/gpio-crystalcove.c | |||
@@ -24,7 +24,7 @@ | |||
24 | #include <linux/mfd/intel_soc_pmic.h> | 24 | #include <linux/mfd/intel_soc_pmic.h> |
25 | 25 | ||
26 | #define CRYSTALCOVE_GPIO_NUM 16 | 26 | #define CRYSTALCOVE_GPIO_NUM 16 |
27 | #define CRYSTALCOVE_VGPIO_NUM 94 | 27 | #define CRYSTALCOVE_VGPIO_NUM 95 |
28 | 28 | ||
29 | #define UPDATE_IRQ_TYPE BIT(0) | 29 | #define UPDATE_IRQ_TYPE BIT(0) |
30 | #define UPDATE_IRQ_MASK BIT(1) | 30 | #define UPDATE_IRQ_MASK BIT(1) |
@@ -39,6 +39,7 @@ | |||
39 | #define GPIO0P0CTLI 0x33 | 39 | #define GPIO0P0CTLI 0x33 |
40 | #define GPIO1P0CTLO 0x3b | 40 | #define GPIO1P0CTLO 0x3b |
41 | #define GPIO1P0CTLI 0x43 | 41 | #define GPIO1P0CTLI 0x43 |
42 | #define GPIOPANELCTL 0x52 | ||
42 | 43 | ||
43 | #define CTLI_INTCNT_DIS (0) | 44 | #define CTLI_INTCNT_DIS (0) |
44 | #define CTLI_INTCNT_NE (1 << 1) | 45 | #define CTLI_INTCNT_NE (1 << 1) |
@@ -93,6 +94,10 @@ static inline int to_reg(int gpio, enum ctrl_register reg_type) | |||
93 | { | 94 | { |
94 | int reg; | 95 | int reg; |
95 | 96 | ||
97 | if (gpio == 94) { | ||
98 | return GPIOPANELCTL; | ||
99 | } | ||
100 | |||
96 | if (reg_type == CTRL_IN) { | 101 | if (reg_type == CTRL_IN) { |
97 | if (gpio < 8) | 102 | if (gpio < 8) |
98 | reg = GPIO0P0CTLI; | 103 | reg = GPIO0P0CTLI; |