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authorMarkus Pargmann <mpa@pengutronix.de>2013-10-29 10:32:19 -0400
committerLinus Walleij <linus.walleij@linaro.org>2013-10-29 11:58:06 -0400
commite16dbf6011137343f51685c1e0c5be36a68fc501 (patch)
treeb910db97601ad3f9263a470bcaa0e7a0fe552cf5
parent30612cd90005d8c4a3c53c7acadcf934a46c13df (diff)
pinctrl: imx27: imx27 pincontrol driver
imx27 pincontrol driver using the imx1 core driver. The DT bindings are similar to other imx pincontrol drivers. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat
-rw-r--r--Documentation/devicetree/bindings/pinctrl/fsl,imx27-pinctrl.txt99
-rw-r--r--drivers/pinctrl/Kconfig8
-rw-r--r--drivers/pinctrl/Makefile1
-rw-r--r--drivers/pinctrl/pinctrl-imx27.c477
4 files changed, 585 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx27-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx27-pinctrl.txt
new file mode 100644
index 000000000000..353eca0efbf8
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx27-pinctrl.txt
@@ -0,0 +1,99 @@
1* Freescale IMX27 IOMUX Controller
2
3Required properties:
4- compatible: "fsl,imx27-iomuxc"
5
6The iomuxc driver node should define subnodes containing of pinctrl configuration subnodes.
7
8Required properties for pin configuration node:
9- fsl,pins: three integers array, represents a group of pins mux and config
10 setting. The format is fsl,pins = <PIN MUX_ID CONFIG>.
11
12 PIN is an integer between 0 and 0xbf. imx27 has 6 ports with 32 configurable
13 configurable pins each. PIN is PORT * 32 + PORT_PIN, PORT_PIN is the pin
14 number on the specific port (between 0 and 31).
15
16 MUX_ID is
17 function + (direction << 2) + (gpio_oconf << 4) + (gpio_iconfa << 8) + (gpio_iconfb << 10)
18
19 function value is used to select the pin function.
20 Possible values:
21 0 - Primary function
22 1 - Alternate function
23 2 - GPIO
24 Registers: GIUS (GPIO In Use), GPR (General Purpose Register)
25
26 direction defines the data direction of the pin.
27 Possible values:
28 0 - Input
29 1 - Output
30 Register: DDIR
31
32 gpio_oconf configures the gpio submodule output signal. This does not
33 have any effect unless GPIO function is selected. A/B/C_IN are output
34 signals of function blocks A,B and C. Specific function blocks are
35 described in the reference manual.
36 Possible values:
37 0 - A_IN
38 1 - B_IN
39 2 - C_IN
40 3 - Data Register
41 Registers: OCR1, OCR2
42
43 gpio_iconfa/b configures the gpio submodule input to functionblocks A and
44 B. GPIO function should be selected if this is configured.
45 Possible values:
46 0 - GPIO_IN
47 1 - Interrupt Status Register
48 2 - Pulldown
49 3 - Pullup
50 Registers ICONFA1, ICONFA2, ICONFB1 and ICONFB2
51
52 CONFIG can be 0 or 1, meaning Pullup disable/enable.
53
54
55
56Example:
57
58iomuxc: iomuxc@10015000 {
59 compatible = "fsl,imx27-iomuxc";
60 reg = <0x10015000 0x600>;
61
62 uart {
63 pinctrl_uart1: uart-1 {
64 fsl,pins = <
65 0x8c 0x004 0x0 /* UART1_TXD__UART1_TXD */
66 0x8d 0x000 0x0 /* UART1_RXD__UART1_RXD */
67 0x8e 0x004 0x0 /* UART1_CTS__UART1_CTS */
68 0x8f 0x000 0x0 /* UART1_RTS__UART1_RTS */
69 >;
70 };
71
72 ...
73 };
74};
75
76
77For convenience there are macros defined in imx27-pinfunc.h which provide PIN
78and MUX_ID. They are structured as MX27_PAD_<Pad name>__<Signal name>. The names
79are defined in the i.MX27 reference manual.
80
81The above example using macros:
82
83iomuxc: iomuxc@10015000 {
84 compatible = "fsl,imx27-iomuxc";
85 reg = <0x10015000 0x600>;
86
87 uart {
88 pinctrl_uart1: uart-1 {
89 fsl,pins = <
90 MX27_PAD_UART1_TXD__UART1_TXD 0x0
91 MX27_PAD_UART1_RXD__UART1_RXD 0x0
92 MX27_PAD_UART1_CTS__UART1_CTS 0x0
93 MX27_PAD_UART1_RTS__UART1_RTS 0x0
94 >;
95 };
96
97 ...
98 };
99};
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index fcc748f68f4a..db1ddcaebf05 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -114,6 +114,14 @@ config PINCTRL_IMX1_CORE
114 select PINMUX 114 select PINMUX
115 select PINCONF 115 select PINCONF
116 116
117config PINCTRL_IMX27
118 bool "IMX27 pinctrl driver"
119 depends on OF
120 depends on SOC_IMX27
121 select PINCTRL_IMX1_CORE
122 help
123 Say Y here to enable the imx27 pinctrl driver
124
117config PINCTRL_IMX35 125config PINCTRL_IMX35
118 bool "IMX35 pinctrl driver" 126 bool "IMX35 pinctrl driver"
119 depends on OF 127 depends on OF
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 8b334e305537..915d19c1cdc6 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_PINCTRL_BCM2835) += pinctrl-bcm2835.o
23obj-$(CONFIG_PINCTRL_BAYTRAIL) += pinctrl-baytrail.o 23obj-$(CONFIG_PINCTRL_BAYTRAIL) += pinctrl-baytrail.o
24obj-$(CONFIG_PINCTRL_IMX) += pinctrl-imx.o 24obj-$(CONFIG_PINCTRL_IMX) += pinctrl-imx.o
25obj-$(CONFIG_PINCTRL_IMX1_CORE) += pinctrl-imx1-core.o 25obj-$(CONFIG_PINCTRL_IMX1_CORE) += pinctrl-imx1-core.o
26obj-$(CONFIG_PINCTRL_IMX27) += pinctrl-imx27.o
26obj-$(CONFIG_PINCTRL_IMX35) += pinctrl-imx35.o 27obj-$(CONFIG_PINCTRL_IMX35) += pinctrl-imx35.o
27obj-$(CONFIG_PINCTRL_IMX51) += pinctrl-imx51.o 28obj-$(CONFIG_PINCTRL_IMX51) += pinctrl-imx51.o
28obj-$(CONFIG_PINCTRL_IMX53) += pinctrl-imx53.o 29obj-$(CONFIG_PINCTRL_IMX53) += pinctrl-imx53.o
diff --git a/drivers/pinctrl/pinctrl-imx27.c b/drivers/pinctrl/pinctrl-imx27.c
new file mode 100644
index 000000000000..417c99205bc2
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-imx27.c
@@ -0,0 +1,477 @@
1/*
2 * imx27 pinctrl driver based on imx pinmux core
3 *
4 * Copyright (C) 2013 Pengutronix
5 *
6 * Author: Markus Pargmann <mpa@pengutronix.de>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/err.h>
15#include <linux/init.h>
16#include <linux/io.h>
17#include <linux/module.h>
18#include <linux/of.h>
19#include <linux/of_device.h>
20#include <linux/pinctrl/pinctrl.h>
21
22#include "pinctrl-imx1.h"
23
24#define PAD_ID(port, pin) (port*32 + pin)
25#define PA 0
26#define PB 1
27#define PC 2
28#define PD 3
29#define PE 4
30#define PF 5
31
32enum imx27_pads {
33 MX27_PAD_USBH2_CLK = PAD_ID(PA, 0),
34 MX27_PAD_USBH2_DIR = PAD_ID(PA, 1),
35 MX27_PAD_USBH2_DATA7 = PAD_ID(PA, 2),
36 MX27_PAD_USBH2_NXT = PAD_ID(PA, 3),
37 MX27_PAD_USBH2_STP = PAD_ID(PA, 4),
38 MX27_PAD_LSCLK = PAD_ID(PA, 5),
39 MX27_PAD_LD0 = PAD_ID(PA, 6),
40 MX27_PAD_LD1 = PAD_ID(PA, 7),
41 MX27_PAD_LD2 = PAD_ID(PA, 8),
42 MX27_PAD_LD3 = PAD_ID(PA, 9),
43 MX27_PAD_LD4 = PAD_ID(PA, 10),
44 MX27_PAD_LD5 = PAD_ID(PA, 11),
45 MX27_PAD_LD6 = PAD_ID(PA, 12),
46 MX27_PAD_LD7 = PAD_ID(PA, 13),
47 MX27_PAD_LD8 = PAD_ID(PA, 14),
48 MX27_PAD_LD9 = PAD_ID(PA, 15),
49 MX27_PAD_LD10 = PAD_ID(PA, 16),
50 MX27_PAD_LD11 = PAD_ID(PA, 17),
51 MX27_PAD_LD12 = PAD_ID(PA, 18),
52 MX27_PAD_LD13 = PAD_ID(PA, 19),
53 MX27_PAD_LD14 = PAD_ID(PA, 20),
54 MX27_PAD_LD15 = PAD_ID(PA, 21),
55 MX27_PAD_LD16 = PAD_ID(PA, 22),
56 MX27_PAD_LD17 = PAD_ID(PA, 23),
57 MX27_PAD_REV = PAD_ID(PA, 24),
58 MX27_PAD_CLS = PAD_ID(PA, 25),
59 MX27_PAD_PS = PAD_ID(PA, 26),
60 MX27_PAD_SPL_SPR = PAD_ID(PA, 27),
61 MX27_PAD_HSYNC = PAD_ID(PA, 28),
62 MX27_PAD_VSYNC = PAD_ID(PA, 29),
63 MX27_PAD_CONTRAST = PAD_ID(PA, 30),
64 MX27_PAD_OE_ACD = PAD_ID(PA, 31),
65
66 MX27_PAD_UNUSED0 = PAD_ID(PB, 0),
67 MX27_PAD_UNUSED1 = PAD_ID(PB, 1),
68 MX27_PAD_UNUSED2 = PAD_ID(PB, 2),
69 MX27_PAD_UNUSED3 = PAD_ID(PB, 3),
70 MX27_PAD_SD2_D0 = PAD_ID(PB, 4),
71 MX27_PAD_SD2_D1 = PAD_ID(PB, 5),
72 MX27_PAD_SD2_D2 = PAD_ID(PB, 6),
73 MX27_PAD_SD2_D3 = PAD_ID(PB, 7),
74 MX27_PAD_SD2_CMD = PAD_ID(PB, 8),
75 MX27_PAD_SD2_CLK = PAD_ID(PB, 9),
76 MX27_PAD_CSI_D0 = PAD_ID(PB, 10),
77 MX27_PAD_CSI_D1 = PAD_ID(PB, 11),
78 MX27_PAD_CSI_D2 = PAD_ID(PB, 12),
79 MX27_PAD_CSI_D3 = PAD_ID(PB, 13),
80 MX27_PAD_CSI_D4 = PAD_ID(PB, 14),
81 MX27_PAD_CSI_MCLK = PAD_ID(PB, 15),
82 MX27_PAD_CSI_PIXCLK = PAD_ID(PB, 16),
83 MX27_PAD_CSI_D5 = PAD_ID(PB, 17),
84 MX27_PAD_CSI_D6 = PAD_ID(PB, 18),
85 MX27_PAD_CSI_D7 = PAD_ID(PB, 19),
86 MX27_PAD_CSI_VSYNC = PAD_ID(PB, 20),
87 MX27_PAD_CSI_HSYNC = PAD_ID(PB, 21),
88 MX27_PAD_USBH1_SUSP = PAD_ID(PB, 22),
89 MX27_PAD_USB_PWR = PAD_ID(PB, 23),
90 MX27_PAD_USB_OC_B = PAD_ID(PB, 24),
91 MX27_PAD_USBH1_RCV = PAD_ID(PB, 25),
92 MX27_PAD_USBH1_FS = PAD_ID(PB, 26),
93 MX27_PAD_USBH1_OE_B = PAD_ID(PB, 27),
94 MX27_PAD_USBH1_TXDM = PAD_ID(PB, 28),
95 MX27_PAD_USBH1_TXDP = PAD_ID(PB, 29),
96 MX27_PAD_USBH1_RXDM = PAD_ID(PB, 30),
97 MX27_PAD_USBH1_RXDP = PAD_ID(PB, 31),
98
99 MX27_PAD_UNUSED4 = PAD_ID(PC, 0),
100 MX27_PAD_UNUSED5 = PAD_ID(PC, 1),
101 MX27_PAD_UNUSED6 = PAD_ID(PC, 2),
102 MX27_PAD_UNUSED7 = PAD_ID(PC, 3),
103 MX27_PAD_UNUSED8 = PAD_ID(PC, 4),
104 MX27_PAD_I2C2_SDA = PAD_ID(PC, 5),
105 MX27_PAD_I2C2_SCL = PAD_ID(PC, 6),
106 MX27_PAD_USBOTG_DATA5 = PAD_ID(PC, 7),
107 MX27_PAD_USBOTG_DATA6 = PAD_ID(PC, 8),
108 MX27_PAD_USBOTG_DATA0 = PAD_ID(PC, 9),
109 MX27_PAD_USBOTG_DATA2 = PAD_ID(PC, 10),
110 MX27_PAD_USBOTG_DATA1 = PAD_ID(PC, 11),
111 MX27_PAD_USBOTG_DATA4 = PAD_ID(PC, 12),
112 MX27_PAD_USBOTG_DATA3 = PAD_ID(PC, 13),
113 MX27_PAD_TOUT = PAD_ID(PC, 14),
114 MX27_PAD_TIN = PAD_ID(PC, 15),
115 MX27_PAD_SSI4_FS = PAD_ID(PC, 16),
116 MX27_PAD_SSI4_RXDAT = PAD_ID(PC, 17),
117 MX27_PAD_SSI4_TXDAT = PAD_ID(PC, 18),
118 MX27_PAD_SSI4_CLK = PAD_ID(PC, 19),
119 MX27_PAD_SSI1_FS = PAD_ID(PC, 20),
120 MX27_PAD_SSI1_RXDAT = PAD_ID(PC, 21),
121 MX27_PAD_SSI1_TXDAT = PAD_ID(PC, 22),
122 MX27_PAD_SSI1_CLK = PAD_ID(PC, 23),
123 MX27_PAD_SSI2_FS = PAD_ID(PC, 24),
124 MX27_PAD_SSI2_RXDAT = PAD_ID(PC, 25),
125 MX27_PAD_SSI2_TXDAT = PAD_ID(PC, 26),
126 MX27_PAD_SSI2_CLK = PAD_ID(PC, 27),
127 MX27_PAD_SSI3_FS = PAD_ID(PC, 28),
128 MX27_PAD_SSI3_RXDAT = PAD_ID(PC, 29),
129 MX27_PAD_SSI3_TXDAT = PAD_ID(PC, 30),
130 MX27_PAD_SSI3_CLK = PAD_ID(PC, 31),
131
132 MX27_PAD_SD3_CMD = PAD_ID(PD, 0),
133 MX27_PAD_SD3_CLK = PAD_ID(PD, 1),
134 MX27_PAD_ATA_DATA0 = PAD_ID(PD, 2),
135 MX27_PAD_ATA_DATA1 = PAD_ID(PD, 3),
136 MX27_PAD_ATA_DATA2 = PAD_ID(PD, 4),
137 MX27_PAD_ATA_DATA3 = PAD_ID(PD, 5),
138 MX27_PAD_ATA_DATA4 = PAD_ID(PD, 6),
139 MX27_PAD_ATA_DATA5 = PAD_ID(PD, 7),
140 MX27_PAD_ATA_DATA6 = PAD_ID(PD, 8),
141 MX27_PAD_ATA_DATA7 = PAD_ID(PD, 9),
142 MX27_PAD_ATA_DATA8 = PAD_ID(PD, 10),
143 MX27_PAD_ATA_DATA9 = PAD_ID(PD, 11),
144 MX27_PAD_ATA_DATA10 = PAD_ID(PD, 12),
145 MX27_PAD_ATA_DATA11 = PAD_ID(PD, 13),
146 MX27_PAD_ATA_DATA12 = PAD_ID(PD, 14),
147 MX27_PAD_ATA_DATA13 = PAD_ID(PD, 15),
148 MX27_PAD_ATA_DATA14 = PAD_ID(PD, 16),
149 MX27_PAD_I2C_DATA = PAD_ID(PD, 17),
150 MX27_PAD_I2C_CLK = PAD_ID(PD, 18),
151 MX27_PAD_CSPI2_SS2 = PAD_ID(PD, 19),
152 MX27_PAD_CSPI2_SS1 = PAD_ID(PD, 20),
153 MX27_PAD_CSPI2_SS0 = PAD_ID(PD, 21),
154 MX27_PAD_CSPI2_SCLK = PAD_ID(PD, 22),
155 MX27_PAD_CSPI2_MISO = PAD_ID(PD, 23),
156 MX27_PAD_CSPI2_MOSI = PAD_ID(PD, 24),
157 MX27_PAD_CSPI1_RDY = PAD_ID(PD, 25),
158 MX27_PAD_CSPI1_SS2 = PAD_ID(PD, 26),
159 MX27_PAD_CSPI1_SS1 = PAD_ID(PD, 27),
160 MX27_PAD_CSPI1_SS0 = PAD_ID(PD, 28),
161 MX27_PAD_CSPI1_SCLK = PAD_ID(PD, 29),
162 MX27_PAD_CSPI1_MISO = PAD_ID(PD, 30),
163 MX27_PAD_CSPI1_MOSI = PAD_ID(PD, 31),
164
165 MX27_PAD_USBOTG_NXT = PAD_ID(PE, 0),
166 MX27_PAD_USBOTG_STP = PAD_ID(PE, 1),
167 MX27_PAD_USBOTG_DIR = PAD_ID(PE, 2),
168 MX27_PAD_UART2_CTS = PAD_ID(PE, 3),
169 MX27_PAD_UART2_RTS = PAD_ID(PE, 4),
170 MX27_PAD_PWMO = PAD_ID(PE, 5),
171 MX27_PAD_UART2_TXD = PAD_ID(PE, 6),
172 MX27_PAD_UART2_RXD = PAD_ID(PE, 7),
173 MX27_PAD_UART3_TXD = PAD_ID(PE, 8),
174 MX27_PAD_UART3_RXD = PAD_ID(PE, 9),
175 MX27_PAD_UART3_CTS = PAD_ID(PE, 10),
176 MX27_PAD_UART3_RTS = PAD_ID(PE, 11),
177 MX27_PAD_UART1_TXD = PAD_ID(PE, 12),
178 MX27_PAD_UART1_RXD = PAD_ID(PE, 13),
179 MX27_PAD_UART1_CTS = PAD_ID(PE, 14),
180 MX27_PAD_UART1_RTS = PAD_ID(PE, 15),
181 MX27_PAD_RTCK = PAD_ID(PE, 16),
182 MX27_PAD_RESET_OUT_B = PAD_ID(PE, 17),
183 MX27_PAD_SD1_D0 = PAD_ID(PE, 18),
184 MX27_PAD_SD1_D1 = PAD_ID(PE, 19),
185 MX27_PAD_SD1_D2 = PAD_ID(PE, 20),
186 MX27_PAD_SD1_D3 = PAD_ID(PE, 21),
187 MX27_PAD_SD1_CMD = PAD_ID(PE, 22),
188 MX27_PAD_SD1_CLK = PAD_ID(PE, 23),
189 MX27_PAD_USBOTG_CLK = PAD_ID(PE, 24),
190 MX27_PAD_USBOTG_DATA7 = PAD_ID(PE, 25),
191 MX27_PAD_UNUSED9 = PAD_ID(PE, 26),
192 MX27_PAD_UNUSED10 = PAD_ID(PE, 27),
193 MX27_PAD_UNUSED11 = PAD_ID(PE, 28),
194 MX27_PAD_UNUSED12 = PAD_ID(PE, 29),
195 MX27_PAD_UNUSED13 = PAD_ID(PE, 30),
196 MX27_PAD_UNUSED14 = PAD_ID(PE, 31),
197
198 MX27_PAD_NFRB = PAD_ID(PF, 0),
199 MX27_PAD_NFCLE = PAD_ID(PF, 1),
200 MX27_PAD_NFWP_B = PAD_ID(PF, 2),
201 MX27_PAD_NFCE_B = PAD_ID(PF, 3),
202 MX27_PAD_NFALE = PAD_ID(PF, 4),
203 MX27_PAD_NFRE_B = PAD_ID(PF, 5),
204 MX27_PAD_NFWE_B = PAD_ID(PF, 6),
205 MX27_PAD_PC_POE = PAD_ID(PF, 7),
206 MX27_PAD_PC_RW_B = PAD_ID(PF, 8),
207 MX27_PAD_IOIS16 = PAD_ID(PF, 9),
208 MX27_PAD_PC_RST = PAD_ID(PF, 10),
209 MX27_PAD_PC_BVD2 = PAD_ID(PF, 11),
210 MX27_PAD_PC_BVD1 = PAD_ID(PF, 12),
211 MX27_PAD_PC_VS2 = PAD_ID(PF, 13),
212 MX27_PAD_PC_VS1 = PAD_ID(PF, 14),
213 MX27_PAD_CLKO = PAD_ID(PF, 15),
214 MX27_PAD_PC_PWRON = PAD_ID(PF, 16),
215 MX27_PAD_PC_READY = PAD_ID(PF, 17),
216 MX27_PAD_PC_WAIT_B = PAD_ID(PF, 18),
217 MX27_PAD_PC_CD2_B = PAD_ID(PF, 19),
218 MX27_PAD_PC_CD1_B = PAD_ID(PF, 20),
219 MX27_PAD_CS4_B = PAD_ID(PF, 21),
220 MX27_PAD_CS5_B = PAD_ID(PF, 22),
221 MX27_PAD_ATA_DATA15 = PAD_ID(PF, 23),
222 MX27_PAD_UNUSED15 = PAD_ID(PF, 24),
223 MX27_PAD_UNUSED16 = PAD_ID(PF, 25),
224 MX27_PAD_UNUSED17 = PAD_ID(PF, 26),
225 MX27_PAD_UNUSED18 = PAD_ID(PF, 27),
226 MX27_PAD_UNUSED19 = PAD_ID(PF, 28),
227 MX27_PAD_UNUSED20 = PAD_ID(PF, 29),
228 MX27_PAD_UNUSED21 = PAD_ID(PF, 30),
229 MX27_PAD_UNUSED22 = PAD_ID(PF, 31),
230};
231
232/* Pad names for the pinmux subsystem */
233static const struct pinctrl_pin_desc imx27_pinctrl_pads[] = {
234 IMX_PINCTRL_PIN(MX27_PAD_USBH2_CLK),
235 IMX_PINCTRL_PIN(MX27_PAD_USBH2_DIR),
236 IMX_PINCTRL_PIN(MX27_PAD_USBH2_DATA7),
237 IMX_PINCTRL_PIN(MX27_PAD_USBH2_NXT),
238 IMX_PINCTRL_PIN(MX27_PAD_USBH2_STP),
239 IMX_PINCTRL_PIN(MX27_PAD_LSCLK),
240 IMX_PINCTRL_PIN(MX27_PAD_LD0),
241 IMX_PINCTRL_PIN(MX27_PAD_LD1),
242 IMX_PINCTRL_PIN(MX27_PAD_LD2),
243 IMX_PINCTRL_PIN(MX27_PAD_LD3),
244 IMX_PINCTRL_PIN(MX27_PAD_LD4),
245 IMX_PINCTRL_PIN(MX27_PAD_LD5),
246 IMX_PINCTRL_PIN(MX27_PAD_LD6),
247 IMX_PINCTRL_PIN(MX27_PAD_LD7),
248 IMX_PINCTRL_PIN(MX27_PAD_LD8),
249 IMX_PINCTRL_PIN(MX27_PAD_LD9),
250 IMX_PINCTRL_PIN(MX27_PAD_LD10),
251 IMX_PINCTRL_PIN(MX27_PAD_LD11),
252 IMX_PINCTRL_PIN(MX27_PAD_LD12),
253 IMX_PINCTRL_PIN(MX27_PAD_LD13),
254 IMX_PINCTRL_PIN(MX27_PAD_LD14),
255 IMX_PINCTRL_PIN(MX27_PAD_LD15),
256 IMX_PINCTRL_PIN(MX27_PAD_LD16),
257 IMX_PINCTRL_PIN(MX27_PAD_LD17),
258 IMX_PINCTRL_PIN(MX27_PAD_REV),
259 IMX_PINCTRL_PIN(MX27_PAD_CLS),
260 IMX_PINCTRL_PIN(MX27_PAD_PS),
261 IMX_PINCTRL_PIN(MX27_PAD_SPL_SPR),
262 IMX_PINCTRL_PIN(MX27_PAD_HSYNC),
263 IMX_PINCTRL_PIN(MX27_PAD_VSYNC),
264 IMX_PINCTRL_PIN(MX27_PAD_CONTRAST),
265 IMX_PINCTRL_PIN(MX27_PAD_OE_ACD),
266
267 IMX_PINCTRL_PIN(MX27_PAD_UNUSED0),
268 IMX_PINCTRL_PIN(MX27_PAD_UNUSED1),
269 IMX_PINCTRL_PIN(MX27_PAD_UNUSED2),
270 IMX_PINCTRL_PIN(MX27_PAD_UNUSED3),
271 IMX_PINCTRL_PIN(MX27_PAD_SD2_D0),
272 IMX_PINCTRL_PIN(MX27_PAD_SD2_D1),
273 IMX_PINCTRL_PIN(MX27_PAD_SD2_D2),
274 IMX_PINCTRL_PIN(MX27_PAD_SD2_D3),
275 IMX_PINCTRL_PIN(MX27_PAD_SD2_CMD),
276 IMX_PINCTRL_PIN(MX27_PAD_SD2_CLK),
277 IMX_PINCTRL_PIN(MX27_PAD_CSI_D0),
278 IMX_PINCTRL_PIN(MX27_PAD_CSI_D1),
279 IMX_PINCTRL_PIN(MX27_PAD_CSI_D2),
280 IMX_PINCTRL_PIN(MX27_PAD_CSI_D3),
281 IMX_PINCTRL_PIN(MX27_PAD_CSI_D4),
282 IMX_PINCTRL_PIN(MX27_PAD_CSI_MCLK),
283 IMX_PINCTRL_PIN(MX27_PAD_CSI_PIXCLK),
284 IMX_PINCTRL_PIN(MX27_PAD_CSI_D5),
285 IMX_PINCTRL_PIN(MX27_PAD_CSI_D6),
286 IMX_PINCTRL_PIN(MX27_PAD_CSI_D7),
287 IMX_PINCTRL_PIN(MX27_PAD_CSI_VSYNC),
288 IMX_PINCTRL_PIN(MX27_PAD_CSI_HSYNC),
289 IMX_PINCTRL_PIN(MX27_PAD_USBH1_SUSP),
290 IMX_PINCTRL_PIN(MX27_PAD_USB_PWR),
291 IMX_PINCTRL_PIN(MX27_PAD_USB_OC_B),
292 IMX_PINCTRL_PIN(MX27_PAD_USBH1_RCV),
293 IMX_PINCTRL_PIN(MX27_PAD_USBH1_FS),
294 IMX_PINCTRL_PIN(MX27_PAD_USBH1_OE_B),
295 IMX_PINCTRL_PIN(MX27_PAD_USBH1_TXDM),
296 IMX_PINCTRL_PIN(MX27_PAD_USBH1_TXDP),
297 IMX_PINCTRL_PIN(MX27_PAD_USBH1_RXDM),
298 IMX_PINCTRL_PIN(MX27_PAD_USBH1_RXDP),
299
300 IMX_PINCTRL_PIN(MX27_PAD_UNUSED4),
301 IMX_PINCTRL_PIN(MX27_PAD_UNUSED5),
302 IMX_PINCTRL_PIN(MX27_PAD_UNUSED6),
303 IMX_PINCTRL_PIN(MX27_PAD_UNUSED7),
304 IMX_PINCTRL_PIN(MX27_PAD_UNUSED8),
305 IMX_PINCTRL_PIN(MX27_PAD_I2C2_SDA),
306 IMX_PINCTRL_PIN(MX27_PAD_I2C2_SCL),
307 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA5),
308 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA6),
309 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA0),
310 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA2),
311 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA1),
312 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA4),
313 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA3),
314 IMX_PINCTRL_PIN(MX27_PAD_TOUT),
315 IMX_PINCTRL_PIN(MX27_PAD_TIN),
316 IMX_PINCTRL_PIN(MX27_PAD_SSI4_FS),
317 IMX_PINCTRL_PIN(MX27_PAD_SSI4_RXDAT),
318 IMX_PINCTRL_PIN(MX27_PAD_SSI4_TXDAT),
319 IMX_PINCTRL_PIN(MX27_PAD_SSI4_CLK),
320 IMX_PINCTRL_PIN(MX27_PAD_SSI1_FS),
321 IMX_PINCTRL_PIN(MX27_PAD_SSI1_RXDAT),
322 IMX_PINCTRL_PIN(MX27_PAD_SSI1_TXDAT),
323 IMX_PINCTRL_PIN(MX27_PAD_SSI1_CLK),
324 IMX_PINCTRL_PIN(MX27_PAD_SSI2_FS),
325 IMX_PINCTRL_PIN(MX27_PAD_SSI2_RXDAT),
326 IMX_PINCTRL_PIN(MX27_PAD_SSI2_TXDAT),
327 IMX_PINCTRL_PIN(MX27_PAD_SSI2_CLK),
328 IMX_PINCTRL_PIN(MX27_PAD_SSI3_FS),
329 IMX_PINCTRL_PIN(MX27_PAD_SSI3_RXDAT),
330 IMX_PINCTRL_PIN(MX27_PAD_SSI3_TXDAT),
331 IMX_PINCTRL_PIN(MX27_PAD_SSI3_CLK),
332
333 IMX_PINCTRL_PIN(MX27_PAD_SD3_CMD),
334 IMX_PINCTRL_PIN(MX27_PAD_SD3_CLK),
335 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA0),
336 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA1),
337 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA2),
338 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA3),
339 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA4),
340 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA5),
341 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA6),
342 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA7),
343 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA8),
344 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA9),
345 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA10),
346 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA11),
347 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA12),
348 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA13),
349 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA14),
350 IMX_PINCTRL_PIN(MX27_PAD_I2C_DATA),
351 IMX_PINCTRL_PIN(MX27_PAD_I2C_CLK),
352 IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SS2),
353 IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SS1),
354 IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SS0),
355 IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SCLK),
356 IMX_PINCTRL_PIN(MX27_PAD_CSPI2_MISO),
357 IMX_PINCTRL_PIN(MX27_PAD_CSPI2_MOSI),
358 IMX_PINCTRL_PIN(MX27_PAD_CSPI1_RDY),
359 IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SS2),
360 IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SS1),
361 IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SS0),
362 IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SCLK),
363 IMX_PINCTRL_PIN(MX27_PAD_CSPI1_MISO),
364 IMX_PINCTRL_PIN(MX27_PAD_CSPI1_MOSI),
365
366 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_NXT),
367 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_STP),
368 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DIR),
369 IMX_PINCTRL_PIN(MX27_PAD_UART2_CTS),
370 IMX_PINCTRL_PIN(MX27_PAD_UART2_RTS),
371 IMX_PINCTRL_PIN(MX27_PAD_PWMO),
372 IMX_PINCTRL_PIN(MX27_PAD_UART2_TXD),
373 IMX_PINCTRL_PIN(MX27_PAD_UART2_RXD),
374 IMX_PINCTRL_PIN(MX27_PAD_UART3_TXD),
375 IMX_PINCTRL_PIN(MX27_PAD_UART3_RXD),
376 IMX_PINCTRL_PIN(MX27_PAD_UART3_CTS),
377 IMX_PINCTRL_PIN(MX27_PAD_UART3_RTS),
378 IMX_PINCTRL_PIN(MX27_PAD_UART1_TXD),
379 IMX_PINCTRL_PIN(MX27_PAD_UART1_RXD),
380 IMX_PINCTRL_PIN(MX27_PAD_UART1_CTS),
381 IMX_PINCTRL_PIN(MX27_PAD_UART1_RTS),
382 IMX_PINCTRL_PIN(MX27_PAD_RTCK),
383 IMX_PINCTRL_PIN(MX27_PAD_RESET_OUT_B),
384 IMX_PINCTRL_PIN(MX27_PAD_SD1_D0),
385 IMX_PINCTRL_PIN(MX27_PAD_SD1_D1),
386 IMX_PINCTRL_PIN(MX27_PAD_SD1_D2),
387 IMX_PINCTRL_PIN(MX27_PAD_SD1_D3),
388 IMX_PINCTRL_PIN(MX27_PAD_SD1_CMD),
389 IMX_PINCTRL_PIN(MX27_PAD_SD1_CLK),
390 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_CLK),
391 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA7),
392 IMX_PINCTRL_PIN(MX27_PAD_UNUSED9),
393 IMX_PINCTRL_PIN(MX27_PAD_UNUSED10),
394 IMX_PINCTRL_PIN(MX27_PAD_UNUSED11),
395 IMX_PINCTRL_PIN(MX27_PAD_UNUSED12),
396 IMX_PINCTRL_PIN(MX27_PAD_UNUSED13),
397 IMX_PINCTRL_PIN(MX27_PAD_UNUSED14),
398
399 IMX_PINCTRL_PIN(MX27_PAD_NFRB),
400 IMX_PINCTRL_PIN(MX27_PAD_NFCLE),
401 IMX_PINCTRL_PIN(MX27_PAD_NFWP_B),
402 IMX_PINCTRL_PIN(MX27_PAD_NFCE_B),
403 IMX_PINCTRL_PIN(MX27_PAD_NFALE),
404 IMX_PINCTRL_PIN(MX27_PAD_NFRE_B),
405 IMX_PINCTRL_PIN(MX27_PAD_NFWE_B),
406 IMX_PINCTRL_PIN(MX27_PAD_PC_POE),
407 IMX_PINCTRL_PIN(MX27_PAD_PC_RW_B),
408 IMX_PINCTRL_PIN(MX27_PAD_IOIS16),
409 IMX_PINCTRL_PIN(MX27_PAD_PC_RST),
410 IMX_PINCTRL_PIN(MX27_PAD_PC_BVD2),
411 IMX_PINCTRL_PIN(MX27_PAD_PC_BVD1),
412 IMX_PINCTRL_PIN(MX27_PAD_PC_VS2),
413 IMX_PINCTRL_PIN(MX27_PAD_PC_VS1),
414 IMX_PINCTRL_PIN(MX27_PAD_CLKO),
415 IMX_PINCTRL_PIN(MX27_PAD_PC_PWRON),
416 IMX_PINCTRL_PIN(MX27_PAD_PC_READY),
417 IMX_PINCTRL_PIN(MX27_PAD_PC_WAIT_B),
418 IMX_PINCTRL_PIN(MX27_PAD_PC_CD2_B),
419 IMX_PINCTRL_PIN(MX27_PAD_PC_CD1_B),
420 IMX_PINCTRL_PIN(MX27_PAD_CS4_B),
421 IMX_PINCTRL_PIN(MX27_PAD_CS5_B),
422 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA15),
423 IMX_PINCTRL_PIN(MX27_PAD_UNUSED15),
424 IMX_PINCTRL_PIN(MX27_PAD_UNUSED16),
425 IMX_PINCTRL_PIN(MX27_PAD_UNUSED17),
426 IMX_PINCTRL_PIN(MX27_PAD_UNUSED18),
427 IMX_PINCTRL_PIN(MX27_PAD_UNUSED19),
428 IMX_PINCTRL_PIN(MX27_PAD_UNUSED20),
429 IMX_PINCTRL_PIN(MX27_PAD_UNUSED21),
430 IMX_PINCTRL_PIN(MX27_PAD_UNUSED22),
431};
432
433static struct imx1_pinctrl_soc_info imx27_pinctrl_info = {
434 .pins = imx27_pinctrl_pads,
435 .npins = ARRAY_SIZE(imx27_pinctrl_pads),
436};
437
438static struct of_device_id imx27_pinctrl_of_match[] = {
439 { .compatible = "fsl,imx27-iomuxc", },
440 { /* sentinel */ }
441};
442
443struct imx27_pinctrl_private {
444 int num_gpio_childs;
445 struct platform_device **gpio_dev;
446 struct mxc_gpio_platform_data *gpio_pdata;
447};
448
449static int imx27_pinctrl_probe(struct platform_device *pdev)
450{
451 return imx1_pinctrl_core_probe(pdev, &imx27_pinctrl_info);
452}
453
454static struct platform_driver imx27_pinctrl_driver = {
455 .driver = {
456 .name = "imx27-pinctrl",
457 .owner = THIS_MODULE,
458 .of_match_table = of_match_ptr(imx27_pinctrl_of_match),
459 },
460 .probe = imx27_pinctrl_probe,
461 .remove = imx1_pinctrl_core_remove,
462};
463
464static int __init imx27_pinctrl_init(void)
465{
466 return platform_driver_register(&imx27_pinctrl_driver);
467}
468arch_initcall(imx27_pinctrl_init);
469
470static void __exit imx27_pinctrl_exit(void)
471{
472 platform_driver_unregister(&imx27_pinctrl_driver);
473}
474module_exit(imx27_pinctrl_exit);
475MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>");
476MODULE_DESCRIPTION("Freescale IMX27 pinctrl driver");
477MODULE_LICENSE("GPL v2");
generated by cgit v1.2.2 (git 2.25.0) at 2025-12-25 23:16:56 -0500