diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2015-01-14 00:11:48 -0500 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2015-01-21 21:17:58 -0500 |
commit | e1404611d5f6a7c75e2b745f5eb7fbcdd23751c5 (patch) | |
tree | b19500475a54c071dc06b4c43cbb51641b38c319 | |
parent | 21b137916ec25a507dbf7b6fe8b353fe9dc723c0 (diff) |
drm/nouveau/therm: namespace + nvidia gpu names (no binary change)
The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver. This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).
Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.
A comparison of objdump disassemblies proves no code changes.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
20 files changed, 639 insertions, 685 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/therm.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/therm.h index 42f9574a06c9..6662829b6db1 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/therm.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/therm.h | |||
@@ -1,83 +1,79 @@ | |||
1 | #ifndef __NOUVEAU_THERM_H__ | 1 | #ifndef __NVKM_THERM_H__ |
2 | #define __NOUVEAU_THERM_H__ | 2 | #define __NVKM_THERM_H__ |
3 | |||
4 | #include <core/device.h> | ||
5 | #include <core/subdev.h> | 3 | #include <core/subdev.h> |
6 | 4 | ||
7 | enum nouveau_therm_fan_mode { | 5 | enum nvkm_therm_fan_mode { |
8 | NOUVEAU_THERM_CTRL_NONE = 0, | 6 | NVKM_THERM_CTRL_NONE = 0, |
9 | NOUVEAU_THERM_CTRL_MANUAL = 1, | 7 | NVKM_THERM_CTRL_MANUAL = 1, |
10 | NOUVEAU_THERM_CTRL_AUTO = 2, | 8 | NVKM_THERM_CTRL_AUTO = 2, |
11 | }; | 9 | }; |
12 | 10 | ||
13 | enum nouveau_therm_attr_type { | 11 | enum nvkm_therm_attr_type { |
14 | NOUVEAU_THERM_ATTR_FAN_MIN_DUTY = 0, | 12 | NVKM_THERM_ATTR_FAN_MIN_DUTY = 0, |
15 | NOUVEAU_THERM_ATTR_FAN_MAX_DUTY = 1, | 13 | NVKM_THERM_ATTR_FAN_MAX_DUTY = 1, |
16 | NOUVEAU_THERM_ATTR_FAN_MODE = 2, | 14 | NVKM_THERM_ATTR_FAN_MODE = 2, |
17 | 15 | ||
18 | NOUVEAU_THERM_ATTR_THRS_FAN_BOOST = 10, | 16 | NVKM_THERM_ATTR_THRS_FAN_BOOST = 10, |
19 | NOUVEAU_THERM_ATTR_THRS_FAN_BOOST_HYST = 11, | 17 | NVKM_THERM_ATTR_THRS_FAN_BOOST_HYST = 11, |
20 | NOUVEAU_THERM_ATTR_THRS_DOWN_CLK = 12, | 18 | NVKM_THERM_ATTR_THRS_DOWN_CLK = 12, |
21 | NOUVEAU_THERM_ATTR_THRS_DOWN_CLK_HYST = 13, | 19 | NVKM_THERM_ATTR_THRS_DOWN_CLK_HYST = 13, |
22 | NOUVEAU_THERM_ATTR_THRS_CRITICAL = 14, | 20 | NVKM_THERM_ATTR_THRS_CRITICAL = 14, |
23 | NOUVEAU_THERM_ATTR_THRS_CRITICAL_HYST = 15, | 21 | NVKM_THERM_ATTR_THRS_CRITICAL_HYST = 15, |
24 | NOUVEAU_THERM_ATTR_THRS_SHUTDOWN = 16, | 22 | NVKM_THERM_ATTR_THRS_SHUTDOWN = 16, |
25 | NOUVEAU_THERM_ATTR_THRS_SHUTDOWN_HYST = 17, | 23 | NVKM_THERM_ATTR_THRS_SHUTDOWN_HYST = 17, |
26 | }; | 24 | }; |
27 | 25 | ||
28 | struct nouveau_therm { | 26 | struct nvkm_therm { |
29 | struct nouveau_subdev base; | 27 | struct nvkm_subdev base; |
30 | 28 | ||
31 | int (*pwm_ctrl)(struct nouveau_therm *, int line, bool); | 29 | int (*pwm_ctrl)(struct nvkm_therm *, int line, bool); |
32 | int (*pwm_get)(struct nouveau_therm *, int line, u32 *, u32 *); | 30 | int (*pwm_get)(struct nvkm_therm *, int line, u32 *, u32 *); |
33 | int (*pwm_set)(struct nouveau_therm *, int line, u32, u32); | 31 | int (*pwm_set)(struct nvkm_therm *, int line, u32, u32); |
34 | int (*pwm_clock)(struct nouveau_therm *, int line); | 32 | int (*pwm_clock)(struct nvkm_therm *, int line); |
35 | 33 | ||
36 | int (*fan_get)(struct nouveau_therm *); | 34 | int (*fan_get)(struct nvkm_therm *); |
37 | int (*fan_set)(struct nouveau_therm *, int); | 35 | int (*fan_set)(struct nvkm_therm *, int); |
38 | int (*fan_sense)(struct nouveau_therm *); | 36 | int (*fan_sense)(struct nvkm_therm *); |
39 | 37 | ||
40 | int (*temp_get)(struct nouveau_therm *); | 38 | int (*temp_get)(struct nvkm_therm *); |
41 | 39 | ||
42 | int (*attr_get)(struct nouveau_therm *, enum nouveau_therm_attr_type); | 40 | int (*attr_get)(struct nvkm_therm *, enum nvkm_therm_attr_type); |
43 | int (*attr_set)(struct nouveau_therm *, | 41 | int (*attr_set)(struct nvkm_therm *, enum nvkm_therm_attr_type, int); |
44 | enum nouveau_therm_attr_type, int); | ||
45 | }; | 42 | }; |
46 | 43 | ||
47 | static inline struct nouveau_therm * | 44 | static inline struct nvkm_therm * |
48 | nouveau_therm(void *obj) | 45 | nvkm_therm(void *obj) |
49 | { | 46 | { |
50 | return (void *)nouveau_subdev(obj, NVDEV_SUBDEV_THERM); | 47 | return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_THERM); |
51 | } | 48 | } |
52 | 49 | ||
53 | #define nouveau_therm_create(p,e,o,d) \ | 50 | #define nvkm_therm_create(p,e,o,d) \ |
54 | nouveau_therm_create_((p), (e), (o), sizeof(**d), (void **)d) | 51 | nvkm_therm_create_((p), (e), (o), sizeof(**d), (void **)d) |
55 | #define nouveau_therm_destroy(p) ({ \ | 52 | #define nvkm_therm_destroy(p) ({ \ |
56 | struct nouveau_therm *therm = (p); \ | 53 | struct nvkm_therm *therm = (p); \ |
57 | _nouveau_therm_dtor(nv_object(therm)); \ | 54 | _nvkm_therm_dtor(nv_object(therm)); \ |
58 | }) | 55 | }) |
59 | #define nouveau_therm_init(p) ({ \ | 56 | #define nvkm_therm_init(p) ({ \ |
60 | struct nouveau_therm *therm = (p); \ | 57 | struct nvkm_therm *therm = (p); \ |
61 | _nouveau_therm_init(nv_object(therm)); \ | 58 | _nvkm_therm_init(nv_object(therm)); \ |
62 | }) | 59 | }) |
63 | #define nouveau_therm_fini(p,s) ({ \ | 60 | #define nvkm_therm_fini(p,s) ({ \ |
64 | struct nouveau_therm *therm = (p); \ | 61 | struct nvkm_therm *therm = (p); \ |
65 | _nouveau_therm_init(nv_object(therm), (s)); \ | 62 | _nvkm_therm_init(nv_object(therm), (s)); \ |
66 | }) | 63 | }) |
67 | 64 | ||
68 | int nouveau_therm_create_(struct nouveau_object *, struct nouveau_object *, | 65 | int nvkm_therm_create_(struct nvkm_object *, struct nvkm_object *, |
69 | struct nouveau_oclass *, int, void **); | 66 | struct nvkm_oclass *, int, void **); |
70 | void _nouveau_therm_dtor(struct nouveau_object *); | 67 | void _nvkm_therm_dtor(struct nvkm_object *); |
71 | int _nouveau_therm_init(struct nouveau_object *); | 68 | int _nvkm_therm_init(struct nvkm_object *); |
72 | int _nouveau_therm_fini(struct nouveau_object *, bool); | 69 | int _nvkm_therm_fini(struct nvkm_object *, bool); |
73 | |||
74 | int nouveau_therm_cstate(struct nouveau_therm *, int, int); | ||
75 | 70 | ||
76 | extern struct nouveau_oclass nv40_therm_oclass; | 71 | int nvkm_therm_cstate(struct nvkm_therm *, int, int); |
77 | extern struct nouveau_oclass nv50_therm_oclass; | ||
78 | extern struct nouveau_oclass nv84_therm_oclass; | ||
79 | extern struct nouveau_oclass nva3_therm_oclass; | ||
80 | extern struct nouveau_oclass nvd0_therm_oclass; | ||
81 | extern struct nouveau_oclass gm107_therm_oclass; | ||
82 | 72 | ||
73 | extern struct nvkm_oclass nv40_therm_oclass; | ||
74 | extern struct nvkm_oclass nv50_therm_oclass; | ||
75 | extern struct nvkm_oclass g84_therm_oclass; | ||
76 | extern struct nvkm_oclass gt215_therm_oclass; | ||
77 | extern struct nvkm_oclass gf110_therm_oclass; | ||
78 | extern struct nvkm_oclass gm107_therm_oclass; | ||
83 | #endif | 79 | #endif |
diff --git a/drivers/gpu/drm/nouveau/nouveau_hwmon.c b/drivers/gpu/drm/nouveau/nouveau_hwmon.c index e63c15112f2e..b5c445e02bfc 100644 --- a/drivers/gpu/drm/nouveau/nouveau_hwmon.c +++ b/drivers/gpu/drm/nouveau/nouveau_hwmon.c | |||
@@ -69,7 +69,7 @@ nouveau_hwmon_temp1_auto_point1_temp(struct device *d, | |||
69 | struct nouveau_therm *therm = nvxx_therm(&drm->device); | 69 | struct nouveau_therm *therm = nvxx_therm(&drm->device); |
70 | 70 | ||
71 | return snprintf(buf, PAGE_SIZE, "%d\n", | 71 | return snprintf(buf, PAGE_SIZE, "%d\n", |
72 | therm->attr_get(therm, NOUVEAU_THERM_ATTR_THRS_FAN_BOOST) * 1000); | 72 | therm->attr_get(therm, NVKM_THERM_ATTR_THRS_FAN_BOOST) * 1000); |
73 | } | 73 | } |
74 | static ssize_t | 74 | static ssize_t |
75 | nouveau_hwmon_set_temp1_auto_point1_temp(struct device *d, | 75 | nouveau_hwmon_set_temp1_auto_point1_temp(struct device *d, |
@@ -84,7 +84,7 @@ nouveau_hwmon_set_temp1_auto_point1_temp(struct device *d, | |||
84 | if (kstrtol(buf, 10, &value) == -EINVAL) | 84 | if (kstrtol(buf, 10, &value) == -EINVAL) |
85 | return count; | 85 | return count; |
86 | 86 | ||
87 | therm->attr_set(therm, NOUVEAU_THERM_ATTR_THRS_FAN_BOOST, | 87 | therm->attr_set(therm, NVKM_THERM_ATTR_THRS_FAN_BOOST, |
88 | value / 1000); | 88 | value / 1000); |
89 | 89 | ||
90 | return count; | 90 | return count; |
@@ -102,7 +102,7 @@ nouveau_hwmon_temp1_auto_point1_temp_hyst(struct device *d, | |||
102 | struct nouveau_therm *therm = nvxx_therm(&drm->device); | 102 | struct nouveau_therm *therm = nvxx_therm(&drm->device); |
103 | 103 | ||
104 | return snprintf(buf, PAGE_SIZE, "%d\n", | 104 | return snprintf(buf, PAGE_SIZE, "%d\n", |
105 | therm->attr_get(therm, NOUVEAU_THERM_ATTR_THRS_FAN_BOOST_HYST) * 1000); | 105 | therm->attr_get(therm, NVKM_THERM_ATTR_THRS_FAN_BOOST_HYST) * 1000); |
106 | } | 106 | } |
107 | static ssize_t | 107 | static ssize_t |
108 | nouveau_hwmon_set_temp1_auto_point1_temp_hyst(struct device *d, | 108 | nouveau_hwmon_set_temp1_auto_point1_temp_hyst(struct device *d, |
@@ -117,7 +117,7 @@ nouveau_hwmon_set_temp1_auto_point1_temp_hyst(struct device *d, | |||
117 | if (kstrtol(buf, 10, &value) == -EINVAL) | 117 | if (kstrtol(buf, 10, &value) == -EINVAL) |
118 | return count; | 118 | return count; |
119 | 119 | ||
120 | therm->attr_set(therm, NOUVEAU_THERM_ATTR_THRS_FAN_BOOST_HYST, | 120 | therm->attr_set(therm, NVKM_THERM_ATTR_THRS_FAN_BOOST_HYST, |
121 | value / 1000); | 121 | value / 1000); |
122 | 122 | ||
123 | return count; | 123 | return count; |
@@ -134,7 +134,7 @@ nouveau_hwmon_max_temp(struct device *d, struct device_attribute *a, char *buf) | |||
134 | struct nouveau_therm *therm = nvxx_therm(&drm->device); | 134 | struct nouveau_therm *therm = nvxx_therm(&drm->device); |
135 | 135 | ||
136 | return snprintf(buf, PAGE_SIZE, "%d\n", | 136 | return snprintf(buf, PAGE_SIZE, "%d\n", |
137 | therm->attr_get(therm, NOUVEAU_THERM_ATTR_THRS_DOWN_CLK) * 1000); | 137 | therm->attr_get(therm, NVKM_THERM_ATTR_THRS_DOWN_CLK) * 1000); |
138 | } | 138 | } |
139 | static ssize_t | 139 | static ssize_t |
140 | nouveau_hwmon_set_max_temp(struct device *d, struct device_attribute *a, | 140 | nouveau_hwmon_set_max_temp(struct device *d, struct device_attribute *a, |
@@ -148,7 +148,7 @@ nouveau_hwmon_set_max_temp(struct device *d, struct device_attribute *a, | |||
148 | if (kstrtol(buf, 10, &value) == -EINVAL) | 148 | if (kstrtol(buf, 10, &value) == -EINVAL) |
149 | return count; | 149 | return count; |
150 | 150 | ||
151 | therm->attr_set(therm, NOUVEAU_THERM_ATTR_THRS_DOWN_CLK, value / 1000); | 151 | therm->attr_set(therm, NVKM_THERM_ATTR_THRS_DOWN_CLK, value / 1000); |
152 | 152 | ||
153 | return count; | 153 | return count; |
154 | } | 154 | } |
@@ -165,7 +165,7 @@ nouveau_hwmon_max_temp_hyst(struct device *d, struct device_attribute *a, | |||
165 | struct nouveau_therm *therm = nvxx_therm(&drm->device); | 165 | struct nouveau_therm *therm = nvxx_therm(&drm->device); |
166 | 166 | ||
167 | return snprintf(buf, PAGE_SIZE, "%d\n", | 167 | return snprintf(buf, PAGE_SIZE, "%d\n", |
168 | therm->attr_get(therm, NOUVEAU_THERM_ATTR_THRS_DOWN_CLK_HYST) * 1000); | 168 | therm->attr_get(therm, NVKM_THERM_ATTR_THRS_DOWN_CLK_HYST) * 1000); |
169 | } | 169 | } |
170 | static ssize_t | 170 | static ssize_t |
171 | nouveau_hwmon_set_max_temp_hyst(struct device *d, struct device_attribute *a, | 171 | nouveau_hwmon_set_max_temp_hyst(struct device *d, struct device_attribute *a, |
@@ -179,7 +179,7 @@ nouveau_hwmon_set_max_temp_hyst(struct device *d, struct device_attribute *a, | |||
179 | if (kstrtol(buf, 10, &value) == -EINVAL) | 179 | if (kstrtol(buf, 10, &value) == -EINVAL) |
180 | return count; | 180 | return count; |
181 | 181 | ||
182 | therm->attr_set(therm, NOUVEAU_THERM_ATTR_THRS_DOWN_CLK_HYST, | 182 | therm->attr_set(therm, NVKM_THERM_ATTR_THRS_DOWN_CLK_HYST, |
183 | value / 1000); | 183 | value / 1000); |
184 | 184 | ||
185 | return count; | 185 | return count; |
@@ -197,7 +197,7 @@ nouveau_hwmon_critical_temp(struct device *d, struct device_attribute *a, | |||
197 | struct nouveau_therm *therm = nvxx_therm(&drm->device); | 197 | struct nouveau_therm *therm = nvxx_therm(&drm->device); |
198 | 198 | ||
199 | return snprintf(buf, PAGE_SIZE, "%d\n", | 199 | return snprintf(buf, PAGE_SIZE, "%d\n", |
200 | therm->attr_get(therm, NOUVEAU_THERM_ATTR_THRS_CRITICAL) * 1000); | 200 | therm->attr_get(therm, NVKM_THERM_ATTR_THRS_CRITICAL) * 1000); |
201 | } | 201 | } |
202 | static ssize_t | 202 | static ssize_t |
203 | nouveau_hwmon_set_critical_temp(struct device *d, struct device_attribute *a, | 203 | nouveau_hwmon_set_critical_temp(struct device *d, struct device_attribute *a, |
@@ -212,7 +212,7 @@ nouveau_hwmon_set_critical_temp(struct device *d, struct device_attribute *a, | |||
212 | if (kstrtol(buf, 10, &value) == -EINVAL) | 212 | if (kstrtol(buf, 10, &value) == -EINVAL) |
213 | return count; | 213 | return count; |
214 | 214 | ||
215 | therm->attr_set(therm, NOUVEAU_THERM_ATTR_THRS_CRITICAL, value / 1000); | 215 | therm->attr_set(therm, NVKM_THERM_ATTR_THRS_CRITICAL, value / 1000); |
216 | 216 | ||
217 | return count; | 217 | return count; |
218 | } | 218 | } |
@@ -230,7 +230,7 @@ nouveau_hwmon_critical_temp_hyst(struct device *d, struct device_attribute *a, | |||
230 | struct nouveau_therm *therm = nvxx_therm(&drm->device); | 230 | struct nouveau_therm *therm = nvxx_therm(&drm->device); |
231 | 231 | ||
232 | return snprintf(buf, PAGE_SIZE, "%d\n", | 232 | return snprintf(buf, PAGE_SIZE, "%d\n", |
233 | therm->attr_get(therm, NOUVEAU_THERM_ATTR_THRS_CRITICAL_HYST) * 1000); | 233 | therm->attr_get(therm, NVKM_THERM_ATTR_THRS_CRITICAL_HYST) * 1000); |
234 | } | 234 | } |
235 | static ssize_t | 235 | static ssize_t |
236 | nouveau_hwmon_set_critical_temp_hyst(struct device *d, | 236 | nouveau_hwmon_set_critical_temp_hyst(struct device *d, |
@@ -246,7 +246,7 @@ nouveau_hwmon_set_critical_temp_hyst(struct device *d, | |||
246 | if (kstrtol(buf, 10, &value) == -EINVAL) | 246 | if (kstrtol(buf, 10, &value) == -EINVAL) |
247 | return count; | 247 | return count; |
248 | 248 | ||
249 | therm->attr_set(therm, NOUVEAU_THERM_ATTR_THRS_CRITICAL_HYST, | 249 | therm->attr_set(therm, NVKM_THERM_ATTR_THRS_CRITICAL_HYST, |
250 | value / 1000); | 250 | value / 1000); |
251 | 251 | ||
252 | return count; | 252 | return count; |
@@ -263,7 +263,7 @@ nouveau_hwmon_emergency_temp(struct device *d, struct device_attribute *a, | |||
263 | struct nouveau_therm *therm = nvxx_therm(&drm->device); | 263 | struct nouveau_therm *therm = nvxx_therm(&drm->device); |
264 | 264 | ||
265 | return snprintf(buf, PAGE_SIZE, "%d\n", | 265 | return snprintf(buf, PAGE_SIZE, "%d\n", |
266 | therm->attr_get(therm, NOUVEAU_THERM_ATTR_THRS_SHUTDOWN) * 1000); | 266 | therm->attr_get(therm, NVKM_THERM_ATTR_THRS_SHUTDOWN) * 1000); |
267 | } | 267 | } |
268 | static ssize_t | 268 | static ssize_t |
269 | nouveau_hwmon_set_emergency_temp(struct device *d, struct device_attribute *a, | 269 | nouveau_hwmon_set_emergency_temp(struct device *d, struct device_attribute *a, |
@@ -278,7 +278,7 @@ nouveau_hwmon_set_emergency_temp(struct device *d, struct device_attribute *a, | |||
278 | if (kstrtol(buf, 10, &value) == -EINVAL) | 278 | if (kstrtol(buf, 10, &value) == -EINVAL) |
279 | return count; | 279 | return count; |
280 | 280 | ||
281 | therm->attr_set(therm, NOUVEAU_THERM_ATTR_THRS_SHUTDOWN, value / 1000); | 281 | therm->attr_set(therm, NVKM_THERM_ATTR_THRS_SHUTDOWN, value / 1000); |
282 | 282 | ||
283 | return count; | 283 | return count; |
284 | } | 284 | } |
@@ -296,7 +296,7 @@ nouveau_hwmon_emergency_temp_hyst(struct device *d, struct device_attribute *a, | |||
296 | struct nouveau_therm *therm = nvxx_therm(&drm->device); | 296 | struct nouveau_therm *therm = nvxx_therm(&drm->device); |
297 | 297 | ||
298 | return snprintf(buf, PAGE_SIZE, "%d\n", | 298 | return snprintf(buf, PAGE_SIZE, "%d\n", |
299 | therm->attr_get(therm, NOUVEAU_THERM_ATTR_THRS_SHUTDOWN_HYST) * 1000); | 299 | therm->attr_get(therm, NVKM_THERM_ATTR_THRS_SHUTDOWN_HYST) * 1000); |
300 | } | 300 | } |
301 | static ssize_t | 301 | static ssize_t |
302 | nouveau_hwmon_set_emergency_temp_hyst(struct device *d, | 302 | nouveau_hwmon_set_emergency_temp_hyst(struct device *d, |
@@ -312,7 +312,7 @@ nouveau_hwmon_set_emergency_temp_hyst(struct device *d, | |||
312 | if (kstrtol(buf, 10, &value) == -EINVAL) | 312 | if (kstrtol(buf, 10, &value) == -EINVAL) |
313 | return count; | 313 | return count; |
314 | 314 | ||
315 | therm->attr_set(therm, NOUVEAU_THERM_ATTR_THRS_SHUTDOWN_HYST, | 315 | therm->attr_set(therm, NVKM_THERM_ATTR_THRS_SHUTDOWN_HYST, |
316 | value / 1000); | 316 | value / 1000); |
317 | 317 | ||
318 | return count; | 318 | return count; |
@@ -362,7 +362,7 @@ nouveau_hwmon_get_pwm1_enable(struct device *d, | |||
362 | struct nouveau_therm *therm = nvxx_therm(&drm->device); | 362 | struct nouveau_therm *therm = nvxx_therm(&drm->device); |
363 | int ret; | 363 | int ret; |
364 | 364 | ||
365 | ret = therm->attr_get(therm, NOUVEAU_THERM_ATTR_FAN_MODE); | 365 | ret = therm->attr_get(therm, NVKM_THERM_ATTR_FAN_MODE); |
366 | if (ret < 0) | 366 | if (ret < 0) |
367 | return ret; | 367 | return ret; |
368 | 368 | ||
@@ -383,7 +383,7 @@ nouveau_hwmon_set_pwm1_enable(struct device *d, struct device_attribute *a, | |||
383 | if (ret) | 383 | if (ret) |
384 | return ret; | 384 | return ret; |
385 | 385 | ||
386 | ret = therm->attr_set(therm, NOUVEAU_THERM_ATTR_FAN_MODE, value); | 386 | ret = therm->attr_set(therm, NVKM_THERM_ATTR_FAN_MODE, value); |
387 | if (ret) | 387 | if (ret) |
388 | return ret; | 388 | return ret; |
389 | else | 389 | else |
@@ -441,7 +441,7 @@ nouveau_hwmon_get_pwm1_min(struct device *d, | |||
441 | struct nouveau_therm *therm = nvxx_therm(&drm->device); | 441 | struct nouveau_therm *therm = nvxx_therm(&drm->device); |
442 | int ret; | 442 | int ret; |
443 | 443 | ||
444 | ret = therm->attr_get(therm, NOUVEAU_THERM_ATTR_FAN_MIN_DUTY); | 444 | ret = therm->attr_get(therm, NVKM_THERM_ATTR_FAN_MIN_DUTY); |
445 | if (ret < 0) | 445 | if (ret < 0) |
446 | return ret; | 446 | return ret; |
447 | 447 | ||
@@ -461,7 +461,7 @@ nouveau_hwmon_set_pwm1_min(struct device *d, struct device_attribute *a, | |||
461 | if (kstrtol(buf, 10, &value) == -EINVAL) | 461 | if (kstrtol(buf, 10, &value) == -EINVAL) |
462 | return -EINVAL; | 462 | return -EINVAL; |
463 | 463 | ||
464 | ret = therm->attr_set(therm, NOUVEAU_THERM_ATTR_FAN_MIN_DUTY, value); | 464 | ret = therm->attr_set(therm, NVKM_THERM_ATTR_FAN_MIN_DUTY, value); |
465 | if (ret < 0) | 465 | if (ret < 0) |
466 | return ret; | 466 | return ret; |
467 | 467 | ||
@@ -481,7 +481,7 @@ nouveau_hwmon_get_pwm1_max(struct device *d, | |||
481 | struct nouveau_therm *therm = nvxx_therm(&drm->device); | 481 | struct nouveau_therm *therm = nvxx_therm(&drm->device); |
482 | int ret; | 482 | int ret; |
483 | 483 | ||
484 | ret = therm->attr_get(therm, NOUVEAU_THERM_ATTR_FAN_MAX_DUTY); | 484 | ret = therm->attr_get(therm, NVKM_THERM_ATTR_FAN_MAX_DUTY); |
485 | if (ret < 0) | 485 | if (ret < 0) |
486 | return ret; | 486 | return ret; |
487 | 487 | ||
@@ -501,7 +501,7 @@ nouveau_hwmon_set_pwm1_max(struct device *d, struct device_attribute *a, | |||
501 | if (kstrtol(buf, 10, &value) == -EINVAL) | 501 | if (kstrtol(buf, 10, &value) == -EINVAL) |
502 | return -EINVAL; | 502 | return -EINVAL; |
503 | 503 | ||
504 | ret = therm->attr_set(therm, NOUVEAU_THERM_ATTR_FAN_MAX_DUTY, value); | 504 | ret = therm->attr_set(therm, NVKM_THERM_ATTR_FAN_MAX_DUTY, value); |
505 | if (ret < 0) | 505 | if (ret < 0) |
506 | return ret; | 506 | return ret; |
507 | 507 | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c index 9394962e6c7f..f1f041fdb080 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c | |||
@@ -94,7 +94,7 @@ nv50_identify(struct nouveau_device *device) | |||
94 | device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass; | 94 | device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass; |
95 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; | 95 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; |
96 | device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; | 96 | device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; |
97 | device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass; | 97 | device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass; |
98 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 98 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
99 | device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass; | 99 | device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass; |
100 | device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass; | 100 | device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass; |
@@ -123,7 +123,7 @@ nv50_identify(struct nouveau_device *device) | |||
123 | device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass; | 123 | device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass; |
124 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; | 124 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; |
125 | device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; | 125 | device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; |
126 | device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass; | 126 | device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass; |
127 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 127 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
128 | device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass; | 128 | device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass; |
129 | device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass; | 129 | device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass; |
@@ -152,7 +152,7 @@ nv50_identify(struct nouveau_device *device) | |||
152 | device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass; | 152 | device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass; |
153 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; | 153 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; |
154 | device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; | 154 | device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; |
155 | device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass; | 155 | device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass; |
156 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 156 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
157 | device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass; | 157 | device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass; |
158 | device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass; | 158 | device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass; |
@@ -181,7 +181,7 @@ nv50_identify(struct nouveau_device *device) | |||
181 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; | 181 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; |
182 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; | 182 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; |
183 | device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; | 183 | device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; |
184 | device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass; | 184 | device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass; |
185 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 185 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
186 | device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass; | 186 | device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass; |
187 | device->oclass[NVDEV_SUBDEV_MC ] = g94_mc_oclass; | 187 | device->oclass[NVDEV_SUBDEV_MC ] = g94_mc_oclass; |
@@ -210,7 +210,7 @@ nv50_identify(struct nouveau_device *device) | |||
210 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; | 210 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; |
211 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; | 211 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; |
212 | device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; | 212 | device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; |
213 | device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass; | 213 | device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass; |
214 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 214 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
215 | device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass; | 215 | device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass; |
216 | device->oclass[NVDEV_SUBDEV_MC ] = g94_mc_oclass; | 216 | device->oclass[NVDEV_SUBDEV_MC ] = g94_mc_oclass; |
@@ -239,7 +239,7 @@ nv50_identify(struct nouveau_device *device) | |||
239 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; | 239 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; |
240 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; | 240 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; |
241 | device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; | 241 | device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; |
242 | device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass; | 242 | device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass; |
243 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 243 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
244 | device->oclass[NVDEV_SUBDEV_DEVINIT] = g98_devinit_oclass; | 244 | device->oclass[NVDEV_SUBDEV_DEVINIT] = g98_devinit_oclass; |
245 | device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; | 245 | device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; |
@@ -268,7 +268,7 @@ nv50_identify(struct nouveau_device *device) | |||
268 | device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass; | 268 | device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass; |
269 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; | 269 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; |
270 | device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; | 270 | device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; |
271 | device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass; | 271 | device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass; |
272 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 272 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
273 | device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass; | 273 | device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass; |
274 | device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; | 274 | device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; |
@@ -297,7 +297,7 @@ nv50_identify(struct nouveau_device *device) | |||
297 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; | 297 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; |
298 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; | 298 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; |
299 | device->oclass[NVDEV_SUBDEV_CLK ] = mcp77_clk_oclass; | 299 | device->oclass[NVDEV_SUBDEV_CLK ] = mcp77_clk_oclass; |
300 | device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass; | 300 | device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass; |
301 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 301 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
302 | device->oclass[NVDEV_SUBDEV_DEVINIT] = g98_devinit_oclass; | 302 | device->oclass[NVDEV_SUBDEV_DEVINIT] = g98_devinit_oclass; |
303 | device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; | 303 | device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; |
@@ -326,7 +326,7 @@ nv50_identify(struct nouveau_device *device) | |||
326 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; | 326 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; |
327 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; | 327 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; |
328 | device->oclass[NVDEV_SUBDEV_CLK ] = mcp77_clk_oclass; | 328 | device->oclass[NVDEV_SUBDEV_CLK ] = mcp77_clk_oclass; |
329 | device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass; | 329 | device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass; |
330 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 330 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
331 | device->oclass[NVDEV_SUBDEV_DEVINIT] = g98_devinit_oclass; | 331 | device->oclass[NVDEV_SUBDEV_DEVINIT] = g98_devinit_oclass; |
332 | device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; | 332 | device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; |
@@ -355,7 +355,7 @@ nv50_identify(struct nouveau_device *device) | |||
355 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; | 355 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; |
356 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; | 356 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; |
357 | device->oclass[NVDEV_SUBDEV_CLK ] = >215_clk_oclass; | 357 | device->oclass[NVDEV_SUBDEV_CLK ] = >215_clk_oclass; |
358 | device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; | 358 | device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass; |
359 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 359 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
360 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gt215_devinit_oclass; | 360 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gt215_devinit_oclass; |
361 | device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; | 361 | device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; |
@@ -386,7 +386,7 @@ nv50_identify(struct nouveau_device *device) | |||
386 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; | 386 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; |
387 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; | 387 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; |
388 | device->oclass[NVDEV_SUBDEV_CLK ] = >215_clk_oclass; | 388 | device->oclass[NVDEV_SUBDEV_CLK ] = >215_clk_oclass; |
389 | device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; | 389 | device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass; |
390 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 390 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
391 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gt215_devinit_oclass; | 391 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gt215_devinit_oclass; |
392 | device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; | 392 | device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; |
@@ -416,7 +416,7 @@ nv50_identify(struct nouveau_device *device) | |||
416 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; | 416 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; |
417 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; | 417 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; |
418 | device->oclass[NVDEV_SUBDEV_CLK ] = >215_clk_oclass; | 418 | device->oclass[NVDEV_SUBDEV_CLK ] = >215_clk_oclass; |
419 | device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; | 419 | device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass; |
420 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 420 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
421 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gt215_devinit_oclass; | 421 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gt215_devinit_oclass; |
422 | device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; | 422 | device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; |
@@ -446,7 +446,7 @@ nv50_identify(struct nouveau_device *device) | |||
446 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; | 446 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; |
447 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; | 447 | device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; |
448 | device->oclass[NVDEV_SUBDEV_CLK ] = >215_clk_oclass; | 448 | device->oclass[NVDEV_SUBDEV_CLK ] = >215_clk_oclass; |
449 | device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; | 449 | device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass; |
450 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 450 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
451 | device->oclass[NVDEV_SUBDEV_DEVINIT] = mcp89_devinit_oclass; | 451 | device->oclass[NVDEV_SUBDEV_DEVINIT] = mcp89_devinit_oclass; |
452 | device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; | 452 | device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; |
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c index 90f3fcc47c55..a4859a541aea 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c | |||
@@ -66,7 +66,7 @@ nvc0_identify(struct nouveau_device *device) | |||
66 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; | 66 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; |
67 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; | 67 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; |
68 | device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; | 68 | device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; |
69 | device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; | 69 | device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass; |
70 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 70 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
71 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; | 71 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; |
72 | device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; | 72 | device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; |
@@ -99,7 +99,7 @@ nvc0_identify(struct nouveau_device *device) | |||
99 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; | 99 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; |
100 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; | 100 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; |
101 | device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; | 101 | device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; |
102 | device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; | 102 | device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass; |
103 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 103 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
104 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; | 104 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; |
105 | device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; | 105 | device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; |
@@ -132,7 +132,7 @@ nvc0_identify(struct nouveau_device *device) | |||
132 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; | 132 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; |
133 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; | 133 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; |
134 | device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; | 134 | device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; |
135 | device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; | 135 | device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass; |
136 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 136 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
137 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; | 137 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; |
138 | device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; | 138 | device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; |
@@ -164,7 +164,7 @@ nvc0_identify(struct nouveau_device *device) | |||
164 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; | 164 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; |
165 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; | 165 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; |
166 | device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; | 166 | device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; |
167 | device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; | 167 | device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass; |
168 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 168 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
169 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; | 169 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; |
170 | device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; | 170 | device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; |
@@ -197,7 +197,7 @@ nvc0_identify(struct nouveau_device *device) | |||
197 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; | 197 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; |
198 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; | 198 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; |
199 | device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; | 199 | device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; |
200 | device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; | 200 | device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass; |
201 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 201 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
202 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; | 202 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; |
203 | device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; | 203 | device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; |
@@ -229,7 +229,7 @@ nvc0_identify(struct nouveau_device *device) | |||
229 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; | 229 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; |
230 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; | 230 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; |
231 | device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; | 231 | device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; |
232 | device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; | 232 | device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass; |
233 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 233 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
234 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; | 234 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; |
235 | device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; | 235 | device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; |
@@ -261,7 +261,7 @@ nvc0_identify(struct nouveau_device *device) | |||
261 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; | 261 | device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; |
262 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; | 262 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; |
263 | device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; | 263 | device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; |
264 | device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; | 264 | device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass; |
265 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 265 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
266 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; | 266 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; |
267 | device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; | 267 | device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; |
@@ -294,7 +294,7 @@ nvc0_identify(struct nouveau_device *device) | |||
294 | device->oclass[NVDEV_SUBDEV_I2C ] = gf110_i2c_oclass; | 294 | device->oclass[NVDEV_SUBDEV_I2C ] = gf110_i2c_oclass; |
295 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; | 295 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; |
296 | device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; | 296 | device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; |
297 | device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass; | 297 | device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass; |
298 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 298 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
299 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; | 299 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; |
300 | device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; | 300 | device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; |
@@ -326,7 +326,7 @@ nvc0_identify(struct nouveau_device *device) | |||
326 | device->oclass[NVDEV_SUBDEV_I2C ] = gf117_i2c_oclass; | 326 | device->oclass[NVDEV_SUBDEV_I2C ] = gf117_i2c_oclass; |
327 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; | 327 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; |
328 | device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; | 328 | device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; |
329 | device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass; | 329 | device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass; |
330 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 330 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
331 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; | 331 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; |
332 | device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; | 332 | device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; |
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c index 6b6e54828efb..962a810d2b83 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c | |||
@@ -66,7 +66,7 @@ nve0_identify(struct nouveau_device *device) | |||
66 | device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass; | 66 | device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass; |
67 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; | 67 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; |
68 | device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; | 68 | device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; |
69 | device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass; | 69 | device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass; |
70 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 70 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
71 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; | 71 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; |
72 | device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; | 72 | device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; |
@@ -100,7 +100,7 @@ nve0_identify(struct nouveau_device *device) | |||
100 | device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass; | 100 | device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass; |
101 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; | 101 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; |
102 | device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; | 102 | device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; |
103 | device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass; | 103 | device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass; |
104 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 104 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
105 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; | 105 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; |
106 | device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; | 106 | device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; |
@@ -134,7 +134,7 @@ nve0_identify(struct nouveau_device *device) | |||
134 | device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass; | 134 | device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass; |
135 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; | 135 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; |
136 | device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; | 136 | device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; |
137 | device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass; | 137 | device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass; |
138 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 138 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
139 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; | 139 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; |
140 | device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; | 140 | device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; |
@@ -190,7 +190,7 @@ nve0_identify(struct nouveau_device *device) | |||
190 | device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass; | 190 | device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass; |
191 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; | 191 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; |
192 | device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; | 192 | device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; |
193 | device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass; | 193 | device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass; |
194 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 194 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
195 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; | 195 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; |
196 | device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; | 196 | device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; |
@@ -224,7 +224,7 @@ nve0_identify(struct nouveau_device *device) | |||
224 | device->oclass[NVDEV_SUBDEV_I2C ] = gf110_i2c_oclass; | 224 | device->oclass[NVDEV_SUBDEV_I2C ] = gf110_i2c_oclass; |
225 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; | 225 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; |
226 | device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; | 226 | device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; |
227 | device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass; | 227 | device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass; |
228 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 228 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
229 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; | 229 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; |
230 | device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; | 230 | device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; |
@@ -258,7 +258,7 @@ nve0_identify(struct nouveau_device *device) | |||
258 | device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass; | 258 | device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass; |
259 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; | 259 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; |
260 | device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; | 260 | device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; |
261 | device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass; | 261 | device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass; |
262 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 262 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
263 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; | 263 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; |
264 | device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; | 264 | device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; |
@@ -291,7 +291,7 @@ nve0_identify(struct nouveau_device *device) | |||
291 | device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass; | 291 | device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass; |
292 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; | 292 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; |
293 | device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; | 293 | device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; |
294 | device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass; | 294 | device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass; |
295 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 295 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
296 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; | 296 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass; |
297 | device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; | 297 | device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/Kbuild b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/Kbuild index 9ac82070944a..5837cf1292d9 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/Kbuild +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/Kbuild | |||
@@ -7,7 +7,7 @@ nvkm-y += nvkm/subdev/therm/ic.o | |||
7 | nvkm-y += nvkm/subdev/therm/temp.o | 7 | nvkm-y += nvkm/subdev/therm/temp.o |
8 | nvkm-y += nvkm/subdev/therm/nv40.o | 8 | nvkm-y += nvkm/subdev/therm/nv40.o |
9 | nvkm-y += nvkm/subdev/therm/nv50.o | 9 | nvkm-y += nvkm/subdev/therm/nv50.o |
10 | nvkm-y += nvkm/subdev/therm/nv84.o | 10 | nvkm-y += nvkm/subdev/therm/g84.o |
11 | nvkm-y += nvkm/subdev/therm/nva3.o | 11 | nvkm-y += nvkm/subdev/therm/gt215.o |
12 | nvkm-y += nvkm/subdev/therm/nvd0.o | 12 | nvkm-y += nvkm/subdev/therm/gf110.o |
13 | nvkm-y += nvkm/subdev/therm/gm107.o | 13 | nvkm-y += nvkm/subdev/therm/gm107.o |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/base.c b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/base.c index 67ad8ea468a9..ec327cb64a0d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/base.c | |||
@@ -21,18 +21,14 @@ | |||
21 | * | 21 | * |
22 | * Authors: Martin Peres | 22 | * Authors: Martin Peres |
23 | */ | 23 | */ |
24 | #include "priv.h" | ||
24 | 25 | ||
25 | #include <core/object.h> | ||
26 | #include <core/device.h> | 26 | #include <core/device.h> |
27 | 27 | ||
28 | #include <subdev/bios.h> | ||
29 | |||
30 | #include "priv.h" | ||
31 | |||
32 | static int | 28 | static int |
33 | nouveau_therm_update_trip(struct nouveau_therm *therm) | 29 | nvkm_therm_update_trip(struct nvkm_therm *therm) |
34 | { | 30 | { |
35 | struct nouveau_therm_priv *priv = (void *)therm; | 31 | struct nvkm_therm_priv *priv = (void *)therm; |
36 | struct nvbios_therm_trip_point *trip = priv->fan->bios.trip, | 32 | struct nvbios_therm_trip_point *trip = priv->fan->bios.trip, |
37 | *cur_trip = NULL, | 33 | *cur_trip = NULL, |
38 | *last_trip = priv->last_trip; | 34 | *last_trip = priv->last_trip; |
@@ -63,9 +59,9 @@ nouveau_therm_update_trip(struct nouveau_therm *therm) | |||
63 | } | 59 | } |
64 | 60 | ||
65 | static int | 61 | static int |
66 | nouveau_therm_update_linear(struct nouveau_therm *therm) | 62 | nvkm_therm_update_linear(struct nvkm_therm *therm) |
67 | { | 63 | { |
68 | struct nouveau_therm_priv *priv = (void *)therm; | 64 | struct nvkm_therm_priv *priv = (void *)therm; |
69 | u8 linear_min_temp = priv->fan->bios.linear_min_temp; | 65 | u8 linear_min_temp = priv->fan->bios.linear_min_temp; |
70 | u8 linear_max_temp = priv->fan->bios.linear_max_temp; | 66 | u8 linear_max_temp = priv->fan->bios.linear_max_temp; |
71 | u8 temp = therm->temp_get(therm); | 67 | u8 temp = therm->temp_get(therm); |
@@ -82,15 +78,14 @@ nouveau_therm_update_linear(struct nouveau_therm *therm) | |||
82 | duty *= (priv->fan->bios.max_duty - priv->fan->bios.min_duty); | 78 | duty *= (priv->fan->bios.max_duty - priv->fan->bios.min_duty); |
83 | duty /= (linear_max_temp - linear_min_temp); | 79 | duty /= (linear_max_temp - linear_min_temp); |
84 | duty += priv->fan->bios.min_duty; | 80 | duty += priv->fan->bios.min_duty; |
85 | |||
86 | return duty; | 81 | return duty; |
87 | } | 82 | } |
88 | 83 | ||
89 | static void | 84 | static void |
90 | nouveau_therm_update(struct nouveau_therm *therm, int mode) | 85 | nvkm_therm_update(struct nvkm_therm *therm, int mode) |
91 | { | 86 | { |
92 | struct nouveau_timer *ptimer = nouveau_timer(therm); | 87 | struct nvkm_timer *ptimer = nvkm_timer(therm); |
93 | struct nouveau_therm_priv *priv = (void *)therm; | 88 | struct nvkm_therm_priv *priv = (void *)therm; |
94 | unsigned long flags; | 89 | unsigned long flags; |
95 | bool immd = true; | 90 | bool immd = true; |
96 | bool poll = true; | 91 | bool poll = true; |
@@ -102,20 +97,20 @@ nouveau_therm_update(struct nouveau_therm *therm, int mode) | |||
102 | priv->mode = mode; | 97 | priv->mode = mode; |
103 | 98 | ||
104 | switch (mode) { | 99 | switch (mode) { |
105 | case NOUVEAU_THERM_CTRL_MANUAL: | 100 | case NVKM_THERM_CTRL_MANUAL: |
106 | ptimer->alarm_cancel(ptimer, &priv->alarm); | 101 | ptimer->alarm_cancel(ptimer, &priv->alarm); |
107 | duty = nouveau_therm_fan_get(therm); | 102 | duty = nvkm_therm_fan_get(therm); |
108 | if (duty < 0) | 103 | if (duty < 0) |
109 | duty = 100; | 104 | duty = 100; |
110 | poll = false; | 105 | poll = false; |
111 | break; | 106 | break; |
112 | case NOUVEAU_THERM_CTRL_AUTO: | 107 | case NVKM_THERM_CTRL_AUTO: |
113 | switch(priv->fan->bios.fan_mode) { | 108 | switch(priv->fan->bios.fan_mode) { |
114 | case NVBIOS_THERM_FAN_TRIP: | 109 | case NVBIOS_THERM_FAN_TRIP: |
115 | duty = nouveau_therm_update_trip(therm); | 110 | duty = nvkm_therm_update_trip(therm); |
116 | break; | 111 | break; |
117 | case NVBIOS_THERM_FAN_LINEAR: | 112 | case NVBIOS_THERM_FAN_LINEAR: |
118 | duty = nouveau_therm_update_linear(therm); | 113 | duty = nvkm_therm_update_linear(therm); |
119 | break; | 114 | break; |
120 | case NVBIOS_THERM_FAN_OTHER: | 115 | case NVBIOS_THERM_FAN_OTHER: |
121 | if (priv->cstate) | 116 | if (priv->cstate) |
@@ -125,7 +120,7 @@ nouveau_therm_update(struct nouveau_therm *therm, int mode) | |||
125 | } | 120 | } |
126 | immd = false; | 121 | immd = false; |
127 | break; | 122 | break; |
128 | case NOUVEAU_THERM_CTRL_NONE: | 123 | case NVKM_THERM_CTRL_NONE: |
129 | default: | 124 | default: |
130 | ptimer->alarm_cancel(ptimer, &priv->alarm); | 125 | ptimer->alarm_cancel(ptimer, &priv->alarm); |
131 | poll = false; | 126 | poll = false; |
@@ -137,36 +132,36 @@ nouveau_therm_update(struct nouveau_therm *therm, int mode) | |||
137 | 132 | ||
138 | if (duty >= 0) { | 133 | if (duty >= 0) { |
139 | nv_debug(therm, "FAN target request: %d%%\n", duty); | 134 | nv_debug(therm, "FAN target request: %d%%\n", duty); |
140 | nouveau_therm_fan_set(therm, immd, duty); | 135 | nvkm_therm_fan_set(therm, immd, duty); |
141 | } | 136 | } |
142 | } | 137 | } |
143 | 138 | ||
144 | int | 139 | int |
145 | nouveau_therm_cstate(struct nouveau_therm *ptherm, int fan, int dir) | 140 | nvkm_therm_cstate(struct nvkm_therm *ptherm, int fan, int dir) |
146 | { | 141 | { |
147 | struct nouveau_therm_priv *priv = (void *)ptherm; | 142 | struct nvkm_therm_priv *priv = (void *)ptherm; |
148 | if (!dir || (dir < 0 && fan < priv->cstate) || | 143 | if (!dir || (dir < 0 && fan < priv->cstate) || |
149 | (dir > 0 && fan > priv->cstate)) { | 144 | (dir > 0 && fan > priv->cstate)) { |
150 | nv_debug(ptherm, "default fan speed -> %d%%\n", fan); | 145 | nv_debug(ptherm, "default fan speed -> %d%%\n", fan); |
151 | priv->cstate = fan; | 146 | priv->cstate = fan; |
152 | nouveau_therm_update(ptherm, -1); | 147 | nvkm_therm_update(ptherm, -1); |
153 | } | 148 | } |
154 | return 0; | 149 | return 0; |
155 | } | 150 | } |
156 | 151 | ||
157 | static void | 152 | static void |
158 | nouveau_therm_alarm(struct nouveau_alarm *alarm) | 153 | nvkm_therm_alarm(struct nvkm_alarm *alarm) |
159 | { | 154 | { |
160 | struct nouveau_therm_priv *priv = | 155 | struct nvkm_therm_priv *priv = |
161 | container_of(alarm, struct nouveau_therm_priv, alarm); | 156 | container_of(alarm, struct nvkm_therm_priv, alarm); |
162 | nouveau_therm_update(&priv->base, -1); | 157 | nvkm_therm_update(&priv->base, -1); |
163 | } | 158 | } |
164 | 159 | ||
165 | int | 160 | int |
166 | nouveau_therm_fan_mode(struct nouveau_therm *therm, int mode) | 161 | nvkm_therm_fan_mode(struct nvkm_therm *therm, int mode) |
167 | { | 162 | { |
168 | struct nouveau_therm_priv *priv = (void *)therm; | 163 | struct nvkm_therm_priv *priv = (void *)therm; |
169 | struct nouveau_device *device = nv_device(therm); | 164 | struct nvkm_device *device = nv_device(therm); |
170 | static const char *name[] = { | 165 | static const char *name[] = { |
171 | "disabled", | 166 | "disabled", |
172 | "manual", | 167 | "manual", |
@@ -175,51 +170,51 @@ nouveau_therm_fan_mode(struct nouveau_therm *therm, int mode) | |||
175 | 170 | ||
176 | /* The default PPWR ucode on fermi interferes with fan management */ | 171 | /* The default PPWR ucode on fermi interferes with fan management */ |
177 | if ((mode >= ARRAY_SIZE(name)) || | 172 | if ((mode >= ARRAY_SIZE(name)) || |
178 | (mode != NOUVEAU_THERM_CTRL_NONE && device->card_type >= NV_C0 && | 173 | (mode != NVKM_THERM_CTRL_NONE && device->card_type >= NV_C0 && |
179 | !nouveau_subdev(device, NVDEV_SUBDEV_PMU))) | 174 | !nvkm_subdev(device, NVDEV_SUBDEV_PMU))) |
180 | return -EINVAL; | 175 | return -EINVAL; |
181 | 176 | ||
182 | /* do not allow automatic fan management if the thermal sensor is | 177 | /* do not allow automatic fan management if the thermal sensor is |
183 | * not available */ | 178 | * not available */ |
184 | if (mode == NOUVEAU_THERM_CTRL_AUTO && therm->temp_get(therm) < 0) | 179 | if (mode == NVKM_THERM_CTRL_AUTO && therm->temp_get(therm) < 0) |
185 | return -EINVAL; | 180 | return -EINVAL; |
186 | 181 | ||
187 | if (priv->mode == mode) | 182 | if (priv->mode == mode) |
188 | return 0; | 183 | return 0; |
189 | 184 | ||
190 | nv_info(therm, "fan management: %s\n", name[mode]); | 185 | nv_info(therm, "fan management: %s\n", name[mode]); |
191 | nouveau_therm_update(therm, mode); | 186 | nvkm_therm_update(therm, mode); |
192 | return 0; | 187 | return 0; |
193 | } | 188 | } |
194 | 189 | ||
195 | int | 190 | int |
196 | nouveau_therm_attr_get(struct nouveau_therm *therm, | 191 | nvkm_therm_attr_get(struct nvkm_therm *therm, |
197 | enum nouveau_therm_attr_type type) | 192 | enum nvkm_therm_attr_type type) |
198 | { | 193 | { |
199 | struct nouveau_therm_priv *priv = (void *)therm; | 194 | struct nvkm_therm_priv *priv = (void *)therm; |
200 | 195 | ||
201 | switch (type) { | 196 | switch (type) { |
202 | case NOUVEAU_THERM_ATTR_FAN_MIN_DUTY: | 197 | case NVKM_THERM_ATTR_FAN_MIN_DUTY: |
203 | return priv->fan->bios.min_duty; | 198 | return priv->fan->bios.min_duty; |
204 | case NOUVEAU_THERM_ATTR_FAN_MAX_DUTY: | 199 | case NVKM_THERM_ATTR_FAN_MAX_DUTY: |
205 | return priv->fan->bios.max_duty; | 200 | return priv->fan->bios.max_duty; |
206 | case NOUVEAU_THERM_ATTR_FAN_MODE: | 201 | case NVKM_THERM_ATTR_FAN_MODE: |
207 | return priv->mode; | 202 | return priv->mode; |
208 | case NOUVEAU_THERM_ATTR_THRS_FAN_BOOST: | 203 | case NVKM_THERM_ATTR_THRS_FAN_BOOST: |
209 | return priv->bios_sensor.thrs_fan_boost.temp; | 204 | return priv->bios_sensor.thrs_fan_boost.temp; |
210 | case NOUVEAU_THERM_ATTR_THRS_FAN_BOOST_HYST: | 205 | case NVKM_THERM_ATTR_THRS_FAN_BOOST_HYST: |
211 | return priv->bios_sensor.thrs_fan_boost.hysteresis; | 206 | return priv->bios_sensor.thrs_fan_boost.hysteresis; |
212 | case NOUVEAU_THERM_ATTR_THRS_DOWN_CLK: | 207 | case NVKM_THERM_ATTR_THRS_DOWN_CLK: |
213 | return priv->bios_sensor.thrs_down_clock.temp; | 208 | return priv->bios_sensor.thrs_down_clock.temp; |
214 | case NOUVEAU_THERM_ATTR_THRS_DOWN_CLK_HYST: | 209 | case NVKM_THERM_ATTR_THRS_DOWN_CLK_HYST: |
215 | return priv->bios_sensor.thrs_down_clock.hysteresis; | 210 | return priv->bios_sensor.thrs_down_clock.hysteresis; |
216 | case NOUVEAU_THERM_ATTR_THRS_CRITICAL: | 211 | case NVKM_THERM_ATTR_THRS_CRITICAL: |
217 | return priv->bios_sensor.thrs_critical.temp; | 212 | return priv->bios_sensor.thrs_critical.temp; |
218 | case NOUVEAU_THERM_ATTR_THRS_CRITICAL_HYST: | 213 | case NVKM_THERM_ATTR_THRS_CRITICAL_HYST: |
219 | return priv->bios_sensor.thrs_critical.hysteresis; | 214 | return priv->bios_sensor.thrs_critical.hysteresis; |
220 | case NOUVEAU_THERM_ATTR_THRS_SHUTDOWN: | 215 | case NVKM_THERM_ATTR_THRS_SHUTDOWN: |
221 | return priv->bios_sensor.thrs_shutdown.temp; | 216 | return priv->bios_sensor.thrs_shutdown.temp; |
222 | case NOUVEAU_THERM_ATTR_THRS_SHUTDOWN_HYST: | 217 | case NVKM_THERM_ATTR_THRS_SHUTDOWN_HYST: |
223 | return priv->bios_sensor.thrs_shutdown.hysteresis; | 218 | return priv->bios_sensor.thrs_shutdown.hysteresis; |
224 | } | 219 | } |
225 | 220 | ||
@@ -227,57 +222,57 @@ nouveau_therm_attr_get(struct nouveau_therm *therm, | |||
227 | } | 222 | } |
228 | 223 | ||
229 | int | 224 | int |
230 | nouveau_therm_attr_set(struct nouveau_therm *therm, | 225 | nvkm_therm_attr_set(struct nvkm_therm *therm, |
231 | enum nouveau_therm_attr_type type, int value) | 226 | enum nvkm_therm_attr_type type, int value) |
232 | { | 227 | { |
233 | struct nouveau_therm_priv *priv = (void *)therm; | 228 | struct nvkm_therm_priv *priv = (void *)therm; |
234 | 229 | ||
235 | switch (type) { | 230 | switch (type) { |
236 | case NOUVEAU_THERM_ATTR_FAN_MIN_DUTY: | 231 | case NVKM_THERM_ATTR_FAN_MIN_DUTY: |
237 | if (value < 0) | 232 | if (value < 0) |
238 | value = 0; | 233 | value = 0; |
239 | if (value > priv->fan->bios.max_duty) | 234 | if (value > priv->fan->bios.max_duty) |
240 | value = priv->fan->bios.max_duty; | 235 | value = priv->fan->bios.max_duty; |
241 | priv->fan->bios.min_duty = value; | 236 | priv->fan->bios.min_duty = value; |
242 | return 0; | 237 | return 0; |
243 | case NOUVEAU_THERM_ATTR_FAN_MAX_DUTY: | 238 | case NVKM_THERM_ATTR_FAN_MAX_DUTY: |
244 | if (value < 0) | 239 | if (value < 0) |
245 | value = 0; | 240 | value = 0; |
246 | if (value < priv->fan->bios.min_duty) | 241 | if (value < priv->fan->bios.min_duty) |
247 | value = priv->fan->bios.min_duty; | 242 | value = priv->fan->bios.min_duty; |
248 | priv->fan->bios.max_duty = value; | 243 | priv->fan->bios.max_duty = value; |
249 | return 0; | 244 | return 0; |
250 | case NOUVEAU_THERM_ATTR_FAN_MODE: | 245 | case NVKM_THERM_ATTR_FAN_MODE: |
251 | return nouveau_therm_fan_mode(therm, value); | 246 | return nvkm_therm_fan_mode(therm, value); |
252 | case NOUVEAU_THERM_ATTR_THRS_FAN_BOOST: | 247 | case NVKM_THERM_ATTR_THRS_FAN_BOOST: |
253 | priv->bios_sensor.thrs_fan_boost.temp = value; | 248 | priv->bios_sensor.thrs_fan_boost.temp = value; |
254 | priv->sensor.program_alarms(therm); | 249 | priv->sensor.program_alarms(therm); |
255 | return 0; | 250 | return 0; |
256 | case NOUVEAU_THERM_ATTR_THRS_FAN_BOOST_HYST: | 251 | case NVKM_THERM_ATTR_THRS_FAN_BOOST_HYST: |
257 | priv->bios_sensor.thrs_fan_boost.hysteresis = value; | 252 | priv->bios_sensor.thrs_fan_boost.hysteresis = value; |
258 | priv->sensor.program_alarms(therm); | 253 | priv->sensor.program_alarms(therm); |
259 | return 0; | 254 | return 0; |
260 | case NOUVEAU_THERM_ATTR_THRS_DOWN_CLK: | 255 | case NVKM_THERM_ATTR_THRS_DOWN_CLK: |
261 | priv->bios_sensor.thrs_down_clock.temp = value; | 256 | priv->bios_sensor.thrs_down_clock.temp = value; |
262 | priv->sensor.program_alarms(therm); | 257 | priv->sensor.program_alarms(therm); |
263 | return 0; | 258 | return 0; |
264 | case NOUVEAU_THERM_ATTR_THRS_DOWN_CLK_HYST: | 259 | case NVKM_THERM_ATTR_THRS_DOWN_CLK_HYST: |
265 | priv->bios_sensor.thrs_down_clock.hysteresis = value; | 260 | priv->bios_sensor.thrs_down_clock.hysteresis = value; |
266 | priv->sensor.program_alarms(therm); | 261 | priv->sensor.program_alarms(therm); |
267 | return 0; | 262 | return 0; |
268 | case NOUVEAU_THERM_ATTR_THRS_CRITICAL: | 263 | case NVKM_THERM_ATTR_THRS_CRITICAL: |
269 | priv->bios_sensor.thrs_critical.temp = value; | 264 | priv->bios_sensor.thrs_critical.temp = value; |
270 | priv->sensor.program_alarms(therm); | 265 | priv->sensor.program_alarms(therm); |
271 | return 0; | 266 | return 0; |
272 | case NOUVEAU_THERM_ATTR_THRS_CRITICAL_HYST: | 267 | case NVKM_THERM_ATTR_THRS_CRITICAL_HYST: |
273 | priv->bios_sensor.thrs_critical.hysteresis = value; | 268 | priv->bios_sensor.thrs_critical.hysteresis = value; |
274 | priv->sensor.program_alarms(therm); | 269 | priv->sensor.program_alarms(therm); |
275 | return 0; | 270 | return 0; |
276 | case NOUVEAU_THERM_ATTR_THRS_SHUTDOWN: | 271 | case NVKM_THERM_ATTR_THRS_SHUTDOWN: |
277 | priv->bios_sensor.thrs_shutdown.temp = value; | 272 | priv->bios_sensor.thrs_shutdown.temp = value; |
278 | priv->sensor.program_alarms(therm); | 273 | priv->sensor.program_alarms(therm); |
279 | return 0; | 274 | return 0; |
280 | case NOUVEAU_THERM_ATTR_THRS_SHUTDOWN_HYST: | 275 | case NVKM_THERM_ATTR_THRS_SHUTDOWN_HYST: |
281 | priv->bios_sensor.thrs_shutdown.hysteresis = value; | 276 | priv->bios_sensor.thrs_shutdown.hysteresis = value; |
282 | priv->sensor.program_alarms(therm); | 277 | priv->sensor.program_alarms(therm); |
283 | return 0; | 278 | return 0; |
@@ -287,88 +282,86 @@ nouveau_therm_attr_set(struct nouveau_therm *therm, | |||
287 | } | 282 | } |
288 | 283 | ||
289 | int | 284 | int |
290 | _nouveau_therm_init(struct nouveau_object *object) | 285 | _nvkm_therm_init(struct nvkm_object *object) |
291 | { | 286 | { |
292 | struct nouveau_therm *therm = (void *)object; | 287 | struct nvkm_therm *therm = (void *)object; |
293 | struct nouveau_therm_priv *priv = (void *)therm; | 288 | struct nvkm_therm_priv *priv = (void *)therm; |
294 | int ret; | 289 | int ret; |
295 | 290 | ||
296 | ret = nouveau_subdev_init(&therm->base); | 291 | ret = nvkm_subdev_init(&therm->base); |
297 | if (ret) | 292 | if (ret) |
298 | return ret; | 293 | return ret; |
299 | 294 | ||
300 | if (priv->suspend >= 0) { | 295 | if (priv->suspend >= 0) { |
301 | /* restore the pwm value only when on manual or auto mode */ | 296 | /* restore the pwm value only when on manual or auto mode */ |
302 | if (priv->suspend > 0) | 297 | if (priv->suspend > 0) |
303 | nouveau_therm_fan_set(therm, true, priv->fan->percent); | 298 | nvkm_therm_fan_set(therm, true, priv->fan->percent); |
304 | 299 | ||
305 | nouveau_therm_fan_mode(therm, priv->suspend); | 300 | nvkm_therm_fan_mode(therm, priv->suspend); |
306 | } | 301 | } |
307 | nouveau_therm_sensor_init(therm); | 302 | nvkm_therm_sensor_init(therm); |
308 | nouveau_therm_fan_init(therm); | 303 | nvkm_therm_fan_init(therm); |
309 | return 0; | 304 | return 0; |
310 | } | 305 | } |
311 | 306 | ||
312 | int | 307 | int |
313 | _nouveau_therm_fini(struct nouveau_object *object, bool suspend) | 308 | _nvkm_therm_fini(struct nvkm_object *object, bool suspend) |
314 | { | 309 | { |
315 | struct nouveau_therm *therm = (void *)object; | 310 | struct nvkm_therm *therm = (void *)object; |
316 | struct nouveau_therm_priv *priv = (void *)therm; | 311 | struct nvkm_therm_priv *priv = (void *)therm; |
317 | 312 | ||
318 | nouveau_therm_fan_fini(therm, suspend); | 313 | nvkm_therm_fan_fini(therm, suspend); |
319 | nouveau_therm_sensor_fini(therm, suspend); | 314 | nvkm_therm_sensor_fini(therm, suspend); |
320 | if (suspend) { | 315 | if (suspend) { |
321 | priv->suspend = priv->mode; | 316 | priv->suspend = priv->mode; |
322 | priv->mode = NOUVEAU_THERM_CTRL_NONE; | 317 | priv->mode = NVKM_THERM_CTRL_NONE; |
323 | } | 318 | } |
324 | 319 | ||
325 | return nouveau_subdev_fini(&therm->base, suspend); | 320 | return nvkm_subdev_fini(&therm->base, suspend); |
326 | } | 321 | } |
327 | 322 | ||
328 | int | 323 | int |
329 | nouveau_therm_create_(struct nouveau_object *parent, | 324 | nvkm_therm_create_(struct nvkm_object *parent, struct nvkm_object *engine, |
330 | struct nouveau_object *engine, | 325 | struct nvkm_oclass *oclass, int length, void **pobject) |
331 | struct nouveau_oclass *oclass, | ||
332 | int length, void **pobject) | ||
333 | { | 326 | { |
334 | struct nouveau_therm_priv *priv; | 327 | struct nvkm_therm_priv *priv; |
335 | int ret; | 328 | int ret; |
336 | 329 | ||
337 | ret = nouveau_subdev_create_(parent, engine, oclass, 0, "PTHERM", | 330 | ret = nvkm_subdev_create_(parent, engine, oclass, 0, "PTHERM", |
338 | "therm", length, pobject); | 331 | "therm", length, pobject); |
339 | priv = *pobject; | 332 | priv = *pobject; |
340 | if (ret) | 333 | if (ret) |
341 | return ret; | 334 | return ret; |
342 | 335 | ||
343 | nouveau_alarm_init(&priv->alarm, nouveau_therm_alarm); | 336 | nvkm_alarm_init(&priv->alarm, nvkm_therm_alarm); |
344 | spin_lock_init(&priv->lock); | 337 | spin_lock_init(&priv->lock); |
345 | spin_lock_init(&priv->sensor.alarm_program_lock); | 338 | spin_lock_init(&priv->sensor.alarm_program_lock); |
346 | 339 | ||
347 | priv->base.fan_get = nouveau_therm_fan_user_get; | 340 | priv->base.fan_get = nvkm_therm_fan_user_get; |
348 | priv->base.fan_set = nouveau_therm_fan_user_set; | 341 | priv->base.fan_set = nvkm_therm_fan_user_set; |
349 | priv->base.fan_sense = nouveau_therm_fan_sense; | 342 | priv->base.fan_sense = nvkm_therm_fan_sense; |
350 | priv->base.attr_get = nouveau_therm_attr_get; | 343 | priv->base.attr_get = nvkm_therm_attr_get; |
351 | priv->base.attr_set = nouveau_therm_attr_set; | 344 | priv->base.attr_set = nvkm_therm_attr_set; |
352 | priv->mode = priv->suspend = -1; /* undefined */ | 345 | priv->mode = priv->suspend = -1; /* undefined */ |
353 | return 0; | 346 | return 0; |
354 | } | 347 | } |
355 | 348 | ||
356 | int | 349 | int |
357 | nouveau_therm_preinit(struct nouveau_therm *therm) | 350 | nvkm_therm_preinit(struct nvkm_therm *therm) |
358 | { | 351 | { |
359 | nouveau_therm_sensor_ctor(therm); | 352 | nvkm_therm_sensor_ctor(therm); |
360 | nouveau_therm_ic_ctor(therm); | 353 | nvkm_therm_ic_ctor(therm); |
361 | nouveau_therm_fan_ctor(therm); | 354 | nvkm_therm_fan_ctor(therm); |
362 | 355 | ||
363 | nouveau_therm_fan_mode(therm, NOUVEAU_THERM_CTRL_AUTO); | 356 | nvkm_therm_fan_mode(therm, NVKM_THERM_CTRL_AUTO); |
364 | nouveau_therm_sensor_preinit(therm); | 357 | nvkm_therm_sensor_preinit(therm); |
365 | return 0; | 358 | return 0; |
366 | } | 359 | } |
367 | 360 | ||
368 | void | 361 | void |
369 | _nouveau_therm_dtor(struct nouveau_object *object) | 362 | _nvkm_therm_dtor(struct nvkm_object *object) |
370 | { | 363 | { |
371 | struct nouveau_therm_priv *priv = (void *)object; | 364 | struct nvkm_therm_priv *priv = (void *)object; |
372 | kfree(priv->fan); | 365 | kfree(priv->fan); |
373 | nouveau_subdev_destroy(&priv->base.base); | 366 | nvkm_subdev_destroy(&priv->base.base); |
374 | } | 367 | } |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/fan.c b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/fan.c index 3656d605168f..434fa745ca40 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/fan.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/fan.c | |||
@@ -22,23 +22,18 @@ | |||
22 | * Authors: Ben Skeggs | 22 | * Authors: Ben Skeggs |
23 | * Martin Peres | 23 | * Martin Peres |
24 | */ | 24 | */ |
25 | |||
26 | #include "priv.h" | 25 | #include "priv.h" |
27 | 26 | ||
28 | #include <core/object.h> | 27 | #include <subdev/bios/fan.h> |
29 | #include <core/device.h> | ||
30 | |||
31 | #include <subdev/gpio.h> | 28 | #include <subdev/gpio.h> |
32 | #include <subdev/timer.h> | 29 | #include <subdev/timer.h> |
33 | 30 | ||
34 | #include <subdev/bios/fan.h> | ||
35 | |||
36 | static int | 31 | static int |
37 | nouveau_fan_update(struct nouveau_fan *fan, bool immediate, int target) | 32 | nvkm_fan_update(struct nvkm_fan *fan, bool immediate, int target) |
38 | { | 33 | { |
39 | struct nouveau_therm *therm = fan->parent; | 34 | struct nvkm_therm *therm = fan->parent; |
40 | struct nouveau_therm_priv *priv = (void *)therm; | 35 | struct nvkm_therm_priv *priv = (void *)therm; |
41 | struct nouveau_timer *ptimer = nouveau_timer(priv); | 36 | struct nvkm_timer *ptimer = nvkm_timer(priv); |
42 | unsigned long flags; | 37 | unsigned long flags; |
43 | int ret = 0; | 38 | int ret = 0; |
44 | int duty; | 39 | int duty; |
@@ -107,32 +102,32 @@ nouveau_fan_update(struct nouveau_fan *fan, bool immediate, int target) | |||
107 | } | 102 | } |
108 | 103 | ||
109 | static void | 104 | static void |
110 | nouveau_fan_alarm(struct nouveau_alarm *alarm) | 105 | nvkm_fan_alarm(struct nvkm_alarm *alarm) |
111 | { | 106 | { |
112 | struct nouveau_fan *fan = container_of(alarm, struct nouveau_fan, alarm); | 107 | struct nvkm_fan *fan = container_of(alarm, struct nvkm_fan, alarm); |
113 | nouveau_fan_update(fan, false, -1); | 108 | nvkm_fan_update(fan, false, -1); |
114 | } | 109 | } |
115 | 110 | ||
116 | int | 111 | int |
117 | nouveau_therm_fan_get(struct nouveau_therm *therm) | 112 | nvkm_therm_fan_get(struct nvkm_therm *therm) |
118 | { | 113 | { |
119 | struct nouveau_therm_priv *priv = (void *)therm; | 114 | struct nvkm_therm_priv *priv = (void *)therm; |
120 | return priv->fan->get(therm); | 115 | return priv->fan->get(therm); |
121 | } | 116 | } |
122 | 117 | ||
123 | int | 118 | int |
124 | nouveau_therm_fan_set(struct nouveau_therm *therm, bool immediate, int percent) | 119 | nvkm_therm_fan_set(struct nvkm_therm *therm, bool immediate, int percent) |
125 | { | 120 | { |
126 | struct nouveau_therm_priv *priv = (void *)therm; | 121 | struct nvkm_therm_priv *priv = (void *)therm; |
127 | return nouveau_fan_update(priv->fan, immediate, percent); | 122 | return nvkm_fan_update(priv->fan, immediate, percent); |
128 | } | 123 | } |
129 | 124 | ||
130 | int | 125 | int |
131 | nouveau_therm_fan_sense(struct nouveau_therm *therm) | 126 | nvkm_therm_fan_sense(struct nvkm_therm *therm) |
132 | { | 127 | { |
133 | struct nouveau_therm_priv *priv = (void *)therm; | 128 | struct nvkm_therm_priv *priv = (void *)therm; |
134 | struct nouveau_timer *ptimer = nouveau_timer(therm); | 129 | struct nvkm_timer *ptimer = nvkm_timer(therm); |
135 | struct nouveau_gpio *gpio = nouveau_gpio(therm); | 130 | struct nvkm_gpio *gpio = nvkm_gpio(therm); |
136 | u32 cycles, cur, prev; | 131 | u32 cycles, cur, prev; |
137 | u64 start, end, tach; | 132 | u64 start, end, tach; |
138 | 133 | ||
@@ -168,26 +163,26 @@ nouveau_therm_fan_sense(struct nouveau_therm *therm) | |||
168 | } | 163 | } |
169 | 164 | ||
170 | int | 165 | int |
171 | nouveau_therm_fan_user_get(struct nouveau_therm *therm) | 166 | nvkm_therm_fan_user_get(struct nvkm_therm *therm) |
172 | { | 167 | { |
173 | return nouveau_therm_fan_get(therm); | 168 | return nvkm_therm_fan_get(therm); |
174 | } | 169 | } |
175 | 170 | ||
176 | int | 171 | int |
177 | nouveau_therm_fan_user_set(struct nouveau_therm *therm, int percent) | 172 | nvkm_therm_fan_user_set(struct nvkm_therm *therm, int percent) |
178 | { | 173 | { |
179 | struct nouveau_therm_priv *priv = (void *)therm; | 174 | struct nvkm_therm_priv *priv = (void *)therm; |
180 | 175 | ||
181 | if (priv->mode != NOUVEAU_THERM_CTRL_MANUAL) | 176 | if (priv->mode != NVKM_THERM_CTRL_MANUAL) |
182 | return -EINVAL; | 177 | return -EINVAL; |
183 | 178 | ||
184 | return nouveau_therm_fan_set(therm, true, percent); | 179 | return nvkm_therm_fan_set(therm, true, percent); |
185 | } | 180 | } |
186 | 181 | ||
187 | static void | 182 | static void |
188 | nouveau_therm_fan_set_defaults(struct nouveau_therm *therm) | 183 | nvkm_therm_fan_set_defaults(struct nvkm_therm *therm) |
189 | { | 184 | { |
190 | struct nouveau_therm_priv *priv = (void *)therm; | 185 | struct nvkm_therm_priv *priv = (void *)therm; |
191 | 186 | ||
192 | priv->fan->bios.pwm_freq = 0; | 187 | priv->fan->bios.pwm_freq = 0; |
193 | priv->fan->bios.min_duty = 0; | 188 | priv->fan->bios.min_duty = 0; |
@@ -199,9 +194,9 @@ nouveau_therm_fan_set_defaults(struct nouveau_therm *therm) | |||
199 | } | 194 | } |
200 | 195 | ||
201 | static void | 196 | static void |
202 | nouveau_therm_fan_safety_checks(struct nouveau_therm *therm) | 197 | nvkm_therm_fan_safety_checks(struct nvkm_therm *therm) |
203 | { | 198 | { |
204 | struct nouveau_therm_priv *priv = (void *)therm; | 199 | struct nvkm_therm_priv *priv = (void *)therm; |
205 | 200 | ||
206 | if (priv->fan->bios.min_duty > 100) | 201 | if (priv->fan->bios.min_duty > 100) |
207 | priv->fan->bios.min_duty = 100; | 202 | priv->fan->bios.min_duty = 100; |
@@ -213,16 +208,16 @@ nouveau_therm_fan_safety_checks(struct nouveau_therm *therm) | |||
213 | } | 208 | } |
214 | 209 | ||
215 | int | 210 | int |
216 | nouveau_therm_fan_init(struct nouveau_therm *therm) | 211 | nvkm_therm_fan_init(struct nvkm_therm *therm) |
217 | { | 212 | { |
218 | return 0; | 213 | return 0; |
219 | } | 214 | } |
220 | 215 | ||
221 | int | 216 | int |
222 | nouveau_therm_fan_fini(struct nouveau_therm *therm, bool suspend) | 217 | nvkm_therm_fan_fini(struct nvkm_therm *therm, bool suspend) |
223 | { | 218 | { |
224 | struct nouveau_therm_priv *priv = (void *)therm; | 219 | struct nvkm_therm_priv *priv = (void *)therm; |
225 | struct nouveau_timer *ptimer = nouveau_timer(therm); | 220 | struct nvkm_timer *ptimer = nvkm_timer(therm); |
226 | 221 | ||
227 | if (suspend) | 222 | if (suspend) |
228 | ptimer->alarm_cancel(ptimer, &priv->fan->alarm); | 223 | ptimer->alarm_cancel(ptimer, &priv->fan->alarm); |
@@ -230,11 +225,11 @@ nouveau_therm_fan_fini(struct nouveau_therm *therm, bool suspend) | |||
230 | } | 225 | } |
231 | 226 | ||
232 | int | 227 | int |
233 | nouveau_therm_fan_ctor(struct nouveau_therm *therm) | 228 | nvkm_therm_fan_ctor(struct nvkm_therm *therm) |
234 | { | 229 | { |
235 | struct nouveau_therm_priv *priv = (void *)therm; | 230 | struct nvkm_therm_priv *priv = (void *)therm; |
236 | struct nouveau_gpio *gpio = nouveau_gpio(therm); | 231 | struct nvkm_gpio *gpio = nvkm_gpio(therm); |
237 | struct nouveau_bios *bios = nouveau_bios(therm); | 232 | struct nvkm_bios *bios = nvkm_bios(therm); |
238 | struct dcb_gpio_func func; | 233 | struct dcb_gpio_func func; |
239 | int ret; | 234 | int ret; |
240 | 235 | ||
@@ -246,15 +241,15 @@ nouveau_therm_fan_ctor(struct nouveau_therm *therm) | |||
246 | nv_debug(therm, "GPIO_FAN is in input mode\n"); | 241 | nv_debug(therm, "GPIO_FAN is in input mode\n"); |
247 | ret = -EINVAL; | 242 | ret = -EINVAL; |
248 | } else { | 243 | } else { |
249 | ret = nouveau_fanpwm_create(therm, &func); | 244 | ret = nvkm_fanpwm_create(therm, &func); |
250 | if (ret != 0) | 245 | if (ret != 0) |
251 | ret = nouveau_fantog_create(therm, &func); | 246 | ret = nvkm_fantog_create(therm, &func); |
252 | } | 247 | } |
253 | } | 248 | } |
254 | 249 | ||
255 | /* no controllable fan found, create a dummy fan module */ | 250 | /* no controllable fan found, create a dummy fan module */ |
256 | if (ret != 0) { | 251 | if (ret != 0) { |
257 | ret = nouveau_fannil_create(therm); | 252 | ret = nvkm_fannil_create(therm); |
258 | if (ret) | 253 | if (ret) |
259 | return ret; | 254 | return ret; |
260 | } | 255 | } |
@@ -262,7 +257,7 @@ nouveau_therm_fan_ctor(struct nouveau_therm *therm) | |||
262 | nv_info(therm, "FAN control: %s\n", priv->fan->type); | 257 | nv_info(therm, "FAN control: %s\n", priv->fan->type); |
263 | 258 | ||
264 | /* read the current speed, it is useful when resuming */ | 259 | /* read the current speed, it is useful when resuming */ |
265 | priv->fan->percent = nouveau_therm_fan_get(therm); | 260 | priv->fan->percent = nvkm_therm_fan_get(therm); |
266 | 261 | ||
267 | /* attempt to detect a tachometer connection */ | 262 | /* attempt to detect a tachometer connection */ |
268 | ret = gpio->find(gpio, 0, DCB_GPIO_FAN_SENSE, 0xff, &priv->fan->tach); | 263 | ret = gpio->find(gpio, 0, DCB_GPIO_FAN_SENSE, 0xff, &priv->fan->tach); |
@@ -271,17 +266,17 @@ nouveau_therm_fan_ctor(struct nouveau_therm *therm) | |||
271 | 266 | ||
272 | /* initialise fan bump/slow update handling */ | 267 | /* initialise fan bump/slow update handling */ |
273 | priv->fan->parent = therm; | 268 | priv->fan->parent = therm; |
274 | nouveau_alarm_init(&priv->fan->alarm, nouveau_fan_alarm); | 269 | nvkm_alarm_init(&priv->fan->alarm, nvkm_fan_alarm); |
275 | spin_lock_init(&priv->fan->lock); | 270 | spin_lock_init(&priv->fan->lock); |
276 | 271 | ||
277 | /* other random init... */ | 272 | /* other random init... */ |
278 | nouveau_therm_fan_set_defaults(therm); | 273 | nvkm_therm_fan_set_defaults(therm); |
279 | nvbios_perf_fan_parse(bios, &priv->fan->perf); | 274 | nvbios_perf_fan_parse(bios, &priv->fan->perf); |
280 | if (!nvbios_fan_parse(bios, &priv->fan->bios)) { | 275 | if (!nvbios_fan_parse(bios, &priv->fan->bios)) { |
281 | nv_debug(therm, "parsing the fan table failed\n"); | 276 | nv_debug(therm, "parsing the fan table failed\n"); |
282 | if (nvbios_therm_fan_parse(bios, &priv->fan->bios)) | 277 | if (nvbios_therm_fan_parse(bios, &priv->fan->bios)) |
283 | nv_error(therm, "parsing both fan tables failed\n"); | 278 | nv_error(therm, "parsing both fan tables failed\n"); |
284 | } | 279 | } |
285 | nouveau_therm_fan_safety_checks(therm); | 280 | nvkm_therm_fan_safety_checks(therm); |
286 | return 0; | 281 | return 0; |
287 | } | 282 | } |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/fannil.c b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/fannil.c index b78c182e1d51..534e5970ec9c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/fannil.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/fannil.c | |||
@@ -21,26 +21,25 @@ | |||
21 | * | 21 | * |
22 | * Authors: Ben Skeggs | 22 | * Authors: Ben Skeggs |
23 | */ | 23 | */ |
24 | |||
25 | #include "priv.h" | 24 | #include "priv.h" |
26 | 25 | ||
27 | static int | 26 | static int |
28 | nouveau_fannil_get(struct nouveau_therm *therm) | 27 | nvkm_fannil_get(struct nvkm_therm *therm) |
29 | { | 28 | { |
30 | return -ENODEV; | 29 | return -ENODEV; |
31 | } | 30 | } |
32 | 31 | ||
33 | static int | 32 | static int |
34 | nouveau_fannil_set(struct nouveau_therm *therm, int percent) | 33 | nvkm_fannil_set(struct nvkm_therm *therm, int percent) |
35 | { | 34 | { |
36 | return -ENODEV; | 35 | return -ENODEV; |
37 | } | 36 | } |
38 | 37 | ||
39 | int | 38 | int |
40 | nouveau_fannil_create(struct nouveau_therm *therm) | 39 | nvkm_fannil_create(struct nvkm_therm *therm) |
41 | { | 40 | { |
42 | struct nouveau_therm_priv *tpriv = (void *)therm; | 41 | struct nvkm_therm_priv *tpriv = (void *)therm; |
43 | struct nouveau_fan *priv; | 42 | struct nvkm_fan *priv; |
44 | 43 | ||
45 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); | 44 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); |
46 | tpriv->fan = priv; | 45 | tpriv->fan = priv; |
@@ -48,7 +47,7 @@ nouveau_fannil_create(struct nouveau_therm *therm) | |||
48 | return -ENOMEM; | 47 | return -ENOMEM; |
49 | 48 | ||
50 | priv->type = "none / external"; | 49 | priv->type = "none / external"; |
51 | priv->get = nouveau_fannil_get; | 50 | priv->get = nvkm_fannil_get; |
52 | priv->set = nouveau_fannil_set; | 51 | priv->set = nvkm_fannil_set; |
53 | return 0; | 52 | return 0; |
54 | } | 53 | } |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/fanpwm.c b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/fanpwm.c index c629d7f2a6a4..3cf4192a33af 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/fanpwm.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/fanpwm.c | |||
@@ -22,25 +22,24 @@ | |||
22 | * Authors: Ben Skeggs | 22 | * Authors: Ben Skeggs |
23 | * Martin Peres | 23 | * Martin Peres |
24 | */ | 24 | */ |
25 | #include "priv.h" | ||
25 | 26 | ||
26 | #include <core/option.h> | 27 | #include <core/option.h> |
27 | #include <subdev/gpio.h> | ||
28 | #include <subdev/bios.h> | 28 | #include <subdev/bios.h> |
29 | #include <subdev/bios/fan.h> | 29 | #include <subdev/bios/fan.h> |
30 | #include <subdev/gpio.h> | ||
30 | 31 | ||
31 | #include "priv.h" | 32 | struct nvkm_fanpwm_priv { |
32 | 33 | struct nvkm_fan base; | |
33 | struct nouveau_fanpwm_priv { | ||
34 | struct nouveau_fan base; | ||
35 | struct dcb_gpio_func func; | 34 | struct dcb_gpio_func func; |
36 | }; | 35 | }; |
37 | 36 | ||
38 | static int | 37 | static int |
39 | nouveau_fanpwm_get(struct nouveau_therm *therm) | 38 | nvkm_fanpwm_get(struct nvkm_therm *therm) |
40 | { | 39 | { |
41 | struct nouveau_therm_priv *tpriv = (void *)therm; | 40 | struct nvkm_therm_priv *tpriv = (void *)therm; |
42 | struct nouveau_fanpwm_priv *priv = (void *)tpriv->fan; | 41 | struct nvkm_fanpwm_priv *priv = (void *)tpriv->fan; |
43 | struct nouveau_gpio *gpio = nouveau_gpio(therm); | 42 | struct nvkm_gpio *gpio = nvkm_gpio(therm); |
44 | int card_type = nv_device(therm)->card_type; | 43 | int card_type = nv_device(therm)->card_type; |
45 | u32 divs, duty; | 44 | u32 divs, duty; |
46 | int ret; | 45 | int ret; |
@@ -57,10 +56,10 @@ nouveau_fanpwm_get(struct nouveau_therm *therm) | |||
57 | } | 56 | } |
58 | 57 | ||
59 | static int | 58 | static int |
60 | nouveau_fanpwm_set(struct nouveau_therm *therm, int percent) | 59 | nvkm_fanpwm_set(struct nvkm_therm *therm, int percent) |
61 | { | 60 | { |
62 | struct nouveau_therm_priv *tpriv = (void *)therm; | 61 | struct nvkm_therm_priv *tpriv = (void *)therm; |
63 | struct nouveau_fanpwm_priv *priv = (void *)tpriv->fan; | 62 | struct nvkm_fanpwm_priv *priv = (void *)tpriv->fan; |
64 | int card_type = nv_device(therm)->card_type; | 63 | int card_type = nv_device(therm)->card_type; |
65 | u32 divs, duty; | 64 | u32 divs, duty; |
66 | int ret; | 65 | int ret; |
@@ -84,18 +83,18 @@ nouveau_fanpwm_set(struct nouveau_therm *therm, int percent) | |||
84 | } | 83 | } |
85 | 84 | ||
86 | int | 85 | int |
87 | nouveau_fanpwm_create(struct nouveau_therm *therm, struct dcb_gpio_func *func) | 86 | nvkm_fanpwm_create(struct nvkm_therm *therm, struct dcb_gpio_func *func) |
88 | { | 87 | { |
89 | struct nouveau_device *device = nv_device(therm); | 88 | struct nvkm_device *device = nv_device(therm); |
90 | struct nouveau_therm_priv *tpriv = (void *)therm; | 89 | struct nvkm_therm_priv *tpriv = (void *)therm; |
91 | struct nouveau_bios *bios = nouveau_bios(therm); | 90 | struct nvkm_bios *bios = nvkm_bios(therm); |
92 | struct nouveau_fanpwm_priv *priv; | 91 | struct nvkm_fanpwm_priv *priv; |
93 | struct nvbios_therm_fan fan; | 92 | struct nvbios_therm_fan fan; |
94 | u32 divs, duty; | 93 | u32 divs, duty; |
95 | 94 | ||
96 | nvbios_fan_parse(bios, &fan); | 95 | nvbios_fan_parse(bios, &fan); |
97 | 96 | ||
98 | if (!nouveau_boolopt(device->cfgopt, "NvFanPWM", func->param) || | 97 | if (!nvkm_boolopt(device->cfgopt, "NvFanPWM", func->param) || |
99 | !therm->pwm_ctrl || fan.type == NVBIOS_THERM_FAN_TOGGLE || | 98 | !therm->pwm_ctrl || fan.type == NVBIOS_THERM_FAN_TOGGLE || |
100 | therm->pwm_get(therm, func->line, &divs, &duty) == -ENODEV) | 99 | therm->pwm_get(therm, func->line, &divs, &duty) == -ENODEV) |
101 | return -ENODEV; | 100 | return -ENODEV; |
@@ -106,8 +105,8 @@ nouveau_fanpwm_create(struct nouveau_therm *therm, struct dcb_gpio_func *func) | |||
106 | return -ENOMEM; | 105 | return -ENOMEM; |
107 | 106 | ||
108 | priv->base.type = "PWM"; | 107 | priv->base.type = "PWM"; |
109 | priv->base.get = nouveau_fanpwm_get; | 108 | priv->base.get = nvkm_fanpwm_get; |
110 | priv->base.set = nouveau_fanpwm_set; | 109 | priv->base.set = nvkm_fanpwm_set; |
111 | priv->func = *func; | 110 | priv->func = *func; |
112 | return 0; | 111 | return 0; |
113 | } | 112 | } |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/fantog.c b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/fantog.c index f69dab11f720..4ce041e81371 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/fantog.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/fantog.c | |||
@@ -21,18 +21,14 @@ | |||
21 | * | 21 | * |
22 | * Authors: Martin Peres | 22 | * Authors: Martin Peres |
23 | */ | 23 | */ |
24 | |||
25 | #include "priv.h" | 24 | #include "priv.h" |
26 | 25 | ||
27 | #include <core/object.h> | ||
28 | #include <core/device.h> | ||
29 | |||
30 | #include <subdev/gpio.h> | 26 | #include <subdev/gpio.h> |
31 | #include <subdev/timer.h> | 27 | #include <subdev/timer.h> |
32 | 28 | ||
33 | struct nouveau_fantog_priv { | 29 | struct nvkm_fantog_priv { |
34 | struct nouveau_fan base; | 30 | struct nvkm_fan base; |
35 | struct nouveau_alarm alarm; | 31 | struct nvkm_alarm alarm; |
36 | spinlock_t lock; | 32 | spinlock_t lock; |
37 | u32 period_us; | 33 | u32 period_us; |
38 | u32 percent; | 34 | u32 percent; |
@@ -40,11 +36,11 @@ struct nouveau_fantog_priv { | |||
40 | }; | 36 | }; |
41 | 37 | ||
42 | static void | 38 | static void |
43 | nouveau_fantog_update(struct nouveau_fantog_priv *priv, int percent) | 39 | nvkm_fantog_update(struct nvkm_fantog_priv *priv, int percent) |
44 | { | 40 | { |
45 | struct nouveau_therm_priv *tpriv = (void *)priv->base.parent; | 41 | struct nvkm_therm_priv *tpriv = (void *)priv->base.parent; |
46 | struct nouveau_timer *ptimer = nouveau_timer(tpriv); | 42 | struct nvkm_timer *ptimer = nvkm_timer(tpriv); |
47 | struct nouveau_gpio *gpio = nouveau_gpio(tpriv); | 43 | struct nvkm_gpio *gpio = nvkm_gpio(tpriv); |
48 | unsigned long flags; | 44 | unsigned long flags; |
49 | int duty; | 45 | int duty; |
50 | 46 | ||
@@ -66,37 +62,37 @@ nouveau_fantog_update(struct nouveau_fantog_priv *priv, int percent) | |||
66 | } | 62 | } |
67 | 63 | ||
68 | static void | 64 | static void |
69 | nouveau_fantog_alarm(struct nouveau_alarm *alarm) | 65 | nvkm_fantog_alarm(struct nvkm_alarm *alarm) |
70 | { | 66 | { |
71 | struct nouveau_fantog_priv *priv = | 67 | struct nvkm_fantog_priv *priv = |
72 | container_of(alarm, struct nouveau_fantog_priv, alarm); | 68 | container_of(alarm, struct nvkm_fantog_priv, alarm); |
73 | nouveau_fantog_update(priv, -1); | 69 | nvkm_fantog_update(priv, -1); |
74 | } | 70 | } |
75 | 71 | ||
76 | static int | 72 | static int |
77 | nouveau_fantog_get(struct nouveau_therm *therm) | 73 | nvkm_fantog_get(struct nvkm_therm *therm) |
78 | { | 74 | { |
79 | struct nouveau_therm_priv *tpriv = (void *)therm; | 75 | struct nvkm_therm_priv *tpriv = (void *)therm; |
80 | struct nouveau_fantog_priv *priv = (void *)tpriv->fan; | 76 | struct nvkm_fantog_priv *priv = (void *)tpriv->fan; |
81 | return priv->percent; | 77 | return priv->percent; |
82 | } | 78 | } |
83 | 79 | ||
84 | static int | 80 | static int |
85 | nouveau_fantog_set(struct nouveau_therm *therm, int percent) | 81 | nvkm_fantog_set(struct nvkm_therm *therm, int percent) |
86 | { | 82 | { |
87 | struct nouveau_therm_priv *tpriv = (void *)therm; | 83 | struct nvkm_therm_priv *tpriv = (void *)therm; |
88 | struct nouveau_fantog_priv *priv = (void *)tpriv->fan; | 84 | struct nvkm_fantog_priv *priv = (void *)tpriv->fan; |
89 | if (therm->pwm_ctrl) | 85 | if (therm->pwm_ctrl) |
90 | therm->pwm_ctrl(therm, priv->func.line, false); | 86 | therm->pwm_ctrl(therm, priv->func.line, false); |
91 | nouveau_fantog_update(priv, percent); | 87 | nvkm_fantog_update(priv, percent); |
92 | return 0; | 88 | return 0; |
93 | } | 89 | } |
94 | 90 | ||
95 | int | 91 | int |
96 | nouveau_fantog_create(struct nouveau_therm *therm, struct dcb_gpio_func *func) | 92 | nvkm_fantog_create(struct nvkm_therm *therm, struct dcb_gpio_func *func) |
97 | { | 93 | { |
98 | struct nouveau_therm_priv *tpriv = (void *)therm; | 94 | struct nvkm_therm_priv *tpriv = (void *)therm; |
99 | struct nouveau_fantog_priv *priv; | 95 | struct nvkm_fantog_priv *priv; |
100 | int ret; | 96 | int ret; |
101 | 97 | ||
102 | if (therm->pwm_ctrl) { | 98 | if (therm->pwm_ctrl) { |
@@ -111,9 +107,9 @@ nouveau_fantog_create(struct nouveau_therm *therm, struct dcb_gpio_func *func) | |||
111 | return -ENOMEM; | 107 | return -ENOMEM; |
112 | 108 | ||
113 | priv->base.type = "toggle"; | 109 | priv->base.type = "toggle"; |
114 | priv->base.get = nouveau_fantog_get; | 110 | priv->base.get = nvkm_fantog_get; |
115 | priv->base.set = nouveau_fantog_set; | 111 | priv->base.set = nvkm_fantog_set; |
116 | nouveau_alarm_init(&priv->alarm, nouveau_fantog_alarm); | 112 | nvkm_alarm_init(&priv->alarm, nvkm_fantog_alarm); |
117 | priv->period_us = 100000; /* 10Hz */ | 113 | priv->period_us = 100000; /* 10Hz */ |
118 | priv->percent = 100; | 114 | priv->percent = 100; |
119 | priv->func = *func; | 115 | priv->func = *func; |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv84.c b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c index 14e2e09bfc24..85b5d0c18c0b 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv84.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c | |||
@@ -22,18 +22,18 @@ | |||
22 | * Authors: Ben Skeggs | 22 | * Authors: Ben Skeggs |
23 | * Martin Peres | 23 | * Martin Peres |
24 | */ | 24 | */ |
25 | |||
26 | #include "priv.h" | 25 | #include "priv.h" |
26 | |||
27 | #include <subdev/fuse.h> | 27 | #include <subdev/fuse.h> |
28 | 28 | ||
29 | struct nv84_therm_priv { | 29 | struct g84_therm_priv { |
30 | struct nouveau_therm_priv base; | 30 | struct nvkm_therm_priv base; |
31 | }; | 31 | }; |
32 | 32 | ||
33 | int | 33 | int |
34 | nv84_temp_get(struct nouveau_therm *therm) | 34 | g84_temp_get(struct nvkm_therm *therm) |
35 | { | 35 | { |
36 | struct nouveau_fuse *fuse = nouveau_fuse(therm); | 36 | struct nvkm_fuse *fuse = nvkm_fuse(therm); |
37 | 37 | ||
38 | if (nv_ro32(fuse, 0x1a8) == 1) | 38 | if (nv_ro32(fuse, 0x1a8) == 1) |
39 | return nv_rd32(therm, 0x20400); | 39 | return nv_rd32(therm, 0x20400); |
@@ -42,9 +42,9 @@ nv84_temp_get(struct nouveau_therm *therm) | |||
42 | } | 42 | } |
43 | 43 | ||
44 | void | 44 | void |
45 | nv84_sensor_setup(struct nouveau_therm *therm) | 45 | g84_sensor_setup(struct nvkm_therm *therm) |
46 | { | 46 | { |
47 | struct nouveau_fuse *fuse = nouveau_fuse(therm); | 47 | struct nvkm_fuse *fuse = nvkm_fuse(therm); |
48 | 48 | ||
49 | /* enable temperature reading for cards with insane defaults */ | 49 | /* enable temperature reading for cards with insane defaults */ |
50 | if (nv_ro32(fuse, 0x1a8) == 1) { | 50 | if (nv_ro32(fuse, 0x1a8) == 1) { |
@@ -55,9 +55,9 @@ nv84_sensor_setup(struct nouveau_therm *therm) | |||
55 | } | 55 | } |
56 | 56 | ||
57 | static void | 57 | static void |
58 | nv84_therm_program_alarms(struct nouveau_therm *therm) | 58 | g84_therm_program_alarms(struct nvkm_therm *therm) |
59 | { | 59 | { |
60 | struct nouveau_therm_priv *priv = (void *)therm; | 60 | struct nvkm_therm_priv *priv = (void *)therm; |
61 | struct nvbios_therm_sensor *sensor = &priv->bios_sensor; | 61 | struct nvbios_therm_sensor *sensor = &priv->bios_sensor; |
62 | unsigned long flags; | 62 | unsigned long flags; |
63 | 63 | ||
@@ -92,53 +92,53 @@ nv84_therm_program_alarms(struct nouveau_therm *therm) | |||
92 | 92 | ||
93 | /* must be called with alarm_program_lock taken ! */ | 93 | /* must be called with alarm_program_lock taken ! */ |
94 | static void | 94 | static void |
95 | nv84_therm_threshold_hyst_emulation(struct nouveau_therm *therm, | 95 | g84_therm_threshold_hyst_emulation(struct nvkm_therm *therm, |
96 | uint32_t thrs_reg, u8 status_bit, | 96 | uint32_t thrs_reg, u8 status_bit, |
97 | const struct nvbios_therm_threshold *thrs, | 97 | const struct nvbios_therm_threshold *thrs, |
98 | enum nouveau_therm_thrs thrs_name) | 98 | enum nvkm_therm_thrs thrs_name) |
99 | { | 99 | { |
100 | enum nouveau_therm_thrs_direction direction; | 100 | enum nvkm_therm_thrs_direction direction; |
101 | enum nouveau_therm_thrs_state prev_state, new_state; | 101 | enum nvkm_therm_thrs_state prev_state, new_state; |
102 | int temp, cur; | 102 | int temp, cur; |
103 | 103 | ||
104 | prev_state = nouveau_therm_sensor_get_threshold_state(therm, thrs_name); | 104 | prev_state = nvkm_therm_sensor_get_threshold_state(therm, thrs_name); |
105 | temp = nv_rd32(therm, thrs_reg); | 105 | temp = nv_rd32(therm, thrs_reg); |
106 | 106 | ||
107 | /* program the next threshold */ | 107 | /* program the next threshold */ |
108 | if (temp == thrs->temp) { | 108 | if (temp == thrs->temp) { |
109 | nv_wr32(therm, thrs_reg, thrs->temp - thrs->hysteresis); | 109 | nv_wr32(therm, thrs_reg, thrs->temp - thrs->hysteresis); |
110 | new_state = NOUVEAU_THERM_THRS_HIGHER; | 110 | new_state = NVKM_THERM_THRS_HIGHER; |
111 | } else { | 111 | } else { |
112 | nv_wr32(therm, thrs_reg, thrs->temp); | 112 | nv_wr32(therm, thrs_reg, thrs->temp); |
113 | new_state = NOUVEAU_THERM_THRS_LOWER; | 113 | new_state = NVKM_THERM_THRS_LOWER; |
114 | } | 114 | } |
115 | 115 | ||
116 | /* fix the state (in case someone reprogrammed the alarms) */ | 116 | /* fix the state (in case someone reprogrammed the alarms) */ |
117 | cur = therm->temp_get(therm); | 117 | cur = therm->temp_get(therm); |
118 | if (new_state == NOUVEAU_THERM_THRS_LOWER && cur > thrs->temp) | 118 | if (new_state == NVKM_THERM_THRS_LOWER && cur > thrs->temp) |
119 | new_state = NOUVEAU_THERM_THRS_HIGHER; | 119 | new_state = NVKM_THERM_THRS_HIGHER; |
120 | else if (new_state == NOUVEAU_THERM_THRS_HIGHER && | 120 | else if (new_state == NVKM_THERM_THRS_HIGHER && |
121 | cur < thrs->temp - thrs->hysteresis) | 121 | cur < thrs->temp - thrs->hysteresis) |
122 | new_state = NOUVEAU_THERM_THRS_LOWER; | 122 | new_state = NVKM_THERM_THRS_LOWER; |
123 | nouveau_therm_sensor_set_threshold_state(therm, thrs_name, new_state); | 123 | nvkm_therm_sensor_set_threshold_state(therm, thrs_name, new_state); |
124 | 124 | ||
125 | /* find the direction */ | 125 | /* find the direction */ |
126 | if (prev_state < new_state) | 126 | if (prev_state < new_state) |
127 | direction = NOUVEAU_THERM_THRS_RISING; | 127 | direction = NVKM_THERM_THRS_RISING; |
128 | else if (prev_state > new_state) | 128 | else if (prev_state > new_state) |
129 | direction = NOUVEAU_THERM_THRS_FALLING; | 129 | direction = NVKM_THERM_THRS_FALLING; |
130 | else | 130 | else |
131 | return; | 131 | return; |
132 | 132 | ||
133 | /* advertise a change in direction */ | 133 | /* advertise a change in direction */ |
134 | nouveau_therm_sensor_event(therm, thrs_name, direction); | 134 | nvkm_therm_sensor_event(therm, thrs_name, direction); |
135 | } | 135 | } |
136 | 136 | ||
137 | static void | 137 | static void |
138 | nv84_therm_intr(struct nouveau_subdev *subdev) | 138 | g84_therm_intr(struct nvkm_subdev *subdev) |
139 | { | 139 | { |
140 | struct nouveau_therm *therm = nouveau_therm(subdev); | 140 | struct nvkm_therm *therm = nvkm_therm(subdev); |
141 | struct nouveau_therm_priv *priv = (void *)therm; | 141 | struct nvkm_therm_priv *priv = (void *)therm; |
142 | struct nvbios_therm_sensor *sensor = &priv->bios_sensor; | 142 | struct nvbios_therm_sensor *sensor = &priv->bios_sensor; |
143 | unsigned long flags; | 143 | unsigned long flags; |
144 | uint32_t intr; | 144 | uint32_t intr; |
@@ -149,33 +149,33 @@ nv84_therm_intr(struct nouveau_subdev *subdev) | |||
149 | 149 | ||
150 | /* THRS_4: downclock */ | 150 | /* THRS_4: downclock */ |
151 | if (intr & 0x002) { | 151 | if (intr & 0x002) { |
152 | nv84_therm_threshold_hyst_emulation(therm, 0x20414, 24, | 152 | g84_therm_threshold_hyst_emulation(therm, 0x20414, 24, |
153 | &sensor->thrs_down_clock, | 153 | &sensor->thrs_down_clock, |
154 | NOUVEAU_THERM_THRS_DOWNCLOCK); | 154 | NVKM_THERM_THRS_DOWNCLOCK); |
155 | intr &= ~0x002; | 155 | intr &= ~0x002; |
156 | } | 156 | } |
157 | 157 | ||
158 | /* shutdown */ | 158 | /* shutdown */ |
159 | if (intr & 0x004) { | 159 | if (intr & 0x004) { |
160 | nv84_therm_threshold_hyst_emulation(therm, 0x20480, 20, | 160 | g84_therm_threshold_hyst_emulation(therm, 0x20480, 20, |
161 | &sensor->thrs_shutdown, | 161 | &sensor->thrs_shutdown, |
162 | NOUVEAU_THERM_THRS_SHUTDOWN); | 162 | NVKM_THERM_THRS_SHUTDOWN); |
163 | intr &= ~0x004; | 163 | intr &= ~0x004; |
164 | } | 164 | } |
165 | 165 | ||
166 | /* THRS_1 : fan boost */ | 166 | /* THRS_1 : fan boost */ |
167 | if (intr & 0x008) { | 167 | if (intr & 0x008) { |
168 | nv84_therm_threshold_hyst_emulation(therm, 0x204c4, 21, | 168 | g84_therm_threshold_hyst_emulation(therm, 0x204c4, 21, |
169 | &sensor->thrs_fan_boost, | 169 | &sensor->thrs_fan_boost, |
170 | NOUVEAU_THERM_THRS_FANBOOST); | 170 | NVKM_THERM_THRS_FANBOOST); |
171 | intr &= ~0x008; | 171 | intr &= ~0x008; |
172 | } | 172 | } |
173 | 173 | ||
174 | /* THRS_2 : critical */ | 174 | /* THRS_2 : critical */ |
175 | if (intr & 0x010) { | 175 | if (intr & 0x010) { |
176 | nv84_therm_threshold_hyst_emulation(therm, 0x204c0, 22, | 176 | g84_therm_threshold_hyst_emulation(therm, 0x204c0, 22, |
177 | &sensor->thrs_critical, | 177 | &sensor->thrs_critical, |
178 | NOUVEAU_THERM_THRS_CRITICAL); | 178 | NVKM_THERM_THRS_CRITICAL); |
179 | intr &= ~0x010; | 179 | intr &= ~0x010; |
180 | } | 180 | } |
181 | 181 | ||
@@ -190,30 +190,28 @@ nv84_therm_intr(struct nouveau_subdev *subdev) | |||
190 | } | 190 | } |
191 | 191 | ||
192 | static int | 192 | static int |
193 | nv84_therm_init(struct nouveau_object *object) | 193 | g84_therm_init(struct nvkm_object *object) |
194 | { | 194 | { |
195 | struct nv84_therm_priv *priv = (void *)object; | 195 | struct g84_therm_priv *priv = (void *)object; |
196 | int ret; | 196 | int ret; |
197 | 197 | ||
198 | ret = nouveau_therm_init(&priv->base.base); | 198 | ret = nvkm_therm_init(&priv->base.base); |
199 | if (ret) | 199 | if (ret) |
200 | return ret; | 200 | return ret; |
201 | 201 | ||
202 | nv84_sensor_setup(&priv->base.base); | 202 | g84_sensor_setup(&priv->base.base); |
203 | |||
204 | return 0; | 203 | return 0; |
205 | } | 204 | } |
206 | 205 | ||
207 | static int | 206 | static int |
208 | nv84_therm_ctor(struct nouveau_object *parent, | 207 | g84_therm_ctor(struct nvkm_object *parent, struct nvkm_object *engine, |
209 | struct nouveau_object *engine, | 208 | struct nvkm_oclass *oclass, void *data, u32 size, |
210 | struct nouveau_oclass *oclass, void *data, u32 size, | 209 | struct nvkm_object **pobject) |
211 | struct nouveau_object **pobject) | ||
212 | { | 210 | { |
213 | struct nv84_therm_priv *priv; | 211 | struct g84_therm_priv *priv; |
214 | int ret; | 212 | int ret; |
215 | 213 | ||
216 | ret = nouveau_therm_create(parent, engine, oclass, &priv); | 214 | ret = nvkm_therm_create(parent, engine, oclass, &priv); |
217 | *pobject = nv_object(priv); | 215 | *pobject = nv_object(priv); |
218 | if (ret) | 216 | if (ret) |
219 | return ret; | 217 | return ret; |
@@ -222,29 +220,29 @@ nv84_therm_ctor(struct nouveau_object *parent, | |||
222 | priv->base.base.pwm_get = nv50_fan_pwm_get; | 220 | priv->base.base.pwm_get = nv50_fan_pwm_get; |
223 | priv->base.base.pwm_set = nv50_fan_pwm_set; | 221 | priv->base.base.pwm_set = nv50_fan_pwm_set; |
224 | priv->base.base.pwm_clock = nv50_fan_pwm_clock; | 222 | priv->base.base.pwm_clock = nv50_fan_pwm_clock; |
225 | priv->base.base.temp_get = nv84_temp_get; | 223 | priv->base.base.temp_get = g84_temp_get; |
226 | priv->base.sensor.program_alarms = nv84_therm_program_alarms; | 224 | priv->base.sensor.program_alarms = g84_therm_program_alarms; |
227 | nv_subdev(priv)->intr = nv84_therm_intr; | 225 | nv_subdev(priv)->intr = g84_therm_intr; |
228 | 226 | ||
229 | /* init the thresholds */ | 227 | /* init the thresholds */ |
230 | nouveau_therm_sensor_set_threshold_state(&priv->base.base, | 228 | nvkm_therm_sensor_set_threshold_state(&priv->base.base, |
231 | NOUVEAU_THERM_THRS_SHUTDOWN, | 229 | NVKM_THERM_THRS_SHUTDOWN, |
232 | NOUVEAU_THERM_THRS_LOWER); | 230 | NVKM_THERM_THRS_LOWER); |
233 | nouveau_therm_sensor_set_threshold_state(&priv->base.base, | 231 | nvkm_therm_sensor_set_threshold_state(&priv->base.base, |
234 | NOUVEAU_THERM_THRS_FANBOOST, | 232 | NVKM_THERM_THRS_FANBOOST, |
235 | NOUVEAU_THERM_THRS_LOWER); | 233 | NVKM_THERM_THRS_LOWER); |
236 | nouveau_therm_sensor_set_threshold_state(&priv->base.base, | 234 | nvkm_therm_sensor_set_threshold_state(&priv->base.base, |
237 | NOUVEAU_THERM_THRS_CRITICAL, | 235 | NVKM_THERM_THRS_CRITICAL, |
238 | NOUVEAU_THERM_THRS_LOWER); | 236 | NVKM_THERM_THRS_LOWER); |
239 | nouveau_therm_sensor_set_threshold_state(&priv->base.base, | 237 | nvkm_therm_sensor_set_threshold_state(&priv->base.base, |
240 | NOUVEAU_THERM_THRS_DOWNCLOCK, | 238 | NVKM_THERM_THRS_DOWNCLOCK, |
241 | NOUVEAU_THERM_THRS_LOWER); | 239 | NVKM_THERM_THRS_LOWER); |
242 | 240 | ||
243 | return nouveau_therm_preinit(&priv->base.base); | 241 | return nvkm_therm_preinit(&priv->base.base); |
244 | } | 242 | } |
245 | 243 | ||
246 | int | 244 | int |
247 | nv84_therm_fini(struct nouveau_object *object, bool suspend) | 245 | g84_therm_fini(struct nvkm_object *object, bool suspend) |
248 | { | 246 | { |
249 | /* Disable PTherm IRQs */ | 247 | /* Disable PTherm IRQs */ |
250 | nv_wr32(object, 0x20000, 0x00000000); | 248 | nv_wr32(object, 0x20000, 0x00000000); |
@@ -253,16 +251,16 @@ nv84_therm_fini(struct nouveau_object *object, bool suspend) | |||
253 | nv_wr32(object, 0x20100, 0xffffffff); | 251 | nv_wr32(object, 0x20100, 0xffffffff); |
254 | nv_wr32(object, 0x1100, 0x10000); /* PBUS */ | 252 | nv_wr32(object, 0x1100, 0x10000); /* PBUS */ |
255 | 253 | ||
256 | return _nouveau_therm_fini(object, suspend); | 254 | return _nvkm_therm_fini(object, suspend); |
257 | } | 255 | } |
258 | 256 | ||
259 | struct nouveau_oclass | 257 | struct nvkm_oclass |
260 | nv84_therm_oclass = { | 258 | g84_therm_oclass = { |
261 | .handle = NV_SUBDEV(THERM, 0x84), | 259 | .handle = NV_SUBDEV(THERM, 0x84), |
262 | .ofuncs = &(struct nouveau_ofuncs) { | 260 | .ofuncs = &(struct nvkm_ofuncs) { |
263 | .ctor = nv84_therm_ctor, | 261 | .ctor = g84_therm_ctor, |
264 | .dtor = _nouveau_therm_dtor, | 262 | .dtor = _nvkm_therm_dtor, |
265 | .init = nv84_therm_init, | 263 | .init = g84_therm_init, |
266 | .fini = nv84_therm_fini, | 264 | .fini = g84_therm_fini, |
267 | }, | 265 | }, |
268 | }; | 266 | }; |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/nvd0.c b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf110.c index b70f7cc649b8..0540e6886d7d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/nvd0.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf110.c | |||
@@ -21,15 +21,14 @@ | |||
21 | * | 21 | * |
22 | * Authors: Ben Skeggs | 22 | * Authors: Ben Skeggs |
23 | */ | 23 | */ |
24 | |||
25 | #include "priv.h" | 24 | #include "priv.h" |
26 | 25 | ||
27 | struct nvd0_therm_priv { | 26 | struct gf110_therm_priv { |
28 | struct nouveau_therm_priv base; | 27 | struct nvkm_therm_priv base; |
29 | }; | 28 | }; |
30 | 29 | ||
31 | static int | 30 | static int |
32 | pwm_info(struct nouveau_therm *therm, int line) | 31 | pwm_info(struct nvkm_therm *therm, int line) |
33 | { | 32 | { |
34 | u32 gpio = nv_rd32(therm, 0x00d610 + (line * 0x04)); | 33 | u32 gpio = nv_rd32(therm, 0x00d610 + (line * 0x04)); |
35 | 34 | ||
@@ -53,7 +52,7 @@ pwm_info(struct nouveau_therm *therm, int line) | |||
53 | } | 52 | } |
54 | 53 | ||
55 | static int | 54 | static int |
56 | nvd0_fan_pwm_ctrl(struct nouveau_therm *therm, int line, bool enable) | 55 | gf110_fan_pwm_ctrl(struct nvkm_therm *therm, int line, bool enable) |
57 | { | 56 | { |
58 | u32 data = enable ? 0x00000040 : 0x00000000; | 57 | u32 data = enable ? 0x00000040 : 0x00000000; |
59 | int indx = pwm_info(therm, line); | 58 | int indx = pwm_info(therm, line); |
@@ -66,7 +65,7 @@ nvd0_fan_pwm_ctrl(struct nouveau_therm *therm, int line, bool enable) | |||
66 | } | 65 | } |
67 | 66 | ||
68 | static int | 67 | static int |
69 | nvd0_fan_pwm_get(struct nouveau_therm *therm, int line, u32 *divs, u32 *duty) | 68 | gf110_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty) |
70 | { | 69 | { |
71 | int indx = pwm_info(therm, line); | 70 | int indx = pwm_info(therm, line); |
72 | if (indx < 0) | 71 | if (indx < 0) |
@@ -87,7 +86,7 @@ nvd0_fan_pwm_get(struct nouveau_therm *therm, int line, u32 *divs, u32 *duty) | |||
87 | } | 86 | } |
88 | 87 | ||
89 | static int | 88 | static int |
90 | nvd0_fan_pwm_set(struct nouveau_therm *therm, int line, u32 divs, u32 duty) | 89 | gf110_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty) |
91 | { | 90 | { |
92 | int indx = pwm_info(therm, line); | 91 | int indx = pwm_info(therm, line); |
93 | if (indx < 0) | 92 | if (indx < 0) |
@@ -103,7 +102,7 @@ nvd0_fan_pwm_set(struct nouveau_therm *therm, int line, u32 divs, u32 duty) | |||
103 | } | 102 | } |
104 | 103 | ||
105 | static int | 104 | static int |
106 | nvd0_fan_pwm_clock(struct nouveau_therm *therm, int line) | 105 | gf110_fan_pwm_clock(struct nvkm_therm *therm, int line) |
107 | { | 106 | { |
108 | int indx = pwm_info(therm, line); | 107 | int indx = pwm_info(therm, line); |
109 | if (indx < 0) | 108 | if (indx < 0) |
@@ -115,12 +114,12 @@ nvd0_fan_pwm_clock(struct nouveau_therm *therm, int line) | |||
115 | } | 114 | } |
116 | 115 | ||
117 | int | 116 | int |
118 | nvd0_therm_init(struct nouveau_object *object) | 117 | gf110_therm_init(struct nvkm_object *object) |
119 | { | 118 | { |
120 | struct nvd0_therm_priv *priv = (void *)object; | 119 | struct gf110_therm_priv *priv = (void *)object; |
121 | int ret; | 120 | int ret; |
122 | 121 | ||
123 | ret = nouveau_therm_init(&priv->base.base); | 122 | ret = nvkm_therm_init(&priv->base.base); |
124 | if (ret) | 123 | if (ret) |
125 | return ret; | 124 | return ret; |
126 | 125 | ||
@@ -137,38 +136,37 @@ nvd0_therm_init(struct nouveau_object *object) | |||
137 | } | 136 | } |
138 | 137 | ||
139 | static int | 138 | static int |
140 | nvd0_therm_ctor(struct nouveau_object *parent, | 139 | gf110_therm_ctor(struct nvkm_object *parent, struct nvkm_object *engine, |
141 | struct nouveau_object *engine, | 140 | struct nvkm_oclass *oclass, void *data, u32 size, |
142 | struct nouveau_oclass *oclass, void *data, u32 size, | 141 | struct nvkm_object **pobject) |
143 | struct nouveau_object **pobject) | ||
144 | { | 142 | { |
145 | struct nvd0_therm_priv *priv; | 143 | struct gf110_therm_priv *priv; |
146 | int ret; | 144 | int ret; |
147 | 145 | ||
148 | ret = nouveau_therm_create(parent, engine, oclass, &priv); | 146 | ret = nvkm_therm_create(parent, engine, oclass, &priv); |
149 | *pobject = nv_object(priv); | 147 | *pobject = nv_object(priv); |
150 | if (ret) | 148 | if (ret) |
151 | return ret; | 149 | return ret; |
152 | 150 | ||
153 | nv84_sensor_setup(&priv->base.base); | 151 | g84_sensor_setup(&priv->base.base); |
154 | 152 | ||
155 | priv->base.base.pwm_ctrl = nvd0_fan_pwm_ctrl; | 153 | priv->base.base.pwm_ctrl = gf110_fan_pwm_ctrl; |
156 | priv->base.base.pwm_get = nvd0_fan_pwm_get; | 154 | priv->base.base.pwm_get = gf110_fan_pwm_get; |
157 | priv->base.base.pwm_set = nvd0_fan_pwm_set; | 155 | priv->base.base.pwm_set = gf110_fan_pwm_set; |
158 | priv->base.base.pwm_clock = nvd0_fan_pwm_clock; | 156 | priv->base.base.pwm_clock = gf110_fan_pwm_clock; |
159 | priv->base.base.temp_get = nv84_temp_get; | 157 | priv->base.base.temp_get = g84_temp_get; |
160 | priv->base.base.fan_sense = nva3_therm_fan_sense; | 158 | priv->base.base.fan_sense = gt215_therm_fan_sense; |
161 | priv->base.sensor.program_alarms = nouveau_therm_program_alarms_polling; | 159 | priv->base.sensor.program_alarms = nvkm_therm_program_alarms_polling; |
162 | return nouveau_therm_preinit(&priv->base.base); | 160 | return nvkm_therm_preinit(&priv->base.base); |
163 | } | 161 | } |
164 | 162 | ||
165 | struct nouveau_oclass | 163 | struct nvkm_oclass |
166 | nvd0_therm_oclass = { | 164 | gf110_therm_oclass = { |
167 | .handle = NV_SUBDEV(THERM, 0xd0), | 165 | .handle = NV_SUBDEV(THERM, 0xd0), |
168 | .ofuncs = &(struct nouveau_ofuncs) { | 166 | .ofuncs = &(struct nvkm_ofuncs) { |
169 | .ctor = nvd0_therm_ctor, | 167 | .ctor = gf110_therm_ctor, |
170 | .dtor = _nouveau_therm_dtor, | 168 | .dtor = _nvkm_therm_dtor, |
171 | .init = nvd0_therm_init, | 169 | .init = gf110_therm_init, |
172 | .fini = nv84_therm_fini, | 170 | .fini = g84_therm_fini, |
173 | }, | 171 | }, |
174 | }; | 172 | }; |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gm107.c b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gm107.c index 668cf3322285..c1f3cf361837 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gm107.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gm107.c | |||
@@ -21,22 +21,21 @@ | |||
21 | * | 21 | * |
22 | * Authors: Martin Peres | 22 | * Authors: Martin Peres |
23 | */ | 23 | */ |
24 | |||
25 | #include "priv.h" | 24 | #include "priv.h" |
26 | 25 | ||
27 | struct gm107_therm_priv { | 26 | struct gm107_therm_priv { |
28 | struct nouveau_therm_priv base; | 27 | struct nvkm_therm_priv base; |
29 | }; | 28 | }; |
30 | 29 | ||
31 | static int | 30 | static int |
32 | gm107_fan_pwm_ctrl(struct nouveau_therm *therm, int line, bool enable) | 31 | gm107_fan_pwm_ctrl(struct nvkm_therm *therm, int line, bool enable) |
33 | { | 32 | { |
34 | /* nothing to do, it seems hardwired */ | 33 | /* nothing to do, it seems hardwired */ |
35 | return 0; | 34 | return 0; |
36 | } | 35 | } |
37 | 36 | ||
38 | static int | 37 | static int |
39 | gm107_fan_pwm_get(struct nouveau_therm *therm, int line, u32 *divs, u32 *duty) | 38 | gm107_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty) |
40 | { | 39 | { |
41 | *divs = nv_rd32(therm, 0x10eb20) & 0x1fff; | 40 | *divs = nv_rd32(therm, 0x10eb20) & 0x1fff; |
42 | *duty = nv_rd32(therm, 0x10eb24) & 0x1fff; | 41 | *duty = nv_rd32(therm, 0x10eb24) & 0x1fff; |
@@ -44,7 +43,7 @@ gm107_fan_pwm_get(struct nouveau_therm *therm, int line, u32 *divs, u32 *duty) | |||
44 | } | 43 | } |
45 | 44 | ||
46 | static int | 45 | static int |
47 | gm107_fan_pwm_set(struct nouveau_therm *therm, int line, u32 divs, u32 duty) | 46 | gm107_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty) |
48 | { | 47 | { |
49 | nv_mask(therm, 0x10eb10, 0x1fff, divs); /* keep the high bits */ | 48 | nv_mask(therm, 0x10eb10, 0x1fff, divs); /* keep the high bits */ |
50 | nv_wr32(therm, 0x10eb14, duty | 0x80000000); | 49 | nv_wr32(therm, 0x10eb14, duty | 0x80000000); |
@@ -52,21 +51,20 @@ gm107_fan_pwm_set(struct nouveau_therm *therm, int line, u32 divs, u32 duty) | |||
52 | } | 51 | } |
53 | 52 | ||
54 | static int | 53 | static int |
55 | gm107_fan_pwm_clock(struct nouveau_therm *therm, int line) | 54 | gm107_fan_pwm_clock(struct nvkm_therm *therm, int line) |
56 | { | 55 | { |
57 | return nv_device(therm)->crystal * 1000; | 56 | return nv_device(therm)->crystal * 1000; |
58 | } | 57 | } |
59 | 58 | ||
60 | static int | 59 | static int |
61 | gm107_therm_ctor(struct nouveau_object *parent, | 60 | gm107_therm_ctor(struct nvkm_object *parent, struct nvkm_object *engine, |
62 | struct nouveau_object *engine, | 61 | struct nvkm_oclass *oclass, void *data, u32 size, |
63 | struct nouveau_oclass *oclass, void *data, u32 size, | 62 | struct nvkm_object **pobject) |
64 | struct nouveau_object **pobject) | ||
65 | { | 63 | { |
66 | struct gm107_therm_priv *priv; | 64 | struct gm107_therm_priv *priv; |
67 | int ret; | 65 | int ret; |
68 | 66 | ||
69 | ret = nouveau_therm_create(parent, engine, oclass, &priv); | 67 | ret = nvkm_therm_create(parent, engine, oclass, &priv); |
70 | *pobject = nv_object(priv); | 68 | *pobject = nv_object(priv); |
71 | if (ret) | 69 | if (ret) |
72 | return ret; | 70 | return ret; |
@@ -75,19 +73,19 @@ gm107_therm_ctor(struct nouveau_object *parent, | |||
75 | priv->base.base.pwm_get = gm107_fan_pwm_get; | 73 | priv->base.base.pwm_get = gm107_fan_pwm_get; |
76 | priv->base.base.pwm_set = gm107_fan_pwm_set; | 74 | priv->base.base.pwm_set = gm107_fan_pwm_set; |
77 | priv->base.base.pwm_clock = gm107_fan_pwm_clock; | 75 | priv->base.base.pwm_clock = gm107_fan_pwm_clock; |
78 | priv->base.base.temp_get = nv84_temp_get; | 76 | priv->base.base.temp_get = g84_temp_get; |
79 | priv->base.base.fan_sense = nva3_therm_fan_sense; | 77 | priv->base.base.fan_sense = gt215_therm_fan_sense; |
80 | priv->base.sensor.program_alarms = nouveau_therm_program_alarms_polling; | 78 | priv->base.sensor.program_alarms = nvkm_therm_program_alarms_polling; |
81 | return nouveau_therm_preinit(&priv->base.base); | 79 | return nvkm_therm_preinit(&priv->base.base); |
82 | } | 80 | } |
83 | 81 | ||
84 | struct nouveau_oclass | 82 | struct nvkm_oclass |
85 | gm107_therm_oclass = { | 83 | gm107_therm_oclass = { |
86 | .handle = NV_SUBDEV(THERM, 0x117), | 84 | .handle = NV_SUBDEV(THERM, 0x117), |
87 | .ofuncs = &(struct nouveau_ofuncs) { | 85 | .ofuncs = &(struct nvkm_ofuncs) { |
88 | .ctor = gm107_therm_ctor, | 86 | .ctor = gm107_therm_ctor, |
89 | .dtor = _nouveau_therm_dtor, | 87 | .dtor = _nvkm_therm_dtor, |
90 | .init = nvd0_therm_init, | 88 | .init = gf110_therm_init, |
91 | .fini = nv84_therm_fini, | 89 | .fini = g84_therm_fini, |
92 | }, | 90 | }, |
93 | }; | 91 | }; |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/nva3.c b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gt215.c index 7893357a7e9f..b7fa4716ca9f 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/nva3.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gt215.c | |||
@@ -21,17 +21,16 @@ | |||
21 | * | 21 | * |
22 | * Authors: Ben Skeggs | 22 | * Authors: Ben Skeggs |
23 | */ | 23 | */ |
24 | #include "priv.h" | ||
24 | 25 | ||
25 | #include <subdev/gpio.h> | 26 | #include <subdev/gpio.h> |
26 | 27 | ||
27 | #include "priv.h" | 28 | struct gt215_therm_priv { |
28 | 29 | struct nvkm_therm_priv base; | |
29 | struct nva3_therm_priv { | ||
30 | struct nouveau_therm_priv base; | ||
31 | }; | 30 | }; |
32 | 31 | ||
33 | int | 32 | int |
34 | nva3_therm_fan_sense(struct nouveau_therm *therm) | 33 | gt215_therm_fan_sense(struct nvkm_therm *therm) |
35 | { | 34 | { |
36 | u32 tach = nv_rd32(therm, 0x00e728) & 0x0000ffff; | 35 | u32 tach = nv_rd32(therm, 0x00e728) & 0x0000ffff; |
37 | u32 ctrl = nv_rd32(therm, 0x00e720); | 36 | u32 ctrl = nv_rd32(therm, 0x00e720); |
@@ -41,17 +40,17 @@ nva3_therm_fan_sense(struct nouveau_therm *therm) | |||
41 | } | 40 | } |
42 | 41 | ||
43 | static int | 42 | static int |
44 | nva3_therm_init(struct nouveau_object *object) | 43 | gt215_therm_init(struct nvkm_object *object) |
45 | { | 44 | { |
46 | struct nva3_therm_priv *priv = (void *)object; | 45 | struct gt215_therm_priv *priv = (void *)object; |
47 | struct dcb_gpio_func *tach = &priv->base.fan->tach; | 46 | struct dcb_gpio_func *tach = &priv->base.fan->tach; |
48 | int ret; | 47 | int ret; |
49 | 48 | ||
50 | ret = nouveau_therm_init(&priv->base.base); | 49 | ret = nvkm_therm_init(&priv->base.base); |
51 | if (ret) | 50 | if (ret) |
52 | return ret; | 51 | return ret; |
53 | 52 | ||
54 | nv84_sensor_setup(&priv->base.base); | 53 | g84_sensor_setup(&priv->base.base); |
55 | 54 | ||
56 | /* enable fan tach, count revolutions per-second */ | 55 | /* enable fan tach, count revolutions per-second */ |
57 | nv_mask(priv, 0x00e720, 0x00000003, 0x00000002); | 56 | nv_mask(priv, 0x00e720, 0x00000003, 0x00000002); |
@@ -66,15 +65,14 @@ nva3_therm_init(struct nouveau_object *object) | |||
66 | } | 65 | } |
67 | 66 | ||
68 | static int | 67 | static int |
69 | nva3_therm_ctor(struct nouveau_object *parent, | 68 | gt215_therm_ctor(struct nvkm_object *parent, struct nvkm_object *engine, |
70 | struct nouveau_object *engine, | 69 | struct nvkm_oclass *oclass, void *data, u32 size, |
71 | struct nouveau_oclass *oclass, void *data, u32 size, | 70 | struct nvkm_object **pobject) |
72 | struct nouveau_object **pobject) | ||
73 | { | 71 | { |
74 | struct nva3_therm_priv *priv; | 72 | struct gt215_therm_priv *priv; |
75 | int ret; | 73 | int ret; |
76 | 74 | ||
77 | ret = nouveau_therm_create(parent, engine, oclass, &priv); | 75 | ret = nvkm_therm_create(parent, engine, oclass, &priv); |
78 | *pobject = nv_object(priv); | 76 | *pobject = nv_object(priv); |
79 | if (ret) | 77 | if (ret) |
80 | return ret; | 78 | return ret; |
@@ -83,19 +81,19 @@ nva3_therm_ctor(struct nouveau_object *parent, | |||
83 | priv->base.base.pwm_get = nv50_fan_pwm_get; | 81 | priv->base.base.pwm_get = nv50_fan_pwm_get; |
84 | priv->base.base.pwm_set = nv50_fan_pwm_set; | 82 | priv->base.base.pwm_set = nv50_fan_pwm_set; |
85 | priv->base.base.pwm_clock = nv50_fan_pwm_clock; | 83 | priv->base.base.pwm_clock = nv50_fan_pwm_clock; |
86 | priv->base.base.temp_get = nv84_temp_get; | 84 | priv->base.base.temp_get = g84_temp_get; |
87 | priv->base.base.fan_sense = nva3_therm_fan_sense; | 85 | priv->base.base.fan_sense = gt215_therm_fan_sense; |
88 | priv->base.sensor.program_alarms = nouveau_therm_program_alarms_polling; | 86 | priv->base.sensor.program_alarms = nvkm_therm_program_alarms_polling; |
89 | return nouveau_therm_preinit(&priv->base.base); | 87 | return nvkm_therm_preinit(&priv->base.base); |
90 | } | 88 | } |
91 | 89 | ||
92 | struct nouveau_oclass | 90 | struct nvkm_oclass |
93 | nva3_therm_oclass = { | 91 | gt215_therm_oclass = { |
94 | .handle = NV_SUBDEV(THERM, 0xa3), | 92 | .handle = NV_SUBDEV(THERM, 0xa3), |
95 | .ofuncs = &(struct nouveau_ofuncs) { | 93 | .ofuncs = &(struct nvkm_ofuncs) { |
96 | .ctor = nva3_therm_ctor, | 94 | .ctor = gt215_therm_ctor, |
97 | .dtor = _nouveau_therm_dtor, | 95 | .dtor = _nvkm_therm_dtor, |
98 | .init = nva3_therm_init, | 96 | .init = gt215_therm_init, |
99 | .fini = nv84_therm_fini, | 97 | .fini = g84_therm_fini, |
100 | }, | 98 | }, |
101 | }; | 99 | }; |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/ic.c b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/ic.c index ca9ad9fd47be..09fc4605e853 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/ic.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/ic.c | |||
@@ -21,17 +21,16 @@ | |||
21 | * | 21 | * |
22 | * Authors: Martin Peres | 22 | * Authors: Martin Peres |
23 | */ | 23 | */ |
24 | |||
25 | #include "priv.h" | 24 | #include "priv.h" |
26 | 25 | ||
27 | #include <subdev/i2c.h> | ||
28 | #include <subdev/bios/extdev.h> | 26 | #include <subdev/bios/extdev.h> |
27 | #include <subdev/i2c.h> | ||
29 | 28 | ||
30 | static bool | 29 | static bool |
31 | probe_monitoring_device(struct nouveau_i2c_port *i2c, | 30 | probe_monitoring_device(struct nvkm_i2c_port *i2c, |
32 | struct i2c_board_info *info, void *data) | 31 | struct i2c_board_info *info, void *data) |
33 | { | 32 | { |
34 | struct nouveau_therm_priv *priv = data; | 33 | struct nvkm_therm_priv *priv = data; |
35 | struct nvbios_therm_sensor *sensor = &priv->bios_sensor; | 34 | struct nvbios_therm_sensor *sensor = &priv->bios_sensor; |
36 | struct i2c_client *client; | 35 | struct i2c_client *client; |
37 | 36 | ||
@@ -52,11 +51,10 @@ probe_monitoring_device(struct nouveau_i2c_port *i2c, | |||
52 | "temp offset %+i C)\n", | 51 | "temp offset %+i C)\n", |
53 | info->type, info->addr, sensor->offset_constant); | 52 | info->type, info->addr, sensor->offset_constant); |
54 | priv->ic = client; | 53 | priv->ic = client; |
55 | |||
56 | return true; | 54 | return true; |
57 | } | 55 | } |
58 | 56 | ||
59 | static struct nouveau_i2c_board_info | 57 | static struct nvkm_i2c_board_info |
60 | nv_board_infos[] = { | 58 | nv_board_infos[] = { |
61 | { { I2C_BOARD_INFO("w83l785ts", 0x2d) }, 0 }, | 59 | { { I2C_BOARD_INFO("w83l785ts", 0x2d) }, 0 }, |
62 | { { I2C_BOARD_INFO("w83781d", 0x2d) }, 0 }, | 60 | { { I2C_BOARD_INFO("w83781d", 0x2d) }, 0 }, |
@@ -82,15 +80,15 @@ nv_board_infos[] = { | |||
82 | }; | 80 | }; |
83 | 81 | ||
84 | void | 82 | void |
85 | nouveau_therm_ic_ctor(struct nouveau_therm *therm) | 83 | nvkm_therm_ic_ctor(struct nvkm_therm *therm) |
86 | { | 84 | { |
87 | struct nouveau_therm_priv *priv = (void *)therm; | 85 | struct nvkm_therm_priv *priv = (void *)therm; |
88 | struct nouveau_bios *bios = nouveau_bios(therm); | 86 | struct nvkm_bios *bios = nvkm_bios(therm); |
89 | struct nouveau_i2c *i2c = nouveau_i2c(therm); | 87 | struct nvkm_i2c *i2c = nvkm_i2c(therm); |
90 | struct nvbios_extdev_func extdev_entry; | 88 | struct nvbios_extdev_func extdev_entry; |
91 | 89 | ||
92 | if (!nvbios_extdev_find(bios, NVBIOS_EXTDEV_LM89, &extdev_entry)) { | 90 | if (!nvbios_extdev_find(bios, NVBIOS_EXTDEV_LM89, &extdev_entry)) { |
93 | struct nouveau_i2c_board_info board[] = { | 91 | struct nvkm_i2c_board_info board[] = { |
94 | { { I2C_BOARD_INFO("lm90", extdev_entry.addr >> 1) }, 0}, | 92 | { { I2C_BOARD_INFO("lm90", extdev_entry.addr >> 1) }, 0}, |
95 | { } | 93 | { } |
96 | }; | 94 | }; |
@@ -102,7 +100,7 @@ nouveau_therm_ic_ctor(struct nouveau_therm *therm) | |||
102 | } | 100 | } |
103 | 101 | ||
104 | if (!nvbios_extdev_find(bios, NVBIOS_EXTDEV_ADT7473, &extdev_entry)) { | 102 | if (!nvbios_extdev_find(bios, NVBIOS_EXTDEV_ADT7473, &extdev_entry)) { |
105 | struct nouveau_i2c_board_info board[] = { | 103 | struct nvkm_i2c_board_info board[] = { |
106 | { { I2C_BOARD_INFO("adt7473", extdev_entry.addr >> 1) }, 20 }, | 104 | { { I2C_BOARD_INFO("adt7473", extdev_entry.addr >> 1) }, 20 }, |
107 | { } | 105 | { } |
108 | }; | 106 | }; |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv40.c b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv40.c index 002e51b3af93..20f65fd7679a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv40.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv40.c | |||
@@ -22,19 +22,18 @@ | |||
22 | * Authors: Ben Skeggs | 22 | * Authors: Ben Skeggs |
23 | * Martin Peres | 23 | * Martin Peres |
24 | */ | 24 | */ |
25 | |||
26 | #include "priv.h" | 25 | #include "priv.h" |
27 | 26 | ||
28 | struct nv40_therm_priv { | 27 | struct nv40_therm_priv { |
29 | struct nouveau_therm_priv base; | 28 | struct nvkm_therm_priv base; |
30 | }; | 29 | }; |
31 | 30 | ||
32 | enum nv40_sensor_style { INVALID_STYLE = -1, OLD_STYLE = 0, NEW_STYLE = 1 }; | 31 | enum nv40_sensor_style { INVALID_STYLE = -1, OLD_STYLE = 0, NEW_STYLE = 1 }; |
33 | 32 | ||
34 | static enum nv40_sensor_style | 33 | static enum nv40_sensor_style |
35 | nv40_sensor_style(struct nouveau_therm *therm) | 34 | nv40_sensor_style(struct nvkm_therm *therm) |
36 | { | 35 | { |
37 | struct nouveau_device *device = nv_device(therm); | 36 | struct nvkm_device *device = nv_device(therm); |
38 | 37 | ||
39 | switch (device->chipset) { | 38 | switch (device->chipset) { |
40 | case 0x43: | 39 | case 0x43: |
@@ -58,7 +57,7 @@ nv40_sensor_style(struct nouveau_therm *therm) | |||
58 | } | 57 | } |
59 | 58 | ||
60 | static int | 59 | static int |
61 | nv40_sensor_setup(struct nouveau_therm *therm) | 60 | nv40_sensor_setup(struct nvkm_therm *therm) |
62 | { | 61 | { |
63 | enum nv40_sensor_style style = nv40_sensor_style(therm); | 62 | enum nv40_sensor_style style = nv40_sensor_style(therm); |
64 | 63 | ||
@@ -77,9 +76,9 @@ nv40_sensor_setup(struct nouveau_therm *therm) | |||
77 | } | 76 | } |
78 | 77 | ||
79 | static int | 78 | static int |
80 | nv40_temp_get(struct nouveau_therm *therm) | 79 | nv40_temp_get(struct nvkm_therm *therm) |
81 | { | 80 | { |
82 | struct nouveau_therm_priv *priv = (void *)therm; | 81 | struct nvkm_therm_priv *priv = (void *)therm; |
83 | struct nvbios_therm_sensor *sensor = &priv->bios_sensor; | 82 | struct nvbios_therm_sensor *sensor = &priv->bios_sensor; |
84 | enum nv40_sensor_style style = nv40_sensor_style(therm); | 83 | enum nv40_sensor_style style = nv40_sensor_style(therm); |
85 | int core_temp; | 84 | int core_temp; |
@@ -110,7 +109,7 @@ nv40_temp_get(struct nouveau_therm *therm) | |||
110 | } | 109 | } |
111 | 110 | ||
112 | static int | 111 | static int |
113 | nv40_fan_pwm_ctrl(struct nouveau_therm *therm, int line, bool enable) | 112 | nv40_fan_pwm_ctrl(struct nvkm_therm *therm, int line, bool enable) |
114 | { | 113 | { |
115 | u32 mask = enable ? 0x80000000 : 0x0000000; | 114 | u32 mask = enable ? 0x80000000 : 0x0000000; |
116 | if (line == 2) nv_mask(therm, 0x0010f0, 0x80000000, mask); | 115 | if (line == 2) nv_mask(therm, 0x0010f0, 0x80000000, mask); |
@@ -123,7 +122,7 @@ nv40_fan_pwm_ctrl(struct nouveau_therm *therm, int line, bool enable) | |||
123 | } | 122 | } |
124 | 123 | ||
125 | static int | 124 | static int |
126 | nv40_fan_pwm_get(struct nouveau_therm *therm, int line, u32 *divs, u32 *duty) | 125 | nv40_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty) |
127 | { | 126 | { |
128 | if (line == 2) { | 127 | if (line == 2) { |
129 | u32 reg = nv_rd32(therm, 0x0010f0); | 128 | u32 reg = nv_rd32(therm, 0x0010f0); |
@@ -149,7 +148,7 @@ nv40_fan_pwm_get(struct nouveau_therm *therm, int line, u32 *divs, u32 *duty) | |||
149 | } | 148 | } |
150 | 149 | ||
151 | static int | 150 | static int |
152 | nv40_fan_pwm_set(struct nouveau_therm *therm, int line, u32 divs, u32 duty) | 151 | nv40_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty) |
153 | { | 152 | { |
154 | if (line == 2) { | 153 | if (line == 2) { |
155 | nv_mask(therm, 0x0010f0, 0x7fff7fff, (duty << 16) | divs); | 154 | nv_mask(therm, 0x0010f0, 0x7fff7fff, (duty << 16) | divs); |
@@ -166,9 +165,9 @@ nv40_fan_pwm_set(struct nouveau_therm *therm, int line, u32 divs, u32 duty) | |||
166 | } | 165 | } |
167 | 166 | ||
168 | void | 167 | void |
169 | nv40_therm_intr(struct nouveau_subdev *subdev) | 168 | nv40_therm_intr(struct nvkm_subdev *subdev) |
170 | { | 169 | { |
171 | struct nouveau_therm *therm = nouveau_therm(subdev); | 170 | struct nvkm_therm *therm = nvkm_therm(subdev); |
172 | uint32_t stat = nv_rd32(therm, 0x1100); | 171 | uint32_t stat = nv_rd32(therm, 0x1100); |
173 | 172 | ||
174 | /* traitement */ | 173 | /* traitement */ |
@@ -180,15 +179,15 @@ nv40_therm_intr(struct nouveau_subdev *subdev) | |||
180 | } | 179 | } |
181 | 180 | ||
182 | static int | 181 | static int |
183 | nv40_therm_ctor(struct nouveau_object *parent, | 182 | nv40_therm_ctor(struct nvkm_object *parent, |
184 | struct nouveau_object *engine, | 183 | struct nvkm_object *engine, |
185 | struct nouveau_oclass *oclass, void *data, u32 size, | 184 | struct nvkm_oclass *oclass, void *data, u32 size, |
186 | struct nouveau_object **pobject) | 185 | struct nvkm_object **pobject) |
187 | { | 186 | { |
188 | struct nv40_therm_priv *priv; | 187 | struct nv40_therm_priv *priv; |
189 | int ret; | 188 | int ret; |
190 | 189 | ||
191 | ret = nouveau_therm_create(parent, engine, oclass, &priv); | 190 | ret = nvkm_therm_create(parent, engine, oclass, &priv); |
192 | *pobject = nv_object(priv); | 191 | *pobject = nv_object(priv); |
193 | if (ret) | 192 | if (ret) |
194 | return ret; | 193 | return ret; |
@@ -197,28 +196,28 @@ nv40_therm_ctor(struct nouveau_object *parent, | |||
197 | priv->base.base.pwm_get = nv40_fan_pwm_get; | 196 | priv->base.base.pwm_get = nv40_fan_pwm_get; |
198 | priv->base.base.pwm_set = nv40_fan_pwm_set; | 197 | priv->base.base.pwm_set = nv40_fan_pwm_set; |
199 | priv->base.base.temp_get = nv40_temp_get; | 198 | priv->base.base.temp_get = nv40_temp_get; |
200 | priv->base.sensor.program_alarms = nouveau_therm_program_alarms_polling; | 199 | priv->base.sensor.program_alarms = nvkm_therm_program_alarms_polling; |
201 | nv_subdev(priv)->intr = nv40_therm_intr; | 200 | nv_subdev(priv)->intr = nv40_therm_intr; |
202 | return nouveau_therm_preinit(&priv->base.base); | 201 | return nvkm_therm_preinit(&priv->base.base); |
203 | } | 202 | } |
204 | 203 | ||
205 | static int | 204 | static int |
206 | nv40_therm_init(struct nouveau_object *object) | 205 | nv40_therm_init(struct nvkm_object *object) |
207 | { | 206 | { |
208 | struct nouveau_therm *therm = (void *)object; | 207 | struct nvkm_therm *therm = (void *)object; |
209 | 208 | ||
210 | nv40_sensor_setup(therm); | 209 | nv40_sensor_setup(therm); |
211 | 210 | ||
212 | return _nouveau_therm_init(object); | 211 | return _nvkm_therm_init(object); |
213 | } | 212 | } |
214 | 213 | ||
215 | struct nouveau_oclass | 214 | struct nvkm_oclass |
216 | nv40_therm_oclass = { | 215 | nv40_therm_oclass = { |
217 | .handle = NV_SUBDEV(THERM, 0x40), | 216 | .handle = NV_SUBDEV(THERM, 0x40), |
218 | .ofuncs = &(struct nouveau_ofuncs) { | 217 | .ofuncs = &(struct nvkm_ofuncs) { |
219 | .ctor = nv40_therm_ctor, | 218 | .ctor = nv40_therm_ctor, |
220 | .dtor = _nouveau_therm_dtor, | 219 | .dtor = _nvkm_therm_dtor, |
221 | .init = nv40_therm_init, | 220 | .init = nv40_therm_init, |
222 | .fini = _nouveau_therm_fini, | 221 | .fini = _nvkm_therm_fini, |
223 | }, | 222 | }, |
224 | }; | 223 | }; |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv50.c b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv50.c index 321db927d638..489dcf355d34 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv50.c | |||
@@ -22,15 +22,14 @@ | |||
22 | * Authors: Ben Skeggs | 22 | * Authors: Ben Skeggs |
23 | * Martin Peres | 23 | * Martin Peres |
24 | */ | 24 | */ |
25 | |||
26 | #include "priv.h" | 25 | #include "priv.h" |
27 | 26 | ||
28 | struct nv50_therm_priv { | 27 | struct nv50_therm_priv { |
29 | struct nouveau_therm_priv base; | 28 | struct nvkm_therm_priv base; |
30 | }; | 29 | }; |
31 | 30 | ||
32 | static int | 31 | static int |
33 | pwm_info(struct nouveau_therm *therm, int *line, int *ctrl, int *indx) | 32 | pwm_info(struct nvkm_therm *therm, int *line, int *ctrl, int *indx) |
34 | { | 33 | { |
35 | if (*line == 0x04) { | 34 | if (*line == 0x04) { |
36 | *ctrl = 0x00e100; | 35 | *ctrl = 0x00e100; |
@@ -55,7 +54,7 @@ pwm_info(struct nouveau_therm *therm, int *line, int *ctrl, int *indx) | |||
55 | } | 54 | } |
56 | 55 | ||
57 | int | 56 | int |
58 | nv50_fan_pwm_ctrl(struct nouveau_therm *therm, int line, bool enable) | 57 | nv50_fan_pwm_ctrl(struct nvkm_therm *therm, int line, bool enable) |
59 | { | 58 | { |
60 | u32 data = enable ? 0x00000001 : 0x00000000; | 59 | u32 data = enable ? 0x00000001 : 0x00000000; |
61 | int ctrl, id, ret = pwm_info(therm, &line, &ctrl, &id); | 60 | int ctrl, id, ret = pwm_info(therm, &line, &ctrl, &id); |
@@ -65,7 +64,7 @@ nv50_fan_pwm_ctrl(struct nouveau_therm *therm, int line, bool enable) | |||
65 | } | 64 | } |
66 | 65 | ||
67 | int | 66 | int |
68 | nv50_fan_pwm_get(struct nouveau_therm *therm, int line, u32 *divs, u32 *duty) | 67 | nv50_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty) |
69 | { | 68 | { |
70 | int ctrl, id, ret = pwm_info(therm, &line, &ctrl, &id); | 69 | int ctrl, id, ret = pwm_info(therm, &line, &ctrl, &id); |
71 | if (ret) | 70 | if (ret) |
@@ -81,7 +80,7 @@ nv50_fan_pwm_get(struct nouveau_therm *therm, int line, u32 *divs, u32 *duty) | |||
81 | } | 80 | } |
82 | 81 | ||
83 | int | 82 | int |
84 | nv50_fan_pwm_set(struct nouveau_therm *therm, int line, u32 divs, u32 duty) | 83 | nv50_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty) |
85 | { | 84 | { |
86 | int ctrl, id, ret = pwm_info(therm, &line, &ctrl, &id); | 85 | int ctrl, id, ret = pwm_info(therm, &line, &ctrl, &id); |
87 | if (ret) | 86 | if (ret) |
@@ -93,7 +92,7 @@ nv50_fan_pwm_set(struct nouveau_therm *therm, int line, u32 divs, u32 duty) | |||
93 | } | 92 | } |
94 | 93 | ||
95 | int | 94 | int |
96 | nv50_fan_pwm_clock(struct nouveau_therm *therm, int line) | 95 | nv50_fan_pwm_clock(struct nvkm_therm *therm, int line) |
97 | { | 96 | { |
98 | int chipset = nv_device(therm)->chipset; | 97 | int chipset = nv_device(therm)->chipset; |
99 | int crystal = nv_device(therm)->crystal; | 98 | int crystal = nv_device(therm)->crystal; |
@@ -119,16 +118,16 @@ nv50_fan_pwm_clock(struct nouveau_therm *therm, int line) | |||
119 | } | 118 | } |
120 | 119 | ||
121 | static void | 120 | static void |
122 | nv50_sensor_setup(struct nouveau_therm *therm) | 121 | nv50_sensor_setup(struct nvkm_therm *therm) |
123 | { | 122 | { |
124 | nv_mask(therm, 0x20010, 0x40000000, 0x0); | 123 | nv_mask(therm, 0x20010, 0x40000000, 0x0); |
125 | mdelay(20); /* wait for the temperature to stabilize */ | 124 | mdelay(20); /* wait for the temperature to stabilize */ |
126 | } | 125 | } |
127 | 126 | ||
128 | static int | 127 | static int |
129 | nv50_temp_get(struct nouveau_therm *therm) | 128 | nv50_temp_get(struct nvkm_therm *therm) |
130 | { | 129 | { |
131 | struct nouveau_therm_priv *priv = (void *)therm; | 130 | struct nvkm_therm_priv *priv = (void *)therm; |
132 | struct nvbios_therm_sensor *sensor = &priv->bios_sensor; | 131 | struct nvbios_therm_sensor *sensor = &priv->bios_sensor; |
133 | int core_temp; | 132 | int core_temp; |
134 | 133 | ||
@@ -151,15 +150,15 @@ nv50_temp_get(struct nouveau_therm *therm) | |||
151 | } | 150 | } |
152 | 151 | ||
153 | static int | 152 | static int |
154 | nv50_therm_ctor(struct nouveau_object *parent, | 153 | nv50_therm_ctor(struct nvkm_object *parent, |
155 | struct nouveau_object *engine, | 154 | struct nvkm_object *engine, |
156 | struct nouveau_oclass *oclass, void *data, u32 size, | 155 | struct nvkm_oclass *oclass, void *data, u32 size, |
157 | struct nouveau_object **pobject) | 156 | struct nvkm_object **pobject) |
158 | { | 157 | { |
159 | struct nv50_therm_priv *priv; | 158 | struct nv50_therm_priv *priv; |
160 | int ret; | 159 | int ret; |
161 | 160 | ||
162 | ret = nouveau_therm_create(parent, engine, oclass, &priv); | 161 | ret = nvkm_therm_create(parent, engine, oclass, &priv); |
163 | *pobject = nv_object(priv); | 162 | *pobject = nv_object(priv); |
164 | if (ret) | 163 | if (ret) |
165 | return ret; | 164 | return ret; |
@@ -169,29 +168,29 @@ nv50_therm_ctor(struct nouveau_object *parent, | |||
169 | priv->base.base.pwm_set = nv50_fan_pwm_set; | 168 | priv->base.base.pwm_set = nv50_fan_pwm_set; |
170 | priv->base.base.pwm_clock = nv50_fan_pwm_clock; | 169 | priv->base.base.pwm_clock = nv50_fan_pwm_clock; |
171 | priv->base.base.temp_get = nv50_temp_get; | 170 | priv->base.base.temp_get = nv50_temp_get; |
172 | priv->base.sensor.program_alarms = nouveau_therm_program_alarms_polling; | 171 | priv->base.sensor.program_alarms = nvkm_therm_program_alarms_polling; |
173 | nv_subdev(priv)->intr = nv40_therm_intr; | 172 | nv_subdev(priv)->intr = nv40_therm_intr; |
174 | 173 | ||
175 | return nouveau_therm_preinit(&priv->base.base); | 174 | return nvkm_therm_preinit(&priv->base.base); |
176 | } | 175 | } |
177 | 176 | ||
178 | static int | 177 | static int |
179 | nv50_therm_init(struct nouveau_object *object) | 178 | nv50_therm_init(struct nvkm_object *object) |
180 | { | 179 | { |
181 | struct nouveau_therm *therm = (void *)object; | 180 | struct nvkm_therm *therm = (void *)object; |
182 | 181 | ||
183 | nv50_sensor_setup(therm); | 182 | nv50_sensor_setup(therm); |
184 | 183 | ||
185 | return _nouveau_therm_init(object); | 184 | return _nvkm_therm_init(object); |
186 | } | 185 | } |
187 | 186 | ||
188 | struct nouveau_oclass | 187 | struct nvkm_oclass |
189 | nv50_therm_oclass = { | 188 | nv50_therm_oclass = { |
190 | .handle = NV_SUBDEV(THERM, 0x50), | 189 | .handle = NV_SUBDEV(THERM, 0x50), |
191 | .ofuncs = &(struct nouveau_ofuncs) { | 190 | .ofuncs = &(struct nvkm_ofuncs) { |
192 | .ctor = nv50_therm_ctor, | 191 | .ctor = nv50_therm_ctor, |
193 | .dtor = _nouveau_therm_dtor, | 192 | .dtor = _nvkm_therm_dtor, |
194 | .init = nv50_therm_init, | 193 | .init = nv50_therm_init, |
195 | .fini = _nouveau_therm_fini, | 194 | .fini = _nvkm_therm_fini, |
196 | }, | 195 | }, |
197 | }; | 196 | }; |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/priv.h b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/priv.h index 8db630818793..916a149efe6e 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/priv.h +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/priv.h | |||
@@ -1,6 +1,5 @@ | |||
1 | #ifndef __NVTHERM_PRIV_H__ | 1 | #ifndef __NVTHERM_PRIV_H__ |
2 | #define __NVTHERM_PRIV_H__ | 2 | #define __NVTHERM_PRIV_H__ |
3 | |||
4 | /* | 3 | /* |
5 | * Copyright 2012 The Nouveau community | 4 | * Copyright 2012 The Nouveau community |
6 | * | 5 | * |
@@ -24,9 +23,7 @@ | |||
24 | * | 23 | * |
25 | * Authors: Martin Peres | 24 | * Authors: Martin Peres |
26 | */ | 25 | */ |
27 | |||
28 | #include <subdev/therm.h> | 26 | #include <subdev/therm.h> |
29 | |||
30 | #include <subdev/bios.h> | 27 | #include <subdev/bios.h> |
31 | #include <subdev/bios/extdev.h> | 28 | #include <subdev/bios/extdev.h> |
32 | #include <subdev/bios/gpio.h> | 29 | #include <subdev/bios/gpio.h> |
@@ -34,46 +31,46 @@ | |||
34 | #include <subdev/bios/therm.h> | 31 | #include <subdev/bios/therm.h> |
35 | #include <subdev/timer.h> | 32 | #include <subdev/timer.h> |
36 | 33 | ||
37 | struct nouveau_fan { | 34 | struct nvkm_fan { |
38 | struct nouveau_therm *parent; | 35 | struct nvkm_therm *parent; |
39 | const char *type; | 36 | const char *type; |
40 | 37 | ||
41 | struct nvbios_therm_fan bios; | 38 | struct nvbios_therm_fan bios; |
42 | struct nvbios_perf_fan perf; | 39 | struct nvbios_perf_fan perf; |
43 | 40 | ||
44 | struct nouveau_alarm alarm; | 41 | struct nvkm_alarm alarm; |
45 | spinlock_t lock; | 42 | spinlock_t lock; |
46 | int percent; | 43 | int percent; |
47 | 44 | ||
48 | int (*get)(struct nouveau_therm *therm); | 45 | int (*get)(struct nvkm_therm *); |
49 | int (*set)(struct nouveau_therm *therm, int percent); | 46 | int (*set)(struct nvkm_therm *, int percent); |
50 | 47 | ||
51 | struct dcb_gpio_func tach; | 48 | struct dcb_gpio_func tach; |
52 | }; | 49 | }; |
53 | 50 | ||
54 | enum nouveau_therm_thrs_direction { | 51 | enum nvkm_therm_thrs_direction { |
55 | NOUVEAU_THERM_THRS_FALLING = 0, | 52 | NVKM_THERM_THRS_FALLING = 0, |
56 | NOUVEAU_THERM_THRS_RISING = 1 | 53 | NVKM_THERM_THRS_RISING = 1 |
57 | }; | 54 | }; |
58 | 55 | ||
59 | enum nouveau_therm_thrs_state { | 56 | enum nvkm_therm_thrs_state { |
60 | NOUVEAU_THERM_THRS_LOWER = 0, | 57 | NVKM_THERM_THRS_LOWER = 0, |
61 | NOUVEAU_THERM_THRS_HIGHER = 1 | 58 | NVKM_THERM_THRS_HIGHER = 1 |
62 | }; | 59 | }; |
63 | 60 | ||
64 | enum nouveau_therm_thrs { | 61 | enum nvkm_therm_thrs { |
65 | NOUVEAU_THERM_THRS_FANBOOST = 0, | 62 | NVKM_THERM_THRS_FANBOOST = 0, |
66 | NOUVEAU_THERM_THRS_DOWNCLOCK = 1, | 63 | NVKM_THERM_THRS_DOWNCLOCK = 1, |
67 | NOUVEAU_THERM_THRS_CRITICAL = 2, | 64 | NVKM_THERM_THRS_CRITICAL = 2, |
68 | NOUVEAU_THERM_THRS_SHUTDOWN = 3, | 65 | NVKM_THERM_THRS_SHUTDOWN = 3, |
69 | NOUVEAU_THERM_THRS_NR | 66 | NVKM_THERM_THRS_NR |
70 | }; | 67 | }; |
71 | 68 | ||
72 | struct nouveau_therm_priv { | 69 | struct nvkm_therm_priv { |
73 | struct nouveau_therm base; | 70 | struct nvkm_therm base; |
74 | 71 | ||
75 | /* automatic thermal management */ | 72 | /* automatic thermal management */ |
76 | struct nouveau_alarm alarm; | 73 | struct nvkm_alarm alarm; |
77 | spinlock_t lock; | 74 | spinlock_t lock; |
78 | struct nvbios_therm_trip_point *last_trip; | 75 | struct nvbios_therm_trip_point *last_trip; |
79 | int mode; | 76 | int mode; |
@@ -84,77 +81,73 @@ struct nouveau_therm_priv { | |||
84 | struct nvbios_therm_sensor bios_sensor; | 81 | struct nvbios_therm_sensor bios_sensor; |
85 | 82 | ||
86 | /* fan priv */ | 83 | /* fan priv */ |
87 | struct nouveau_fan *fan; | 84 | struct nvkm_fan *fan; |
88 | 85 | ||
89 | /* alarms priv */ | 86 | /* alarms priv */ |
90 | struct { | 87 | struct { |
91 | spinlock_t alarm_program_lock; | 88 | spinlock_t alarm_program_lock; |
92 | struct nouveau_alarm therm_poll_alarm; | 89 | struct nvkm_alarm therm_poll_alarm; |
93 | enum nouveau_therm_thrs_state alarm_state[NOUVEAU_THERM_THRS_NR]; | 90 | enum nvkm_therm_thrs_state alarm_state[NVKM_THERM_THRS_NR]; |
94 | void (*program_alarms)(struct nouveau_therm *); | 91 | void (*program_alarms)(struct nvkm_therm *); |
95 | } sensor; | 92 | } sensor; |
96 | 93 | ||
97 | /* what should be done if the card overheats */ | 94 | /* what should be done if the card overheats */ |
98 | struct { | 95 | struct { |
99 | void (*downclock)(struct nouveau_therm *, bool active); | 96 | void (*downclock)(struct nvkm_therm *, bool active); |
100 | void (*pause)(struct nouveau_therm *, bool active); | 97 | void (*pause)(struct nvkm_therm *, bool active); |
101 | } emergency; | 98 | } emergency; |
102 | 99 | ||
103 | /* ic */ | 100 | /* ic */ |
104 | struct i2c_client *ic; | 101 | struct i2c_client *ic; |
105 | }; | 102 | }; |
106 | 103 | ||
107 | int nouveau_therm_fan_mode(struct nouveau_therm *therm, int mode); | 104 | int nvkm_therm_fan_mode(struct nvkm_therm *, int mode); |
108 | int nouveau_therm_attr_get(struct nouveau_therm *therm, | 105 | int nvkm_therm_attr_get(struct nvkm_therm *, enum nvkm_therm_attr_type); |
109 | enum nouveau_therm_attr_type type); | 106 | int nvkm_therm_attr_set(struct nvkm_therm *, enum nvkm_therm_attr_type, int); |
110 | int nouveau_therm_attr_set(struct nouveau_therm *therm, | 107 | |
111 | enum nouveau_therm_attr_type type, int value); | 108 | void nvkm_therm_ic_ctor(struct nvkm_therm *); |
112 | 109 | ||
113 | void nouveau_therm_ic_ctor(struct nouveau_therm *therm); | 110 | int nvkm_therm_sensor_ctor(struct nvkm_therm *); |
114 | 111 | ||
115 | int nouveau_therm_sensor_ctor(struct nouveau_therm *therm); | 112 | int nvkm_therm_fan_ctor(struct nvkm_therm *); |
116 | 113 | int nvkm_therm_fan_init(struct nvkm_therm *); | |
117 | int nouveau_therm_fan_ctor(struct nouveau_therm *therm); | 114 | int nvkm_therm_fan_fini(struct nvkm_therm *, bool suspend); |
118 | int nouveau_therm_fan_init(struct nouveau_therm *therm); | 115 | int nvkm_therm_fan_get(struct nvkm_therm *); |
119 | int nouveau_therm_fan_fini(struct nouveau_therm *therm, bool suspend); | 116 | int nvkm_therm_fan_set(struct nvkm_therm *, bool now, int percent); |
120 | int nouveau_therm_fan_get(struct nouveau_therm *therm); | 117 | int nvkm_therm_fan_user_get(struct nvkm_therm *); |
121 | int nouveau_therm_fan_set(struct nouveau_therm *therm, bool now, int percent); | 118 | int nvkm_therm_fan_user_set(struct nvkm_therm *, int percent); |
122 | int nouveau_therm_fan_user_get(struct nouveau_therm *therm); | 119 | |
123 | int nouveau_therm_fan_user_set(struct nouveau_therm *therm, int percent); | 120 | int nvkm_therm_fan_sense(struct nvkm_therm *); |
124 | 121 | ||
125 | int nouveau_therm_fan_sense(struct nouveau_therm *therm); | 122 | int nvkm_therm_preinit(struct nvkm_therm *); |
126 | 123 | ||
127 | int nouveau_therm_preinit(struct nouveau_therm *); | 124 | int nvkm_therm_sensor_init(struct nvkm_therm *); |
128 | 125 | int nvkm_therm_sensor_fini(struct nvkm_therm *, bool suspend); | |
129 | int nouveau_therm_sensor_init(struct nouveau_therm *therm); | 126 | void nvkm_therm_sensor_preinit(struct nvkm_therm *); |
130 | int nouveau_therm_sensor_fini(struct nouveau_therm *therm, bool suspend); | 127 | void nvkm_therm_sensor_set_threshold_state(struct nvkm_therm *, |
131 | void nouveau_therm_sensor_preinit(struct nouveau_therm *); | 128 | enum nvkm_therm_thrs, |
132 | void nouveau_therm_sensor_set_threshold_state(struct nouveau_therm *therm, | 129 | enum nvkm_therm_thrs_state); |
133 | enum nouveau_therm_thrs thrs, | 130 | enum nvkm_therm_thrs_state |
134 | enum nouveau_therm_thrs_state st); | 131 | nvkm_therm_sensor_get_threshold_state(struct nvkm_therm *, |
135 | enum nouveau_therm_thrs_state | 132 | enum nvkm_therm_thrs); |
136 | nouveau_therm_sensor_get_threshold_state(struct nouveau_therm *therm, | 133 | void nvkm_therm_sensor_event(struct nvkm_therm *, enum nvkm_therm_thrs, |
137 | enum nouveau_therm_thrs thrs); | 134 | enum nvkm_therm_thrs_direction); |
138 | void nouveau_therm_sensor_event(struct nouveau_therm *therm, | 135 | void nvkm_therm_program_alarms_polling(struct nvkm_therm *); |
139 | enum nouveau_therm_thrs thrs, | 136 | |
140 | enum nouveau_therm_thrs_direction dir); | 137 | void nv40_therm_intr(struct nvkm_subdev *); |
141 | void nouveau_therm_program_alarms_polling(struct nouveau_therm *therm); | 138 | int nv50_fan_pwm_ctrl(struct nvkm_therm *, int, bool); |
142 | 139 | int nv50_fan_pwm_get(struct nvkm_therm *, int, u32 *, u32 *); | |
143 | void nv40_therm_intr(struct nouveau_subdev *); | 140 | int nv50_fan_pwm_set(struct nvkm_therm *, int, u32, u32); |
144 | int nv50_fan_pwm_ctrl(struct nouveau_therm *, int, bool); | 141 | int nv50_fan_pwm_clock(struct nvkm_therm *, int); |
145 | int nv50_fan_pwm_get(struct nouveau_therm *, int, u32 *, u32 *); | 142 | int g84_temp_get(struct nvkm_therm *); |
146 | int nv50_fan_pwm_set(struct nouveau_therm *, int, u32, u32); | 143 | void g84_sensor_setup(struct nvkm_therm *); |
147 | int nv50_fan_pwm_clock(struct nouveau_therm *, int); | 144 | int g84_therm_fini(struct nvkm_object *, bool suspend); |
148 | int nv84_temp_get(struct nouveau_therm *therm); | 145 | |
149 | void nv84_sensor_setup(struct nouveau_therm *therm); | 146 | int gt215_therm_fan_sense(struct nvkm_therm *); |
150 | int nv84_therm_fini(struct nouveau_object *object, bool suspend); | 147 | |
151 | 148 | int gf110_therm_init(struct nvkm_object *); | |
152 | int nva3_therm_fan_sense(struct nouveau_therm *); | 149 | |
153 | 150 | int nvkm_fanpwm_create(struct nvkm_therm *, struct dcb_gpio_func *); | |
154 | int nvd0_therm_init(struct nouveau_object *object); | 151 | int nvkm_fantog_create(struct nvkm_therm *, struct dcb_gpio_func *); |
155 | 152 | int nvkm_fannil_create(struct nvkm_therm *); | |
156 | int nouveau_fanpwm_create(struct nouveau_therm *, struct dcb_gpio_func *); | ||
157 | int nouveau_fantog_create(struct nouveau_therm *, struct dcb_gpio_func *); | ||
158 | int nouveau_fannil_create(struct nouveau_therm *); | ||
159 | |||
160 | #endif | 153 | #endif |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.c b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.c index 6212537b90c5..aa13744f3854 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.c | |||
@@ -21,18 +21,12 @@ | |||
21 | * | 21 | * |
22 | * Authors: Martin Peres | 22 | * Authors: Martin Peres |
23 | */ | 23 | */ |
24 | |||
25 | #include "priv.h" | 24 | #include "priv.h" |
26 | 25 | ||
27 | #include <core/object.h> | ||
28 | #include <core/device.h> | ||
29 | |||
30 | #include <subdev/bios.h> | ||
31 | |||
32 | static void | 26 | static void |
33 | nouveau_therm_temp_set_defaults(struct nouveau_therm *therm) | 27 | nvkm_therm_temp_set_defaults(struct nvkm_therm *therm) |
34 | { | 28 | { |
35 | struct nouveau_therm_priv *priv = (void *)therm; | 29 | struct nvkm_therm_priv *priv = (void *)therm; |
36 | 30 | ||
37 | priv->bios_sensor.offset_constant = 0; | 31 | priv->bios_sensor.offset_constant = 0; |
38 | 32 | ||
@@ -51,9 +45,9 @@ nouveau_therm_temp_set_defaults(struct nouveau_therm *therm) | |||
51 | 45 | ||
52 | 46 | ||
53 | static void | 47 | static void |
54 | nouveau_therm_temp_safety_checks(struct nouveau_therm *therm) | 48 | nvkm_therm_temp_safety_checks(struct nvkm_therm *therm) |
55 | { | 49 | { |
56 | struct nouveau_therm_priv *priv = (void *)therm; | 50 | struct nvkm_therm_priv *priv = (void *)therm; |
57 | struct nvbios_therm_sensor *s = &priv->bios_sensor; | 51 | struct nvbios_therm_sensor *s = &priv->bios_sensor; |
58 | 52 | ||
59 | /* enforce a minimum hysteresis on thresholds */ | 53 | /* enforce a minimum hysteresis on thresholds */ |
@@ -64,20 +58,21 @@ nouveau_therm_temp_safety_checks(struct nouveau_therm *therm) | |||
64 | } | 58 | } |
65 | 59 | ||
66 | /* must be called with alarm_program_lock taken ! */ | 60 | /* must be called with alarm_program_lock taken ! */ |
67 | void nouveau_therm_sensor_set_threshold_state(struct nouveau_therm *therm, | 61 | void |
68 | enum nouveau_therm_thrs thrs, | 62 | nvkm_therm_sensor_set_threshold_state(struct nvkm_therm *therm, |
69 | enum nouveau_therm_thrs_state st) | 63 | enum nvkm_therm_thrs thrs, |
64 | enum nvkm_therm_thrs_state st) | ||
70 | { | 65 | { |
71 | struct nouveau_therm_priv *priv = (void *)therm; | 66 | struct nvkm_therm_priv *priv = (void *)therm; |
72 | priv->sensor.alarm_state[thrs] = st; | 67 | priv->sensor.alarm_state[thrs] = st; |
73 | } | 68 | } |
74 | 69 | ||
75 | /* must be called with alarm_program_lock taken ! */ | 70 | /* must be called with alarm_program_lock taken ! */ |
76 | enum nouveau_therm_thrs_state | 71 | enum nvkm_therm_thrs_state |
77 | nouveau_therm_sensor_get_threshold_state(struct nouveau_therm *therm, | 72 | nvkm_therm_sensor_get_threshold_state(struct nvkm_therm *therm, |
78 | enum nouveau_therm_thrs thrs) | 73 | enum nvkm_therm_thrs thrs) |
79 | { | 74 | { |
80 | struct nouveau_therm_priv *priv = (void *)therm; | 75 | struct nvkm_therm_priv *priv = (void *)therm; |
81 | return priv->sensor.alarm_state[thrs]; | 76 | return priv->sensor.alarm_state[thrs]; |
82 | } | 77 | } |
83 | 78 | ||
@@ -88,11 +83,11 @@ nv_poweroff_work(struct work_struct *work) | |||
88 | kfree(work); | 83 | kfree(work); |
89 | } | 84 | } |
90 | 85 | ||
91 | void nouveau_therm_sensor_event(struct nouveau_therm *therm, | 86 | void |
92 | enum nouveau_therm_thrs thrs, | 87 | nvkm_therm_sensor_event(struct nvkm_therm *therm, enum nvkm_therm_thrs thrs, |
93 | enum nouveau_therm_thrs_direction dir) | 88 | enum nvkm_therm_thrs_direction dir) |
94 | { | 89 | { |
95 | struct nouveau_therm_priv *priv = (void *)therm; | 90 | struct nvkm_therm_priv *priv = (void *)therm; |
96 | bool active; | 91 | bool active; |
97 | const char *thresolds[] = { | 92 | const char *thresolds[] = { |
98 | "fanboost", "downclock", "critical", "shutdown" | 93 | "fanboost", "downclock", "critical", "shutdown" |
@@ -102,30 +97,30 @@ void nouveau_therm_sensor_event(struct nouveau_therm *therm, | |||
102 | if (thrs < 0 || thrs > 3) | 97 | if (thrs < 0 || thrs > 3) |
103 | return; | 98 | return; |
104 | 99 | ||
105 | if (dir == NOUVEAU_THERM_THRS_FALLING) | 100 | if (dir == NVKM_THERM_THRS_FALLING) |
106 | nv_info(therm, "temperature (%i C) went below the '%s' threshold\n", | 101 | nv_info(therm, "temperature (%i C) went below the '%s' threshold\n", |
107 | temperature, thresolds[thrs]); | 102 | temperature, thresolds[thrs]); |
108 | else | 103 | else |
109 | nv_info(therm, "temperature (%i C) hit the '%s' threshold\n", | 104 | nv_info(therm, "temperature (%i C) hit the '%s' threshold\n", |
110 | temperature, thresolds[thrs]); | 105 | temperature, thresolds[thrs]); |
111 | 106 | ||
112 | active = (dir == NOUVEAU_THERM_THRS_RISING); | 107 | active = (dir == NVKM_THERM_THRS_RISING); |
113 | switch (thrs) { | 108 | switch (thrs) { |
114 | case NOUVEAU_THERM_THRS_FANBOOST: | 109 | case NVKM_THERM_THRS_FANBOOST: |
115 | if (active) { | 110 | if (active) { |
116 | nouveau_therm_fan_set(therm, true, 100); | 111 | nvkm_therm_fan_set(therm, true, 100); |
117 | nouveau_therm_fan_mode(therm, NOUVEAU_THERM_CTRL_AUTO); | 112 | nvkm_therm_fan_mode(therm, NVKM_THERM_CTRL_AUTO); |
118 | } | 113 | } |
119 | break; | 114 | break; |
120 | case NOUVEAU_THERM_THRS_DOWNCLOCK: | 115 | case NVKM_THERM_THRS_DOWNCLOCK: |
121 | if (priv->emergency.downclock) | 116 | if (priv->emergency.downclock) |
122 | priv->emergency.downclock(therm, active); | 117 | priv->emergency.downclock(therm, active); |
123 | break; | 118 | break; |
124 | case NOUVEAU_THERM_THRS_CRITICAL: | 119 | case NVKM_THERM_THRS_CRITICAL: |
125 | if (priv->emergency.pause) | 120 | if (priv->emergency.pause) |
126 | priv->emergency.pause(therm, active); | 121 | priv->emergency.pause(therm, active); |
127 | break; | 122 | break; |
128 | case NOUVEAU_THERM_THRS_SHUTDOWN: | 123 | case NVKM_THERM_THRS_SHUTDOWN: |
129 | if (active) { | 124 | if (active) { |
130 | struct work_struct *work; | 125 | struct work_struct *work; |
131 | 126 | ||
@@ -136,7 +131,7 @@ void nouveau_therm_sensor_event(struct nouveau_therm *therm, | |||
136 | } | 131 | } |
137 | } | 132 | } |
138 | break; | 133 | break; |
139 | case NOUVEAU_THERM_THRS_NR: | 134 | case NVKM_THERM_THRS_NR: |
140 | break; | 135 | break; |
141 | } | 136 | } |
142 | 137 | ||
@@ -144,53 +139,53 @@ void nouveau_therm_sensor_event(struct nouveau_therm *therm, | |||
144 | 139 | ||
145 | /* must be called with alarm_program_lock taken ! */ | 140 | /* must be called with alarm_program_lock taken ! */ |
146 | static void | 141 | static void |
147 | nouveau_therm_threshold_hyst_polling(struct nouveau_therm *therm, | 142 | nvkm_therm_threshold_hyst_polling(struct nvkm_therm *therm, |
148 | const struct nvbios_therm_threshold *thrs, | 143 | const struct nvbios_therm_threshold *thrs, |
149 | enum nouveau_therm_thrs thrs_name) | 144 | enum nvkm_therm_thrs thrs_name) |
150 | { | 145 | { |
151 | enum nouveau_therm_thrs_direction direction; | 146 | enum nvkm_therm_thrs_direction direction; |
152 | enum nouveau_therm_thrs_state prev_state, new_state; | 147 | enum nvkm_therm_thrs_state prev_state, new_state; |
153 | int temp = therm->temp_get(therm); | 148 | int temp = therm->temp_get(therm); |
154 | 149 | ||
155 | prev_state = nouveau_therm_sensor_get_threshold_state(therm, thrs_name); | 150 | prev_state = nvkm_therm_sensor_get_threshold_state(therm, thrs_name); |
156 | 151 | ||
157 | if (temp >= thrs->temp && prev_state == NOUVEAU_THERM_THRS_LOWER) { | 152 | if (temp >= thrs->temp && prev_state == NVKM_THERM_THRS_LOWER) { |
158 | direction = NOUVEAU_THERM_THRS_RISING; | 153 | direction = NVKM_THERM_THRS_RISING; |
159 | new_state = NOUVEAU_THERM_THRS_HIGHER; | 154 | new_state = NVKM_THERM_THRS_HIGHER; |
160 | } else if (temp <= thrs->temp - thrs->hysteresis && | 155 | } else if (temp <= thrs->temp - thrs->hysteresis && |
161 | prev_state == NOUVEAU_THERM_THRS_HIGHER) { | 156 | prev_state == NVKM_THERM_THRS_HIGHER) { |
162 | direction = NOUVEAU_THERM_THRS_FALLING; | 157 | direction = NVKM_THERM_THRS_FALLING; |
163 | new_state = NOUVEAU_THERM_THRS_LOWER; | 158 | new_state = NVKM_THERM_THRS_LOWER; |
164 | } else | 159 | } else |
165 | return; /* nothing to do */ | 160 | return; /* nothing to do */ |
166 | 161 | ||
167 | nouveau_therm_sensor_set_threshold_state(therm, thrs_name, new_state); | 162 | nvkm_therm_sensor_set_threshold_state(therm, thrs_name, new_state); |
168 | nouveau_therm_sensor_event(therm, thrs_name, direction); | 163 | nvkm_therm_sensor_event(therm, thrs_name, direction); |
169 | } | 164 | } |
170 | 165 | ||
171 | static void | 166 | static void |
172 | alarm_timer_callback(struct nouveau_alarm *alarm) | 167 | alarm_timer_callback(struct nvkm_alarm *alarm) |
173 | { | 168 | { |
174 | struct nouveau_therm_priv *priv = | 169 | struct nvkm_therm_priv *priv = |
175 | container_of(alarm, struct nouveau_therm_priv, sensor.therm_poll_alarm); | 170 | container_of(alarm, struct nvkm_therm_priv, sensor.therm_poll_alarm); |
176 | struct nvbios_therm_sensor *sensor = &priv->bios_sensor; | 171 | struct nvbios_therm_sensor *sensor = &priv->bios_sensor; |
177 | struct nouveau_timer *ptimer = nouveau_timer(priv); | 172 | struct nvkm_timer *ptimer = nvkm_timer(priv); |
178 | struct nouveau_therm *therm = &priv->base; | 173 | struct nvkm_therm *therm = &priv->base; |
179 | unsigned long flags; | 174 | unsigned long flags; |
180 | 175 | ||
181 | spin_lock_irqsave(&priv->sensor.alarm_program_lock, flags); | 176 | spin_lock_irqsave(&priv->sensor.alarm_program_lock, flags); |
182 | 177 | ||
183 | nouveau_therm_threshold_hyst_polling(therm, &sensor->thrs_fan_boost, | 178 | nvkm_therm_threshold_hyst_polling(therm, &sensor->thrs_fan_boost, |
184 | NOUVEAU_THERM_THRS_FANBOOST); | 179 | NVKM_THERM_THRS_FANBOOST); |
185 | 180 | ||
186 | nouveau_therm_threshold_hyst_polling(therm, &sensor->thrs_down_clock, | 181 | nvkm_therm_threshold_hyst_polling(therm, &sensor->thrs_down_clock, |
187 | NOUVEAU_THERM_THRS_DOWNCLOCK); | 182 | NVKM_THERM_THRS_DOWNCLOCK); |
188 | 183 | ||
189 | nouveau_therm_threshold_hyst_polling(therm, &sensor->thrs_critical, | 184 | nvkm_therm_threshold_hyst_polling(therm, &sensor->thrs_critical, |
190 | NOUVEAU_THERM_THRS_CRITICAL); | 185 | NVKM_THERM_THRS_CRITICAL); |
191 | 186 | ||
192 | nouveau_therm_threshold_hyst_polling(therm, &sensor->thrs_shutdown, | 187 | nvkm_therm_threshold_hyst_polling(therm, &sensor->thrs_shutdown, |
193 | NOUVEAU_THERM_THRS_SHUTDOWN); | 188 | NVKM_THERM_THRS_SHUTDOWN); |
194 | 189 | ||
195 | spin_unlock_irqrestore(&priv->sensor.alarm_program_lock, flags); | 190 | spin_unlock_irqrestore(&priv->sensor.alarm_program_lock, flags); |
196 | 191 | ||
@@ -200,9 +195,9 @@ alarm_timer_callback(struct nouveau_alarm *alarm) | |||
200 | } | 195 | } |
201 | 196 | ||
202 | void | 197 | void |
203 | nouveau_therm_program_alarms_polling(struct nouveau_therm *therm) | 198 | nvkm_therm_program_alarms_polling(struct nvkm_therm *therm) |
204 | { | 199 | { |
205 | struct nouveau_therm_priv *priv = (void *)therm; | 200 | struct nvkm_therm_priv *priv = (void *)therm; |
206 | struct nvbios_therm_sensor *sensor = &priv->bios_sensor; | 201 | struct nvbios_therm_sensor *sensor = &priv->bios_sensor; |
207 | 202 | ||
208 | nv_debug(therm, | 203 | nv_debug(therm, |
@@ -217,18 +212,18 @@ nouveau_therm_program_alarms_polling(struct nouveau_therm *therm) | |||
217 | } | 212 | } |
218 | 213 | ||
219 | int | 214 | int |
220 | nouveau_therm_sensor_init(struct nouveau_therm *therm) | 215 | nvkm_therm_sensor_init(struct nvkm_therm *therm) |
221 | { | 216 | { |
222 | struct nouveau_therm_priv *priv = (void *)therm; | 217 | struct nvkm_therm_priv *priv = (void *)therm; |
223 | priv->sensor.program_alarms(therm); | 218 | priv->sensor.program_alarms(therm); |
224 | return 0; | 219 | return 0; |
225 | } | 220 | } |
226 | 221 | ||
227 | int | 222 | int |
228 | nouveau_therm_sensor_fini(struct nouveau_therm *therm, bool suspend) | 223 | nvkm_therm_sensor_fini(struct nvkm_therm *therm, bool suspend) |
229 | { | 224 | { |
230 | struct nouveau_therm_priv *priv = (void *)therm; | 225 | struct nvkm_therm_priv *priv = (void *)therm; |
231 | struct nouveau_timer *ptimer = nouveau_timer(therm); | 226 | struct nvkm_timer *ptimer = nvkm_timer(therm); |
232 | 227 | ||
233 | if (suspend) | 228 | if (suspend) |
234 | ptimer->alarm_cancel(ptimer, &priv->sensor.therm_poll_alarm); | 229 | ptimer->alarm_cancel(ptimer, &priv->sensor.therm_poll_alarm); |
@@ -236,7 +231,7 @@ nouveau_therm_sensor_fini(struct nouveau_therm *therm, bool suspend) | |||
236 | } | 231 | } |
237 | 232 | ||
238 | void | 233 | void |
239 | nouveau_therm_sensor_preinit(struct nouveau_therm *therm) | 234 | nvkm_therm_sensor_preinit(struct nvkm_therm *therm) |
240 | { | 235 | { |
241 | const char *sensor_avail = "yes"; | 236 | const char *sensor_avail = "yes"; |
242 | 237 | ||
@@ -247,18 +242,18 @@ nouveau_therm_sensor_preinit(struct nouveau_therm *therm) | |||
247 | } | 242 | } |
248 | 243 | ||
249 | int | 244 | int |
250 | nouveau_therm_sensor_ctor(struct nouveau_therm *therm) | 245 | nvkm_therm_sensor_ctor(struct nvkm_therm *therm) |
251 | { | 246 | { |
252 | struct nouveau_therm_priv *priv = (void *)therm; | 247 | struct nvkm_therm_priv *priv = (void *)therm; |
253 | struct nouveau_bios *bios = nouveau_bios(therm); | 248 | struct nvkm_bios *bios = nvkm_bios(therm); |
254 | 249 | ||
255 | nouveau_alarm_init(&priv->sensor.therm_poll_alarm, alarm_timer_callback); | 250 | nvkm_alarm_init(&priv->sensor.therm_poll_alarm, alarm_timer_callback); |
256 | 251 | ||
257 | nouveau_therm_temp_set_defaults(therm); | 252 | nvkm_therm_temp_set_defaults(therm); |
258 | if (nvbios_therm_sensor_parse(bios, NVBIOS_THERM_DOMAIN_CORE, | 253 | if (nvbios_therm_sensor_parse(bios, NVBIOS_THERM_DOMAIN_CORE, |
259 | &priv->bios_sensor)) | 254 | &priv->bios_sensor)) |
260 | nv_error(therm, "nvbios_therm_sensor_parse failed\n"); | 255 | nv_error(therm, "nvbios_therm_sensor_parse failed\n"); |
261 | nouveau_therm_temp_safety_checks(therm); | 256 | nvkm_therm_temp_safety_checks(therm); |
262 | 257 | ||
263 | return 0; | 258 | return 0; |
264 | } | 259 | } |