powerpc/85xx: Board support for ppa8548

Initial board support for the Prodrive PPA8548 AMC module. Board
is an MPC8548 AMC platform used in RapidIO systems. This module is
also used to test/work on mainline linux RapidIO software.

PPA8548 overview:
- 1.3 GHz Freescale PowerQUICC III MPC8548 processor
- 1 GB DDR2 @ 266 MHz
- 8 MB NOR flash
- Serial RapidIO 1.2
- 1 x 10/100/1000 BASE-T front ethernet
- 1 x 1000 BASE-BX ethernet on AMC connector

Signed-off-by: Stef van Os <stef.van.os@prodrive.nl>
Acked-by: Timur Tabi <timur@tabi.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

5 files changed, 337 insertions, 0 deletions

diff --git a/arch/powerpc/boot/dts/ppa8548.dts b/arch/powerpc/boot/dts/ppa8548.dts
new file mode 100644
index 000000000000..f97eceed610a
--- /dev/null
+++ b/arch/powerpc/boot/dts/ppa8548.dts
@@ -0,0 +1,166 @@
+/*
+ * PPA8548 Device Tree Source (36-bit address map)
+ * Copyright 2013 Prodrive B.V.
+ *
+ * Based on:
+ * MPC8548 CDS Device Tree Source (36-bit address map)
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/include/ "fsl/mpc8548si-pre.dtsi"
+
+/ {
+        model = "ppa8548";
+        compatible = "ppa8548";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        interrupt-parent = <&mpic>;
+
+        memory {
+                device_type = "memory";
+                reg = <0 0 0x0 0x40000000>;
+        };
+
+        lbc: localbus@fe0005000 {
+                reg = <0xf 0xe0005000 0 0x1000>;
+                ranges = <0x0 0x0 0xf 0xff800000 0x00800000>;
+        };
+
+        soc: soc8548@fe0000000 {
+                ranges = <0 0xf 0xe0000000 0x100000>;
+        };
+
+        pci0: pci@fe0008000 {
+                /* ppa8548 board doesn't support PCI */
+                status = "disabled";
+        };
+
+        pci1: pci@fe0009000 {
+                /* ppa8548 board doesn't support PCI */
+                status = "disabled";
+        };
+
+        pci2: pcie@fe000a000 {
+                /* ppa8548 board doesn't support PCI */
+                status = "disabled";
+        };
+
+        rio: rapidio@fe00c0000 {
+                reg = <0xf 0xe00c0000 0x0 0x11000>;
+                port1 {
+                        ranges = <0x0 0x0 0x0 0x80000000 0x0 0x40000000>;
+                };
+        };
+};
+
+&lbc {
+        nor@0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "cfi-flash";
+                reg = <0x0 0x0 0x00800000>;
+                bank-width = <2>;
+                device-width = <2>;
+
+                partition@0 {
+                        reg = <0x0 0x7A0000>;
+                        label = "user";
+                };
+
+                partition@7A0000 {
+                        reg = <0x7A0000 0x20000>;
+                        label = "env";
+                        read-only;
+                };
+
+                partition@7C0000 {
+                        reg = <0x7C0000 0x40000>;
+                        label = "u-boot";
+                        read-only;
+                };
+        };
+};
+
+&soc {
+        i2c@3000 {
+                rtc@6f {
+                        compatible = "intersil,isl1208";
+                        reg = <0x6f>;
+                };
+        };
+
+        i2c@3100 {
+        };
+
+        /*
+         * Only ethernet controller @25000 and @26000 are used.
+         * Use alias enet2 and enet3 for the remainig controllers,
+         * to stay compatible with mpc8548si-pre.dtsi.
+         */
+        enet2: ethernet@24000 {
+                status = "disabled";
+        };
+
+        mdio@24520 {
+                phy0: ethernet-phy@0 {
+                        interrupts = <7 1 0 0>;
+                        reg = <0x0>;
+                        device_type = "ethernet-phy";
+                };
+                phy1: ethernet-phy@1 {
+                        interrupts = <8 1 0 0>;
+                        reg = <0x1>;
+                        device_type = "ethernet-phy";
+                };
+                tbi0: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+        };
+
+        enet0: ethernet@25000 {
+                tbi-handle = <&tbi1>;
+                phy-handle = <&phy0>;
+        };
+
+        mdio@25520 {
+                tbi1: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+        };
+
+        enet1: ethernet@26000 {
+                tbi-handle = <&tbi2>;
+                phy-handle = <&phy1>;
+        };
+
+        mdio@26520 {
+                tbi2: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+        };
+
+        enet3: ethernet@27000 {
+                status = "disabled";
+        };
+
+        mdio@27520 {
+                tbi3: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+        };
+
+        crypto@30000 {
+                status = "disabled";
+        };
+};
+
+/include/ "fsl/mpc8548si-post.dtsi"
diff --git a/arch/powerpc/configs/85xx/ppa8548_defconfig b/arch/powerpc/configs/85xx/ppa8548_defconfig
new file mode 100644
index 000000000000..a11337de8aa2
--- /dev/null
+++ b/arch/powerpc/configs/85xx/ppa8548_defconfig
@@ -0,0 +1,65 @@
+CONFIG_PPC_85xx=y
+CONFIG_PPA8548=y
+CONFIG_DTC=y
+CONFIG_DEFAULT_UIMAGE=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+# CONFIG_PCI is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_ADVANCED_OPTIONS=y
+CONFIG_LOWMEM_SIZE_BOOL=y
+CONFIG_LOWMEM_SIZE=0x40000000
+CONFIG_LOWMEM_CAM_NUM_BOOL=y
+CONFIG_LOWMEM_CAM_NUM=4
+CONFIG_PAGE_OFFSET_BOOL=y
+CONFIG_PAGE_OFFSET=0xb0000000
+CONFIG_KERNEL_START_BOOL=y
+CONFIG_KERNEL_START=0xb0000000
+# CONFIG_PHYSICAL_START_BOOL is not set
+CONFIG_PHYSICAL_START=0x00000000
+CONFIG_PHYSICAL_ALIGN=0x04000000
+CONFIG_TASK_SIZE_BOOL=y
+CONFIG_TASK_SIZE=0xb0000000
+
+CONFIG_FSL_LBC=y
+CONFIG_FSL_DMA=y
+CONFIG_FSL_RIO=y
+
+CONFIG_RAPIDIO=y
+CONFIG_RAPIDIO_DMA_ENGINE=y
+CONFIG_RAPIDIO_TSI57X=y
+CONFIG_RAPIDIO_TSI568=y
+CONFIG_RAPIDIO_CPS_XX=y
+CONFIG_RAPIDIO_CPS_GEN2=y
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_PROC_DEVICETREE=y
+
+CONFIG_MTD=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_PHYSMAP_OF=y
+
+CONFIG_I2C=y
+CONFIG_I2C_MPC=y
+CONFIG_I2C_CHARDEV
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_DRV_ISL1208=y
+
+CONFIG_NET=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_GIANFAR=y
+CONFIG_MARVELL_PHY=y
+CONFIG_NFS_FS=y
+CONFIG_ROOT_NFS=y
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index 651788cbc6e6..bcc53aa09bf7 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -191,6 +191,13 @@ config SBC8548
         help
           This option enables support for the Wind River SBC8548 board
 
+config PPA8548
+        bool "Prodrive PPA8548"
+        help
+          This option enables support for the Prodrive PPA8548 board.
+        select DEFAULT_UIMAGE
+        select HAS_RAPIDIO
+
 config GE_IMP3A
         bool "GE Intelligent Platforms IMP3A"
         select DEFAULT_UIMAGE
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index 9db31dcbd320..07d0dbb141c0 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_P5040_DS)    += p5040_ds.o corenet_ds.o
 obj-$(CONFIG_STX_GP3)     += stx_gp3.o
 obj-$(CONFIG_TQM85xx)     += tqm85xx.o
 obj-$(CONFIG_SBC8548)     += sbc8548.o
+obj-$(CONFIG_PPA8548)     += ppa8548.o
 obj-$(CONFIG_SOCRATES)    += socrates.o socrates_fpga_pic.o
 obj-$(CONFIG_KSI8560)     += ksi8560.o
 obj-$(CONFIG_XES_MPC85xx) += xes_mpc85xx.o
diff --git a/arch/powerpc/platforms/85xx/ppa8548.c b/arch/powerpc/platforms/85xx/ppa8548.c
new file mode 100644
index 000000000000..6a7704b92c3b
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/ppa8548.c
@@ -0,0 +1,98 @@
+/*
+ * ppa8548 setup and early boot code.
+ *
+ * Copyright 2009 Prodrive B.V..
+ *
+ * By Stef van Os (see MAINTAINERS for contact information)
+ *
+ * Based on the SBC8548 support - Copyright 2007 Wind River Systems Inc.
+ * Based on the MPC8548CDS support - Copyright 2005 Freescale Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/reboot.h>
+#include <linux/seq_file.h>
+#include <linux/of_platform.h>
+
+#include <asm/machdep.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+
+static void __init ppa8548_pic_init(void)
+{
+        struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN,
+                        0, 256, " OpenPIC  ");
+        BUG_ON(mpic == NULL);
+        mpic_init(mpic);
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init ppa8548_setup_arch(void)
+{
+        if (ppc_md.progress)
+                ppc_md.progress("ppa8548_setup_arch()", 0);
+}
+
+static void ppa8548_show_cpuinfo(struct seq_file *m)
+{
+        uint32_t svid, phid1;
+
+        svid = mfspr(SPRN_SVR);
+
+        seq_printf(m, "Vendor\t\t: Prodrive B.V.\n");
+        seq_printf(m, "SVR\t\t: 0x%x\n", svid);
+
+        /* Display cpu Pll setting */
+        phid1 = mfspr(SPRN_HID1);
+        seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
+}
+
+static struct of_device_id __initdata of_bus_ids[] = {
+        { .name = "soc", },
+        { .type = "soc", },
+        { .compatible = "simple-bus", },
+        { .compatible = "gianfar", },
+        { .compatible = "fsl,srio", },
+        {},
+};
+
+static int __init declare_of_platform_devices(void)
+{
+        of_platform_bus_probe(NULL, of_bus_ids, NULL);
+
+        return 0;
+}
+machine_device_initcall(ppa8548, declare_of_platform_devices);
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init ppa8548_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        return of_flat_dt_is_compatible(root, "ppa8548");
+}
+
+define_machine(ppa8548) {
+        .name           = "ppa8548",
+        .probe          = ppa8548_probe,
+        .setup_arch     = ppa8548_setup_arch,
+        .init_IRQ       = ppa8548_pic_init,
+        .show_cpuinfo   = ppa8548_show_cpuinfo,
+        .get_irq        = mpic_get_irq,
+        .restart        = fsl_rstcr_restart,
+        .calibrate_decr = generic_calibrate_decr,
+        .progress       = udbg_progress,
+};