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authorMugunthan V N <mugunthanvnm@ti.com>2012-08-06 01:05:58 -0400
committerDavid S. Miller <davem@davemloft.net>2012-08-07 19:24:55 -0400
commite07b94f1352723994d8b588ac5ed8af91bcc9fb6 (patch)
treef1b6b94a52456bf0f4494f478eb5b684f8f3d440
parentec03e6a89e5168c92581a769681207c29ad2030f (diff)
documentation: dt: bindings: cpsw: fixing the examples for directly using it in dts file
Fixing the cpsw device tree example to make it simpler to copy pastable to dts file and use it directly. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--Documentation/devicetree/bindings/net/cpsw.txt101
1 files changed, 53 insertions, 48 deletions
diff --git a/Documentation/devicetree/bindings/net/cpsw.txt b/Documentation/devicetree/bindings/net/cpsw.txt
index acca48c4246d..dcaabe9fe869 100644
--- a/Documentation/devicetree/bindings/net/cpsw.txt
+++ b/Documentation/devicetree/bindings/net/cpsw.txt
@@ -11,6 +11,7 @@ Required properties:
11- cpdma_channels : Specifies number of channels in CPDMA 11- cpdma_channels : Specifies number of channels in CPDMA
12- host_port_no : Specifies host port shift 12- host_port_no : Specifies host port shift
13- cpdma_reg_ofs : Specifies CPDMA submodule register offset 13- cpdma_reg_ofs : Specifies CPDMA submodule register offset
14- cpdma_sram_ofs : Specifies CPDMA SRAM offset
14- ale_reg_ofs : Specifies ALE submodule register offset 15- ale_reg_ofs : Specifies ALE submodule register offset
15- ale_entries : Specifies No of entries ALE can hold 16- ale_entries : Specifies No of entries ALE can hold
16- host_port_reg_ofs : Specifies host port register offset 17- host_port_reg_ofs : Specifies host port register offset
@@ -43,62 +44,66 @@ Examples:
43 reg = <0x4A100000 0x1000>; 44 reg = <0x4A100000 0x1000>;
44 interrupts = <55 0x4>; 45 interrupts = <55 0x4>;
45 interrupt-parent = <&intc>; 46 interrupt-parent = <&intc>;
46 cpdma_channels = 8; 47 cpdma_channels = <8>;
47 host_port_no = 0; 48 host_port_no = <0>;
48 cpdma_reg_ofs = 0x800; 49 cpdma_reg_ofs = <0x800>;
49 ale_reg_ofs = 0xd00; 50 cpdma_sram_ofs = <0xa00>;
50 ale_entries = 1024; 51 ale_reg_ofs = <0xd00>;
51 host_port_reg_ofs = 0x108; 52 ale_entries = <1024>;
52 hw_stats_reg_ofs = 0x900; 53 host_port_reg_ofs = <0x108>;
53 bd_ram_ofs = 0x2000; 54 hw_stats_reg_ofs = <0x900>;
54 bd_ram_size = 0x2000; 55 bd_ram_ofs = <0x2000>;
55 no_bd_ram = 0; 56 bd_ram_size = <0x2000>;
56 rx_descs = 64; 57 no_bd_ram = <0>;
57 mac_control = 0x20; 58 rx_descs = <64>;
58 slaves = 2; 59 mac_control = <0x20>;
59 slave@0 { 60 slaves = <2>;
60 slave_reg_ofs = 0x208; 61 cpsw_emac0: slave@0 {
61 sliver_reg_ofs = 0xd80; 62 slave_reg_ofs = <0x208>;
62 phy_id = "davinci_mdio-0:00" 63 sliver_reg_ofs = <0xd80>;
63 mac-address = [00 04 9F 01 1B B8]; 64 phy_id = "davinci_mdio.16:00";
65 /* Filled in by U-Boot */
66 mac-address = [ 00 00 00 00 00 00 ];
64 }; 67 };
65 slave@1 { 68 cpsw_emac1: slave@1 {
66 slave_reg_ofs = 0x208; 69 slave_reg_ofs = <0x308>;
67 sliver_reg_ofs = 0xd80; 70 sliver_reg_ofs = <0xdc0>;
68 phy_id = "davinci_mdio-0:01" 71 phy_id = "davinci_mdio.16:01";
69 mac-address = [00 04 9F 01 1B B9]; 72 /* Filled in by U-Boot */
73 mac-address = [ 00 00 00 00 00 00 ];
70 }; 74 };
71 }; 75 };
72 76
73(or) 77(or)
74
75 mac: ethernet@4A100000 { 78 mac: ethernet@4A100000 {
76 compatible = "ti,cpsw"; 79 compatible = "ti,cpsw";
77 ti,hwmods = "cpgmac0"; 80 ti,hwmods = "cpgmac0";
78 cpdma_channels = 8; 81 cpdma_channels = <8>;
79 host_port_no = 0; 82 host_port_no = <0>;
80 cpdma_reg_ofs = 0x800; 83 cpdma_reg_ofs = <0x800>;
81 ale_reg_ofs = 0xd00; 84 cpdma_sram_ofs = <0xa00>;
82 ale_entries = 1024; 85 ale_reg_ofs = <0xd00>;
83 host_port_reg_ofs = 0x108; 86 ale_entries = <1024>;
84 hw_stats_reg_ofs = 0x900; 87 host_port_reg_ofs = <0x108>;
85 bd_ram_ofs = 0x2000; 88 hw_stats_reg_ofs = <0x900>;
86 bd_ram_size = 0x2000; 89 bd_ram_ofs = <0x2000>;
87 no_bd_ram = 0; 90 bd_ram_size = <0x2000>;
88 rx_descs = 64; 91 no_bd_ram = <0>;
89 mac_control = 0x20; 92 rx_descs = <64>;
90 slaves = 2; 93 mac_control = <0x20>;
91 slave@0 { 94 slaves = <2>;
92 slave_reg_ofs = 0x208; 95 cpsw_emac0: slave@0 {
93 sliver_reg_ofs = 0xd80; 96 slave_reg_ofs = <0x208>;
94 phy_id = "davinci_mdio-0:00" 97 sliver_reg_ofs = <0xd80>;
95 mac-address = [00 04 9F 01 1B B8]; 98 phy_id = "davinci_mdio.16:00";
99 /* Filled in by U-Boot */
100 mac-address = [ 00 00 00 00 00 00 ];
96 }; 101 };
97 slave@1 { 102 cpsw_emac1: slave@1 {
98 slave_reg_ofs = 0x208; 103 slave_reg_ofs = <0x308>;
99 sliver_reg_ofs = 0xd80; 104 sliver_reg_ofs = <0xdc0>;
100 phy_id = "davinci_mdio-0:01" 105 phy_id = "davinci_mdio.16:01";
101 mac-address = [00 04 9F 01 1B B9]; 106 /* Filled in by U-Boot */
107 mac-address = [ 00 00 00 00 00 00 ];
102 }; 108 };
103
104 }; 109 };