tty/serial: Add support for Altera serial port

Add support for Altera 8250/16550 compatible serial port.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

4 files changed, 35 insertions, 2 deletions

diff --git a/Documentation/devicetree/bindings/tty/serial/of-serial.txt b/Documentation/devicetree/bindings/tty/serial/of-serial.txt
index 1e1145ca4f3c..8f01cb190f25 100644
--- a/Documentation/devicetree/bindings/tty/serial/of-serial.txt
+++ b/Documentation/devicetree/bindings/tty/serial/of-serial.txt
@@ -11,6 +11,9 @@ Required properties:
         - "nvidia,tegra20-uart"
         - "nxp,lpc3220-uart"
         - "ibm,qpace-nwp-serial"
+        - "altr,16550-FIFO32"
+        - "altr,16550-FIFO64"
+        - "altr,16550-FIFO128"
         - "serial" if the port type is unknown.
 - reg : offset and length of the register set for the device.
 - interrupts : should contain uart interrupt.
diff --git a/drivers/tty/serial/8250/8250.c b/drivers/tty/serial/8250/8250.c
index 0efc815a4968..661096d25620 100644
--- a/drivers/tty/serial/8250/8250.c
+++ b/drivers/tty/serial/8250/8250.c
@@ -301,7 +301,28 @@ static const struct serial8250_config uart_config[] = {
         },
         [PORT_8250_CIR] = {
                 .name           = "CIR port"
-        }
+        },
+        [PORT_ALTR_16550_F32] = {
+                .name           = "Altera 16550 FIFO32",
+                .fifo_size      = 32,
+                .tx_loadsz      = 32,
+                .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
+                .flags          = UART_CAP_FIFO | UART_CAP_AFE,
+        },
+        [PORT_ALTR_16550_F64] = {
+                .name           = "Altera 16550 FIFO64",
+                .fifo_size      = 64,
+                .tx_loadsz      = 64,
+                .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
+                .flags          = UART_CAP_FIFO | UART_CAP_AFE,
+        },
+        [PORT_ALTR_16550_F128] = {
+                .name           = "Altera 16550 FIFO128",
+                .fifo_size      = 128,
+                .tx_loadsz      = 128,
+                .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
+                .flags          = UART_CAP_FIFO | UART_CAP_AFE,
+        },
 };
 
 /* Uart divisor latch read */
diff --git a/drivers/tty/serial/of_serial.c b/drivers/tty/serial/of_serial.c
index d5874605682b..b025d5438275 100644
--- a/drivers/tty/serial/of_serial.c
+++ b/drivers/tty/serial/of_serial.c
@@ -241,6 +241,12 @@ static struct of_device_id of_platform_serial_table[] = {
         { .compatible = "ns16850",  .data = (void *)PORT_16850, },
         { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
         { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
+        { .compatible = "altr,16550-FIFO32",
+                .data = (void *)PORT_ALTR_16550_F32, },
+        { .compatible = "altr,16550-FIFO64",
+                .data = (void *)PORT_ALTR_16550_F64, },
+        { .compatible = "altr,16550-FIFO128",
+                .data = (void *)PORT_ALTR_16550_F128, },
 #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
         { .compatible = "ibm,qpace-nwp-serial",
                 .data = (void *)PORT_NWPSERIAL, },
diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
index b6a23a483d74..74c2bf7211f8 100644
--- a/include/uapi/linux/serial_core.h
+++ b/include/uapi/linux/serial_core.h
@@ -51,7 +51,10 @@
 #define PORT_8250_CIR   23      /* CIR infrared port, has its own driver */
 #define PORT_XR17V35X   24      /* Exar XR17V35x UARTs */
 #define PORT_BRCM_TRUMANAGE     25
-#define PORT_MAX_8250   25      /* max port ID */
+#define PORT_ALTR_16550_F32 26  /* Altera 16550 UART with 32 FIFOs */
+#define PORT_ALTR_16550_F64 27  /* Altera 16550 UART with 64 FIFOs */
+#define PORT_ALTR_16550_F128 28 /* Altera 16550 UART with 128 FIFOs */
+#define PORT_MAX_8250   28      /* max port ID */
 
 /*
  * ARM specific type numbers.  These are not currently guaranteed