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authorKevin Hao <haokexin@gmail.com>2013-07-16 07:57:15 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2013-08-14 00:59:19 -0400
commite05c0e81b0628808a7490c35d1803644a18b0405 (patch)
tree868072fd1f5564e1d194704e0a0c88abb715f4f5
parent3a3b5aa63fad4911e239055c2c0a89ce2dac62ce (diff)
powerpc: split She math emulation into two parts
For some SoC (such as the FSL BookE) even though there does have a hardware FPU, but not all floating point instructions are implemented. Unfortunately some versions of gcc do use these unimplemented instructions. Then we have to enable the math emulation to workaround this issue. It seems a little redundant to have the support to emulate all the floating point instructions in this case. So split the math emulation into two parts. One is for the SoC which doesn't have FPU at all and the other for the SoC which does have the hardware FPU and only need some special floating point instructions to be emulated. Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
-rw-r--r--arch/powerpc/Kconfig20
-rw-r--r--arch/powerpc/math-emu/Makefile24
-rw-r--r--arch/powerpc/math-emu/math.c20
3 files changed, 46 insertions, 18 deletions
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 3bf72cd2c8fc..7205989b9b59 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -312,6 +312,26 @@ config MATH_EMULATION
312 such as fsqrt on cores that do have an FPU but do not implement 312 such as fsqrt on cores that do have an FPU but do not implement
313 them (such as Freescale BookE). 313 them (such as Freescale BookE).
314 314
315choice
316 prompt "Math emulation options"
317 default MATH_EMULATION_FULL
318 depends on MATH_EMULATION
319
320config MATH_EMULATION_FULL
321 bool "Emulate all the floating point instructions"
322 ---help---
323 Select this option will enable the kernel to support to emulate
324 all the floating point instructions. If your SoC doesn't have
325 a FPU, you should select this.
326
327config MATH_EMULATION_HW_UNIMPLEMENTED
328 bool "Just emulate the FPU unimplemented instructions"
329 ---help---
330 Select this if you know there does have a hardware FPU on your
331 SoC, but some floating point instructions are not implemented by that.
332
333endchoice
334
315config PPC_TRANSACTIONAL_MEM 335config PPC_TRANSACTIONAL_MEM
316 bool "Transactional Memory support for POWERPC" 336 bool "Transactional Memory support for POWERPC"
317 depends on PPC_BOOK3S_64 337 depends on PPC_BOOK3S_64
diff --git a/arch/powerpc/math-emu/Makefile b/arch/powerpc/math-emu/Makefile
index 8d035d2d42a6..1b46ab4f6417 100644
--- a/arch/powerpc/math-emu/Makefile
+++ b/arch/powerpc/math-emu/Makefile
@@ -1,15 +1,15 @@
1 1math-emu-common-objs = math.o fre.o fsqrt.o fsqrts.o frsqrtes.o mtfsf.o mtfsfi.o
2obj-$(CONFIG_MATH_EMULATION) += fabs.o fadd.o fadds.o fcmpo.o fcmpu.o \ 2obj-$(CONFIG_MATH_EMULATION_HW_UNIMPLEMENTED) += $(math-emu-common-objs)
3 fctiw.o fctiwz.o fdiv.o fdivs.o \ 3obj-$(CONFIG_MATH_EMULATION_FULL) += $(math-emu-common-objs) fabs.o fadd.o \
4 fmadd.o fmadds.o fmsub.o fmsubs.o \ 4 fadds.o fcmpo.o fcmpu.o fctiw.o \
5 fmul.o fmuls.o fnabs.o fneg.o \ 5 fctiwz.o fdiv.o fdivs.o fmadd.o \
6 fnmadd.o fnmadds.o fnmsub.o fnmsubs.o \ 6 fmadds.o fmsub.o fmsubs.o fmul.o \
7 fres.o fre.o frsp.o fsel.o lfs.o \ 7 fmuls.o fnabs.o fneg.o fnmadd.o \
8 frsqrte.o frsqrtes.o \ 8 fnmadds.o fnmsub.o fnmsubs.o fres.o \
9 fsqrt.o fsqrts.o fsub.o fsubs.o \ 9 frsp.o fsel.o lfs.o frsqrte.o fsub.o \
10 mcrfs.o mffs.o mtfsb0.o mtfsb1.o \ 10 fsubs.o mcrfs.o mffs.o mtfsb0.o \
11 mtfsf.o mtfsfi.o stfiwx.o stfs.o \ 11 mtfsb1.o stfiwx.o stfs.o math.o \
12 math.o fmr.o lfd.o stfd.o 12 fmr.o lfd.o stfd.o
13 13
14obj-$(CONFIG_SPE) += math_efp.o 14obj-$(CONFIG_SPE) += math_efp.o
15 15
diff --git a/arch/powerpc/math-emu/math.c b/arch/powerpc/math-emu/math.c
index f9ef34746f16..49eb2ac08fd3 100644
--- a/arch/powerpc/math-emu/math.c
+++ b/arch/powerpc/math-emu/math.c
@@ -13,6 +13,20 @@
13 13
14#define FLOATFUNC(x) extern int x(void *, void *, void *, void *) 14#define FLOATFUNC(x) extern int x(void *, void *, void *, void *)
15 15
16/* The instructions list which may be not implemented by a hardware FPU */
17FLOATFUNC(fre);
18FLOATFUNC(frsqrtes);
19FLOATFUNC(fsqrt);
20FLOATFUNC(fsqrts);
21FLOATFUNC(mtfsf);
22FLOATFUNC(mtfsfi);
23
24#ifdef CONFIG_MATH_EMULATION_HW_UNIMPLEMENTED
25#undef FLOATFUNC(x)
26#define FLOATFUNC(x) static inline int x(void *op1, void *op2, void *op3, \
27 void *op4) { }
28#endif
29
16FLOATFUNC(fadd); 30FLOATFUNC(fadd);
17FLOATFUNC(fadds); 31FLOATFUNC(fadds);
18FLOATFUNC(fdiv); 32FLOATFUNC(fdiv);
@@ -42,8 +56,6 @@ FLOATFUNC(mcrfs);
42FLOATFUNC(mffs); 56FLOATFUNC(mffs);
43FLOATFUNC(mtfsb0); 57FLOATFUNC(mtfsb0);
44FLOATFUNC(mtfsb1); 58FLOATFUNC(mtfsb1);
45FLOATFUNC(mtfsf);
46FLOATFUNC(mtfsfi);
47 59
48FLOATFUNC(lfd); 60FLOATFUNC(lfd);
49FLOATFUNC(lfs); 61FLOATFUNC(lfs);
@@ -58,13 +70,9 @@ FLOATFUNC(fnabs);
58FLOATFUNC(fneg); 70FLOATFUNC(fneg);
59 71
60/* Optional */ 72/* Optional */
61FLOATFUNC(fre);
62FLOATFUNC(fres); 73FLOATFUNC(fres);
63FLOATFUNC(frsqrte); 74FLOATFUNC(frsqrte);
64FLOATFUNC(frsqrtes);
65FLOATFUNC(fsel); 75FLOATFUNC(fsel);
66FLOATFUNC(fsqrt);
67FLOATFUNC(fsqrts);
68 76
69 77
70#define OP31 0x1f /* 31 */ 78#define OP31 0x1f /* 31 */