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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2013-11-28 11:37:51 -0500
committerSimon Horman <horms+renesas@verge.net.au>2013-12-10 03:27:21 -0500
commite05ab0bb14723d419b43341d413e4418000f58f9 (patch)
treedefc76823220e0e74a4f611e5af9cd8f8d8fa39a
parent3dc76086fa0a8def96f331785cceb6e84e3c34de (diff)
ARM: shmobile: emev2: Setup internal peripheral interrupts as level high
Interrupts generated by SoC internal devices are currently marked as IRQ_TYPE_NONE. As they're level-triggered and active-high, mark them as such. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/boot/dts/emev2.dtsi30
1 files changed, 15 insertions, 15 deletions
diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi
index 8467e4caf3b7..e37985fa10e2 100644
--- a/arch/arm/boot/dts/emev2.dtsi
+++ b/arch/arm/boot/dts/emev2.dtsi
@@ -130,7 +130,7 @@
130 sti@e0180000 { 130 sti@e0180000 {
131 compatible = "renesas,em-sti"; 131 compatible = "renesas,em-sti";
132 reg = <0xe0180000 0x54>; 132 reg = <0xe0180000 0x54>;
133 interrupts = <0 125 IRQ_TYPE_NONE>; 133 interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
134 clocks = <&sti_sclk>; 134 clocks = <&sti_sclk>;
135 clock-names = "sclk"; 135 clock-names = "sclk";
136 }; 136 };
@@ -138,7 +138,7 @@
138 uart@e1020000 { 138 uart@e1020000 {
139 compatible = "renesas,em-uart"; 139 compatible = "renesas,em-uart";
140 reg = <0xe1020000 0x38>; 140 reg = <0xe1020000 0x38>;
141 interrupts = <0 8 IRQ_TYPE_NONE>; 141 interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
142 clocks = <&usia_u0_sclk>; 142 clocks = <&usia_u0_sclk>;
143 clock-names = "sclk"; 143 clock-names = "sclk";
144 }; 144 };
@@ -146,7 +146,7 @@
146 uart@e1030000 { 146 uart@e1030000 {
147 compatible = "renesas,em-uart"; 147 compatible = "renesas,em-uart";
148 reg = <0xe1030000 0x38>; 148 reg = <0xe1030000 0x38>;
149 interrupts = <0 9 IRQ_TYPE_NONE>; 149 interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
150 clocks = <&usib_u1_sclk>; 150 clocks = <&usib_u1_sclk>;
151 clock-names = "sclk"; 151 clock-names = "sclk";
152 }; 152 };
@@ -154,7 +154,7 @@
154 uart@e1040000 { 154 uart@e1040000 {
155 compatible = "renesas,em-uart"; 155 compatible = "renesas,em-uart";
156 reg = <0xe1040000 0x38>; 156 reg = <0xe1040000 0x38>;
157 interrupts = <0 10 IRQ_TYPE_NONE>; 157 interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
158 clocks = <&usib_u2_sclk>; 158 clocks = <&usib_u2_sclk>;
159 clock-names = "sclk"; 159 clock-names = "sclk";
160 }; 160 };
@@ -162,7 +162,7 @@
162 uart@e1050000 { 162 uart@e1050000 {
163 compatible = "renesas,em-uart"; 163 compatible = "renesas,em-uart";
164 reg = <0xe1050000 0x38>; 164 reg = <0xe1050000 0x38>;
165 interrupts = <0 11 IRQ_TYPE_NONE>; 165 interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
166 clocks = <&usib_u3_sclk>; 166 clocks = <&usib_u3_sclk>;
167 clock-names = "sclk"; 167 clock-names = "sclk";
168 }; 168 };
@@ -170,8 +170,8 @@
170 gpio0: gpio@e0050000 { 170 gpio0: gpio@e0050000 {
171 compatible = "renesas,em-gio"; 171 compatible = "renesas,em-gio";
172 reg = <0xe0050000 0x2c>, <0xe0050040 0x20>; 172 reg = <0xe0050000 0x2c>, <0xe0050040 0x20>;
173 interrupts = <0 67 IRQ_TYPE_NONE>, 173 interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>,
174 <0 68 IRQ_TYPE_NONE>; 174 <0 68 IRQ_TYPE_LEVEL_HIGH>;
175 gpio-controller; 175 gpio-controller;
176 #gpio-cells = <2>; 176 #gpio-cells = <2>;
177 ngpios = <32>; 177 ngpios = <32>;
@@ -181,8 +181,8 @@
181 gpio1: gpio@e0050080 { 181 gpio1: gpio@e0050080 {
182 compatible = "renesas,em-gio"; 182 compatible = "renesas,em-gio";
183 reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>; 183 reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>;
184 interrupts = <0 69 IRQ_TYPE_NONE>, 184 interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>,
185 <0 70 IRQ_TYPE_NONE>; 185 <0 70 IRQ_TYPE_LEVEL_HIGH>;
186 gpio-controller; 186 gpio-controller;
187 #gpio-cells = <2>; 187 #gpio-cells = <2>;
188 ngpios = <32>; 188 ngpios = <32>;
@@ -192,8 +192,8 @@
192 gpio2: gpio@e0050100 { 192 gpio2: gpio@e0050100 {
193 compatible = "renesas,em-gio"; 193 compatible = "renesas,em-gio";
194 reg = <0xe0050100 0x2c>, <0xe0050140 0x20>; 194 reg = <0xe0050100 0x2c>, <0xe0050140 0x20>;
195 interrupts = <0 71 IRQ_TYPE_NONE>, 195 interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>,
196 <0 72 IRQ_TYPE_NONE>; 196 <0 72 IRQ_TYPE_LEVEL_HIGH>;
197 gpio-controller; 197 gpio-controller;
198 #gpio-cells = <2>; 198 #gpio-cells = <2>;
199 ngpios = <32>; 199 ngpios = <32>;
@@ -203,8 +203,8 @@
203 gpio3: gpio@e0050180 { 203 gpio3: gpio@e0050180 {
204 compatible = "renesas,em-gio"; 204 compatible = "renesas,em-gio";
205 reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>; 205 reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>;
206 interrupts = <0 73 IRQ_TYPE_NONE>, 206 interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>,
207 <0 74 IRQ_TYPE_NONE>; 207 <0 74 IRQ_TYPE_LEVEL_HIGH>;
208 gpio-controller; 208 gpio-controller;
209 #gpio-cells = <2>; 209 #gpio-cells = <2>;
210 ngpios = <32>; 210 ngpios = <32>;
@@ -214,8 +214,8 @@
214 gpio4: gpio@e0050200 { 214 gpio4: gpio@e0050200 {
215 compatible = "renesas,em-gio"; 215 compatible = "renesas,em-gio";
216 reg = <0xe0050200 0x2c>, <0xe0050240 0x20>; 216 reg = <0xe0050200 0x2c>, <0xe0050240 0x20>;
217 interrupts = <0 75 IRQ_TYPE_NONE>, 217 interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>,
218 <0 76 IRQ_TYPE_NONE>; 218 <0 76 IRQ_TYPE_LEVEL_HIGH>;
219 gpio-controller; 219 gpio-controller;
220 #gpio-cells = <2>; 220 #gpio-cells = <2>;
221 ngpios = <31>; 221 ngpios = <31>;