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authorMartyn Welch <martyn.welch@ge.com>2012-03-12 13:13:00 -0400
committerKumar Gala <galak@kernel.crashing.org>2012-03-16 12:15:48 -0400
commite041013ac0df7fc7dea73c9ca73a33ab5b48d155 (patch)
tree223d3cc0558010519456af6caffa0df1fd4cf03f
parent44b24b74abc37e3c0f28c8288178056f10074863 (diff)
powerpc/85xx: Board support for GE IMP3A
Initial board support for the GE IMP3A, a 3U compactPCI card with a p2020 processor. Signed-off-by: Martyn Welch <martyn.welch@ge.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat
-rw-r--r--arch/powerpc/boot/dts/ge_imp3a.dts255
-rw-r--r--arch/powerpc/configs/85xx/ge_imp3a_defconfig257
-rw-r--r--arch/powerpc/platforms/85xx/Kconfig15
-rw-r--r--arch/powerpc/platforms/85xx/Makefile1
-rw-r--r--arch/powerpc/platforms/85xx/ge_imp3a.c246
-rw-r--r--drivers/gpio/gpio-ge.c28
6 files changed, 802 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/ge_imp3a.dts b/arch/powerpc/boot/dts/ge_imp3a.dts
new file mode 100644
index 000000000000..fefae416a097
--- /dev/null
+++ b/arch/powerpc/boot/dts/ge_imp3a.dts
@@ -0,0 +1,255 @@
1/*
2 * GE IMP3A Device Tree Source
3 *
4 * Copyright 2010-2011 GE Intelligent Platforms Embedded Systems, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * Based on: P2020 DS Device Tree Source
12 * Copyright 2009 Freescale Semiconductor Inc.
13 */
14
15/include/ "fsl/p2020si-pre.dtsi"
16
17/ {
18 model = "GE_IMP3A";
19 compatible = "ge,imp3a";
20
21 memory {
22 device_type = "memory";
23 };
24
25 lbc: localbus@fef05000 {
26 reg = <0 0xfef05000 0 0x1000>;
27
28 ranges = <0x0 0x0 0x0 0xff000000 0x01000000
29 0x1 0x0 0x0 0xe0000000 0x08000000
30 0x2 0x0 0x0 0xe8000000 0x08000000
31 0x3 0x0 0x0 0xfc100000 0x00020000
32 0x4 0x0 0x0 0xfc000000 0x00008000
33 0x5 0x0 0x0 0xfc008000 0x00008000
34 0x6 0x0 0x0 0xfee00000 0x00040000
35 0x7 0x0 0x0 0xfee80000 0x00040000>;
36
37 /* nor@0,0 is a mirror of part of the memory in nor@1,0
38 nor@0,0 {
39 #address-cells = <1>;
40 #size-cells = <1>;
41 compatible = "ge,imp3a-firmware-mirror", "cfi-flash";
42 reg = <0x0 0x0 0x1000000>;
43 bank-width = <2>;
44 device-width = <1>;
45
46 partition@0 {
47 label = "firmware";
48 reg = <0x0 0x1000000>;
49 read-only;
50 };
51 };
52 */
53
54 nor@1,0 {
55 #address-cells = <1>;
56 #size-cells = <1>;
57 compatible = "ge,imp3a-paged-flash", "cfi-flash";
58 reg = <0x1 0x0 0x8000000>;
59 bank-width = <2>;
60 device-width = <1>;
61
62 partition@0 {
63 label = "user";
64 reg = <0x0 0x7800000>;
65 };
66
67 partition@7800000 {
68 label = "firmware";
69 reg = <0x7800000 0x800000>;
70 read-only;
71 };
72 };
73
74 nvram@3,0 {
75 device_type = "nvram";
76 compatible = "simtek,stk14ca8";
77 reg = <0x3 0x0 0x20000>;
78 };
79
80 fpga@4,0 {
81 compatible = "ge,imp3a-fpga-regs";
82 reg = <0x4 0x0 0x20>;
83 };
84
85 gef_pic: pic@4,20 {
86 #interrupt-cells = <1>;
87 interrupt-controller;
88 device_type = "interrupt-controller";
89 compatible = "ge,imp3a-fpga-pic", "gef,fpga-pic-1.00";
90 reg = <0x4 0x20 0x20>;
91 interrupts = <6 7 0 0>;
92 };
93
94 gef_gpio: gpio@4,400 {
95 #gpio-cells = <2>;
96 compatible = "ge,imp3a-gpio";
97 reg = <0x4 0x400 0x24>;
98 gpio-controller;
99 };
100
101 wdt@4,800 {
102 compatible = "ge,imp3a-fpga-wdt", "gef,fpga-wdt-1.00",
103 "gef,fpga-wdt";
104 reg = <0x4 0x800 0x8>;
105 interrupts = <10 4>;
106 interrupt-parent = <&gef_pic>;
107 };
108
109 /* Second watchdog available, driver currently supports one.
110 wdt@4,808 {
111 compatible = "gef,imp3a-fpga-wdt", "gef,fpga-wdt-1.00",
112 "gef,fpga-wdt";
113 reg = <0x4 0x808 0x8>;
114 interrupts = <9 4>;
115 interrupt-parent = <&gef_pic>;
116 };
117 */
118
119 nand@6,0 {
120 compatible = "fsl,elbc-fcm-nand";
121 reg = <0x6 0x0 0x40000>;
122 };
123
124 nand@7,0 {
125 compatible = "fsl,elbc-fcm-nand";
126 reg = <0x7 0x0 0x40000>;
127 };
128 };
129
130 soc: soc@fef00000 {
131 ranges = <0x0 0 0xfef00000 0x100000>;
132
133 i2c@3000 {
134 hwmon@48 {
135 compatible = "national,lm92";
136 reg = <0x48>;
137 };
138
139 hwmon@4c {
140 compatible = "adi,adt7461";
141 reg = <0x4c>;
142 };
143
144 rtc@51 {
145 compatible = "epson,rx8581";
146 reg = <0x51>;
147 };
148
149 eti@6b {
150 compatible = "dallas,ds1682";
151 reg = <0x6b>;
152 };
153 };
154
155 usb@22000 {
156 phy_type = "ulpi";
157 dr_mode = "host";
158 };
159
160 mdio@24520 {
161 phy0: ethernet-phy@0 {
162 interrupt-parent = <&gef_pic>;
163 interrupts = <0xc 0x4>;
164 reg = <0x1>;
165 };
166 phy1: ethernet-phy@1 {
167 interrupt-parent = <&gef_pic>;
168 interrupts = <0xb 0x4>;
169 reg = <0x2>;
170 };
171 tbi0: tbi-phy@11 {
172 reg = <0x11>;
173 device_type = "tbi-phy";
174 };
175 };
176
177 mdio@25520 {
178 tbi1: tbi-phy@11 {
179 reg = <0x11>;
180 device_type = "tbi-phy";
181 };
182 };
183
184 mdio@26520 {
185 status = "disabled";
186 };
187
188 enet0: ethernet@24000 {
189 tbi-handle = <&tbi0>;
190 phy-handle = <&phy0>;
191 phy-connection-type = "gmii";
192 };
193
194 enet1: ethernet@25000 {
195 tbi-handle = <&tbi1>;
196 phy-handle = <&phy1>;
197 phy-connection-type = "gmii";
198 };
199
200 enet2: ethernet@26000 {
201 status = "disabled";
202 };
203 };
204
205 pci0: pcie@fef08000 {
206 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
207 0x1000000 0x0 0x00000000 0 0xfe020000 0x0 0x10000>;
208 reg = <0 0xfef08000 0 0x1000>;
209
210 pcie@0 {
211 ranges = <0x2000000 0x0 0xc0000000
212 0x2000000 0x0 0xc0000000
213 0x0 0x20000000
214
215 0x1000000 0x0 0x0
216 0x1000000 0x0 0x0
217 0x0 0x10000>;
218 };
219 };
220
221 pci1: pcie@fef09000 {
222 reg = <0 0xfef09000 0 0x1000>;
223 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
224 0x1000000 0x0 0x00000000 0 0xfe010000 0x0 0x10000>;
225
226 pcie@0 {
227 ranges = <0x2000000 0x0 0xa0000000
228 0x2000000 0x0 0xa0000000
229 0x0 0x20000000
230
231 0x1000000 0x0 0x0
232 0x1000000 0x0 0x0
233 0x0 0x10000>;
234 };
235
236 };
237
238 pci2: pcie@fef0a000 {
239 reg = <0 0xfef0a000 0 0x1000>;
240 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
241 0x1000000 0x0 0x00000000 0 0xfe000000 0x0 0x10000>;
242
243 pcie@0 {
244 ranges = <0x2000000 0x0 0x80000000
245 0x2000000 0x0 0x80000000
246 0x0 0x20000000
247
248 0x1000000 0x0 0x0
249 0x1000000 0x0 0x0
250 0x0 0x10000>;
251 };
252 };
253};
254
255/include/ "fsl/p2020si-post.dtsi"
diff --git a/arch/powerpc/configs/85xx/ge_imp3a_defconfig b/arch/powerpc/configs/85xx/ge_imp3a_defconfig
new file mode 100644
index 000000000000..f8c51a4ab995
--- /dev/null
+++ b/arch/powerpc/configs/85xx/ge_imp3a_defconfig
@@ -0,0 +1,257 @@
1CONFIG_PPC_85xx=y
2CONFIG_SMP=y
3CONFIG_NR_CPUS=2
4CONFIG_EXPERIMENTAL=y
5CONFIG_SYSVIPC=y
6CONFIG_POSIX_MQUEUE=y
7CONFIG_BSD_PROCESS_ACCT=y
8CONFIG_BSD_PROCESS_ACCT_V3=y
9CONFIG_SPARSE_IRQ=y
10CONFIG_IKCONFIG=y
11CONFIG_IKCONFIG_PROC=y
12# CONFIG_UTS_NS is not set
13# CONFIG_IPC_NS is not set
14# CONFIG_USER_NS is not set
15# CONFIG_PID_NS is not set
16# CONFIG_NET_NS is not set
17CONFIG_SYSFS_DEPRECATED=y
18CONFIG_SYSFS_DEPRECATED_V2=y
19CONFIG_RELAY=y
20CONFIG_BLK_DEV_INITRD=y
21CONFIG_PERF_EVENTS=y
22CONFIG_SLAB=y
23CONFIG_MODULES=y
24CONFIG_MODULE_UNLOAD=y
25# CONFIG_BLK_DEV_BSG is not set
26CONFIG_GE_IMP3A=y
27CONFIG_QUICC_ENGINE=y
28CONFIG_QE_GPIO=y
29CONFIG_CPM2=y
30CONFIG_HIGHMEM=y
31CONFIG_HIGH_RES_TIMERS=y
32CONFIG_HZ_1000=y
33CONFIG_PREEMPT=y
34# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
35CONFIG_BINFMT_MISC=m
36CONFIG_MATH_EMULATION=y
37CONFIG_IRQ_ALL_CPUS=y
38CONFIG_FORCE_MAX_ZONEORDER=17
39CONFIG_PCI=y
40CONFIG_PCIEPORTBUS=y
41CONFIG_PCI_MSI=y
42CONFIG_PCCARD=y
43# CONFIG_PCMCIA_LOAD_CIS is not set
44CONFIG_YENTA=y
45CONFIG_NET=y
46CONFIG_PACKET=y
47CONFIG_UNIX=y
48CONFIG_XFRM_USER=m
49CONFIG_NET_KEY=y
50CONFIG_INET=y
51CONFIG_IP_MULTICAST=y
52CONFIG_IP_ADVANCED_ROUTER=y
53CONFIG_IP_MULTIPLE_TABLES=y
54CONFIG_IP_ROUTE_MULTIPATH=y
55CONFIG_IP_ROUTE_VERBOSE=y
56CONFIG_IP_PNP=y
57CONFIG_IP_PNP_DHCP=y
58CONFIG_IP_PNP_BOOTP=y
59CONFIG_IP_PNP_RARP=y
60CONFIG_NET_IPIP=m
61CONFIG_IP_MROUTE=y
62CONFIG_IP_PIMSM_V1=y
63CONFIG_IP_PIMSM_V2=y
64CONFIG_SYN_COOKIES=y
65CONFIG_INET_AH=m
66CONFIG_INET_ESP=m
67CONFIG_INET_IPCOMP=m
68# CONFIG_INET_XFRM_MODE_BEET is not set
69CONFIG_INET6_AH=m
70CONFIG_INET6_IPCOMP=m
71CONFIG_IPV6_TUNNEL=m
72CONFIG_NET_PKTGEN=m
73CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
74CONFIG_MTD=y
75CONFIG_MTD_OF_PARTS=y
76CONFIG_MTD_CHAR=y
77CONFIG_MTD_BLOCK=y
78CONFIG_MTD_CFI=y
79CONFIG_MTD_JEDECPROBE=y
80CONFIG_MTD_CFI_INTELEXT=y
81CONFIG_MTD_CFI_AMDSTD=y
82CONFIG_MTD_PHYSMAP_OF=y
83CONFIG_MTD_NAND=y
84CONFIG_MTD_NAND_FSL_ELBC=y
85CONFIG_PROC_DEVICETREE=y
86CONFIG_BLK_DEV_LOOP=m
87CONFIG_BLK_DEV_CRYPTOLOOP=m
88CONFIG_BLK_DEV_NBD=m
89CONFIG_BLK_DEV_RAM=y
90CONFIG_BLK_DEV_RAM_SIZE=131072
91CONFIG_MISC_DEVICES=y
92CONFIG_DS1682=y
93CONFIG_BLK_DEV_SD=y
94CONFIG_CHR_DEV_ST=y
95CONFIG_BLK_DEV_SR=y
96CONFIG_ATA=y
97CONFIG_SATA_AHCI=y
98CONFIG_SATA_SIL24=y
99# CONFIG_ATA_SFF is not set
100CONFIG_NETDEVICES=y
101CONFIG_BONDING=m
102CONFIG_DUMMY=m
103CONFIG_NETCONSOLE=y
104CONFIG_NETPOLL_TRAP=y
105CONFIG_TUN=m
106# CONFIG_NET_VENDOR_3COM is not set
107CONFIG_FS_ENET=y
108CONFIG_UCC_GETH=y
109CONFIG_GIANFAR=y
110CONFIG_PPP=m
111CONFIG_PPP_BSDCOMP=m
112CONFIG_PPP_DEFLATE=m
113CONFIG_PPP_FILTER=y
114CONFIG_PPP_MULTILINK=y
115CONFIG_PPPOE=m
116CONFIG_PPP_ASYNC=m
117CONFIG_PPP_SYNC_TTY=m
118CONFIG_SLIP=m
119CONFIG_SLIP_COMPRESSED=y
120CONFIG_SLIP_SMART=y
121CONFIG_SLIP_MODE_SLIP6=y
122# CONFIG_INPUT_KEYBOARD is not set
123# CONFIG_INPUT_MOUSE is not set
124# CONFIG_SERIO is not set
125# CONFIG_LEGACY_PTYS is not set
126CONFIG_SERIAL_8250=y
127CONFIG_SERIAL_8250_CONSOLE=y
128CONFIG_SERIAL_8250_NR_UARTS=2
129CONFIG_SERIAL_8250_RUNTIME_UARTS=2
130CONFIG_SERIAL_8250_EXTENDED=y
131CONFIG_SERIAL_8250_MANY_PORTS=y
132CONFIG_SERIAL_8250_DETECT_IRQ=y
133CONFIG_SERIAL_8250_RSA=y
134CONFIG_SERIAL_QE=m
135CONFIG_NVRAM=y
136CONFIG_I2C=y
137CONFIG_I2C_CHARDEV=y
138CONFIG_I2C_CPM=m
139CONFIG_I2C_MPC=y
140CONFIG_GPIO_SYSFS=y
141CONFIG_GPIO_GE_FPGA=y
142CONFIG_SENSORS_LM90=y
143CONFIG_SENSORS_LM92=y
144CONFIG_WATCHDOG=y
145CONFIG_GEF_WDT=y
146CONFIG_VIDEO_OUTPUT_CONTROL=m
147CONFIG_HID_DRAGONRISE=y
148CONFIG_HID_GYRATION=y
149CONFIG_HID_TWINHAN=y
150CONFIG_HID_ORTEK=y
151CONFIG_HID_PANTHERLORD=y
152CONFIG_HID_PETALYNX=y
153CONFIG_HID_SAMSUNG=y
154CONFIG_HID_SONY=y
155CONFIG_HID_SUNPLUS=y
156CONFIG_HID_GREENASIA=y
157CONFIG_HID_SMARTJOYPLUS=y
158CONFIG_HID_TOPSEED=y
159CONFIG_HID_THRUSTMASTER=y
160CONFIG_HID_ZEROPLUS=y
161CONFIG_USB=y
162CONFIG_USB_DEVICEFS=y
163CONFIG_USB_EHCI_HCD=y
164# CONFIG_USB_EHCI_TT_NEWSCHED is not set
165CONFIG_USB_EHCI_FSL=y
166CONFIG_USB_OHCI_HCD=y
167CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
168CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
169CONFIG_USB_STORAGE=y
170CONFIG_EDAC=y
171CONFIG_EDAC_MM_EDAC=y
172CONFIG_EDAC_MPC85XX=y
173CONFIG_RTC_CLASS=y
174# CONFIG_RTC_INTF_PROC is not set
175CONFIG_RTC_DRV_RX8581=y
176CONFIG_DMADEVICES=y
177CONFIG_FSL_DMA=y
178# CONFIG_NET_DMA is not set
179CONFIG_EXT2_FS=y
180CONFIG_EXT2_FS_XATTR=y
181CONFIG_EXT2_FS_POSIX_ACL=y
182CONFIG_EXT3_FS=y
183# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
184CONFIG_EXT3_FS_POSIX_ACL=y
185CONFIG_EXT4_FS=y
186CONFIG_FUSE_FS=y
187CONFIG_ISO9660_FS=y
188CONFIG_JOLIET=y
189CONFIG_ZISOFS=y
190CONFIG_UDF_FS=y
191CONFIG_MSDOS_FS=y
192CONFIG_VFAT_FS=y
193CONFIG_FAT_DEFAULT_CODEPAGE=850
194CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
195CONFIG_NTFS_FS=y
196CONFIG_PROC_KCORE=y
197CONFIG_TMPFS=y
198CONFIG_JFFS2_FS=y
199CONFIG_NFS_FS=y
200CONFIG_NFS_V3=y
201CONFIG_NFS_V4=y
202CONFIG_ROOT_NFS=y
203CONFIG_NFSD=y
204CONFIG_NFSD_V4=y
205CONFIG_CIFS=m
206CONFIG_CIFS_XATTR=y
207CONFIG_CIFS_POSIX=y
208CONFIG_NLS_CODEPAGE_437=y
209CONFIG_NLS_CODEPAGE_737=m
210CONFIG_NLS_CODEPAGE_775=m
211CONFIG_NLS_CODEPAGE_850=y
212CONFIG_NLS_CODEPAGE_852=m
213CONFIG_NLS_CODEPAGE_855=m
214CONFIG_NLS_CODEPAGE_857=m
215CONFIG_NLS_CODEPAGE_860=m
216CONFIG_NLS_CODEPAGE_861=m
217CONFIG_NLS_CODEPAGE_862=m
218CONFIG_NLS_CODEPAGE_863=m
219CONFIG_NLS_CODEPAGE_864=m
220CONFIG_NLS_CODEPAGE_865=m
221CONFIG_NLS_CODEPAGE_866=m
222CONFIG_NLS_CODEPAGE_869=m
223CONFIG_NLS_CODEPAGE_936=m
224CONFIG_NLS_CODEPAGE_950=m
225CONFIG_NLS_CODEPAGE_932=m
226CONFIG_NLS_CODEPAGE_949=m
227CONFIG_NLS_CODEPAGE_874=m
228CONFIG_NLS_ISO8859_8=m
229CONFIG_NLS_CODEPAGE_1250=m
230CONFIG_NLS_CODEPAGE_1251=m
231CONFIG_NLS_ASCII=y
232CONFIG_NLS_ISO8859_1=y
233CONFIG_NLS_ISO8859_2=m
234CONFIG_NLS_ISO8859_3=m
235CONFIG_NLS_ISO8859_4=m
236CONFIG_NLS_ISO8859_5=m
237CONFIG_NLS_ISO8859_6=m
238CONFIG_NLS_ISO8859_7=m
239CONFIG_NLS_ISO8859_9=m
240CONFIG_NLS_ISO8859_13=m
241CONFIG_NLS_ISO8859_14=m
242CONFIG_NLS_ISO8859_15=y
243CONFIG_NLS_KOI8_R=m
244CONFIG_NLS_KOI8_U=m
245CONFIG_NLS_UTF8=y
246CONFIG_CRC_CCITT=y
247CONFIG_CRC_T10DIF=y
248CONFIG_LIBCRC32C=y
249CONFIG_MAGIC_SYSRQ=y
250CONFIG_SYSCTL_SYSCALL_CHECK=y
251CONFIG_CRYPTO_CBC=y
252CONFIG_CRYPTO_MD5=y
253CONFIG_CRYPTO_SHA256=m
254CONFIG_CRYPTO_SHA512=m
255CONFIG_CRYPTO_DES=y
256# CONFIG_CRYPTO_ANSI_CPRNG is not set
257CONFIG_CRYPTO_DEV_TALITOS=y
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index b221236aade8..4c91ea97d885 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -172,6 +172,21 @@ config SBC8560
172 help 172 help
173 This option enables support for the Wind River SBC8560 board 173 This option enables support for the Wind River SBC8560 board
174 174
175config GE_IMP3A
176 bool "GE Intelligent Platforms IMP3A"
177 select DEFAULT_UIMAGE
178 select SWIOTLB
179 select MMIO_NVRAM
180 select GENERIC_GPIO
181 select ARCH_REQUIRE_GPIOLIB
182 select GE_FPGA
183 help
184 This option enables support for the GE Intelligent Platforms IMP3A
185 board.
186
187 This board is a 3U CompactPCI Single Board Computer with a Freescale
188 P2020 processor.
189
175config P2041_RDB 190config P2041_RDB
176 bool "Freescale P2041 RDB" 191 bool "Freescale P2041 RDB"
177 select DEFAULT_UIMAGE 192 select DEFAULT_UIMAGE
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index 9cb2d4320dcc..2125d4ca068a 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -27,3 +27,4 @@ obj-$(CONFIG_SBC8548) += sbc8548.o
27obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o 27obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o
28obj-$(CONFIG_KSI8560) += ksi8560.o 28obj-$(CONFIG_KSI8560) += ksi8560.o
29obj-$(CONFIG_XES_MPC85xx) += xes_mpc85xx.o 29obj-$(CONFIG_XES_MPC85xx) += xes_mpc85xx.o
30obj-$(CONFIG_GE_IMP3A) += ge_imp3a.o
diff --git a/arch/powerpc/platforms/85xx/ge_imp3a.c b/arch/powerpc/platforms/85xx/ge_imp3a.c
new file mode 100644
index 000000000000..d50056f424f6
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/ge_imp3a.c
@@ -0,0 +1,246 @@
1/*
2 * GE IMP3A Board Setup
3 *
4 * Author Martyn Welch <martyn.welch@ge.com>
5 *
6 * Copyright 2010 GE Intelligent Platforms Embedded Systems, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * Based on: mpc85xx_ds.c (MPC85xx DS Board Setup)
14 * Copyright 2007 Freescale Semiconductor Inc.
15 */
16
17#include <linux/stddef.h>
18#include <linux/kernel.h>
19#include <linux/pci.h>
20#include <linux/kdev_t.h>
21#include <linux/delay.h>
22#include <linux/seq_file.h>
23#include <linux/interrupt.h>
24#include <linux/of_platform.h>
25#include <linux/memblock.h>
26
27#include <asm/system.h>
28#include <asm/time.h>
29#include <asm/machdep.h>
30#include <asm/pci-bridge.h>
31#include <mm/mmu_decl.h>
32#include <asm/prom.h>
33#include <asm/udbg.h>
34#include <asm/mpic.h>
35#include <asm/swiotlb.h>
36#include <asm/nvram.h>
37
38#include <sysdev/fsl_soc.h>
39#include <sysdev/fsl_pci.h>
40#include "smp.h"
41
42#include "mpc85xx.h"
43#include <sysdev/ge/ge_pic.h>
44
45void __iomem *imp3a_regs;
46
47void __init ge_imp3a_pic_init(void)
48{
49 struct mpic *mpic;
50 struct device_node *np;
51 struct device_node *cascade_node = NULL;
52 unsigned long root = of_get_flat_dt_root();
53
54 if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) {
55 mpic = mpic_alloc(NULL, 0,
56 MPIC_NO_RESET |
57 MPIC_BIG_ENDIAN |
58 MPIC_SINGLE_DEST_CPU,
59 0, 256, " OpenPIC ");
60 } else {
61 mpic = mpic_alloc(NULL, 0,
62 MPIC_BIG_ENDIAN |
63 MPIC_SINGLE_DEST_CPU,
64 0, 256, " OpenPIC ");
65 }
66
67 BUG_ON(mpic == NULL);
68 mpic_init(mpic);
69 /*
70 * There is a simple interrupt handler in the main FPGA, this needs
71 * to be cascaded into the MPIC
72 */
73 for_each_node_by_type(np, "interrupt-controller")
74 if (of_device_is_compatible(np, "gef,fpga-pic-1.00")) {
75 cascade_node = np;
76 break;
77 }
78
79 if (cascade_node == NULL) {
80 printk(KERN_WARNING "IMP3A: No FPGA PIC\n");
81 return;
82 }
83
84 gef_pic_init(cascade_node);
85 of_node_put(cascade_node);
86}
87
88#ifdef CONFIG_PCI
89static int primary_phb_addr;
90#endif /* CONFIG_PCI */
91
92/*
93 * Setup the architecture
94 */
95static void __init ge_imp3a_setup_arch(void)
96{
97 struct device_node *regs;
98#ifdef CONFIG_PCI
99 struct device_node *np;
100 struct pci_controller *hose;
101#endif
102 dma_addr_t max = 0xffffffff;
103
104 if (ppc_md.progress)
105 ppc_md.progress("ge_imp3a_setup_arch()", 0);
106
107#ifdef CONFIG_PCI
108 for_each_node_by_type(np, "pci") {
109 if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
110 of_device_is_compatible(np, "fsl,mpc8548-pcie") ||
111 of_device_is_compatible(np, "fsl,p2020-pcie")) {
112 struct resource rsrc;
113 of_address_to_resource(np, 0, &rsrc);
114 if ((rsrc.start & 0xfffff) == primary_phb_addr)
115 fsl_add_bridge(np, 1);
116 else
117 fsl_add_bridge(np, 0);
118
119 hose = pci_find_hose_for_OF_device(np);
120 max = min(max, hose->dma_window_base_cur +
121 hose->dma_window_size);
122 }
123 }
124#endif
125
126 mpc85xx_smp_init();
127
128#ifdef CONFIG_SWIOTLB
129 if (memblock_end_of_DRAM() > max) {
130 ppc_swiotlb_enable = 1;
131 set_pci_dma_ops(&swiotlb_dma_ops);
132 ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
133 }
134#endif
135
136 /* Remap basic board registers */
137 regs = of_find_compatible_node(NULL, NULL, "ge,imp3a-fpga-regs");
138 if (regs) {
139 imp3a_regs = of_iomap(regs, 0);
140 if (imp3a_regs == NULL)
141 printk(KERN_WARNING "Unable to map board registers\n");
142 of_node_put(regs);
143 }
144
145#if defined(CONFIG_MMIO_NVRAM)
146 mmio_nvram_init();
147#endif
148
149 printk(KERN_INFO "GE Intelligent Platforms IMP3A 3U cPCI SBC\n");
150}
151
152/* Return the PCB revision */
153static unsigned int ge_imp3a_get_pcb_rev(void)
154{
155 unsigned int reg;
156
157 reg = ioread16(imp3a_regs);
158 return (reg >> 8) & 0xff;
159}
160
161/* Return the board (software) revision */
162static unsigned int ge_imp3a_get_board_rev(void)
163{
164 unsigned int reg;
165
166 reg = ioread16(imp3a_regs + 0x2);
167 return reg & 0xff;
168}
169
170/* Return the FPGA revision */
171static unsigned int ge_imp3a_get_fpga_rev(void)
172{
173 unsigned int reg;
174
175 reg = ioread16(imp3a_regs + 0x2);
176 return (reg >> 8) & 0xff;
177}
178
179/* Return compactPCI Geographical Address */
180static unsigned int ge_imp3a_get_cpci_geo_addr(void)
181{
182 unsigned int reg;
183
184 reg = ioread16(imp3a_regs + 0x6);
185 return (reg & 0x0f00) >> 8;
186}
187
188/* Return compactPCI System Controller Status */
189static unsigned int ge_imp3a_get_cpci_is_syscon(void)
190{
191 unsigned int reg;
192
193 reg = ioread16(imp3a_regs + 0x6);
194 return reg & (1 << 12);
195}
196
197static void ge_imp3a_show_cpuinfo(struct seq_file *m)
198{
199 seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");
200
201 seq_printf(m, "Revision\t: %u%c\n", ge_imp3a_get_pcb_rev(),
202 ('A' + ge_imp3a_get_board_rev() - 1));
203
204 seq_printf(m, "FPGA Revision\t: %u\n", ge_imp3a_get_fpga_rev());
205
206 seq_printf(m, "cPCI geo. addr\t: %u\n", ge_imp3a_get_cpci_geo_addr());
207
208 seq_printf(m, "cPCI syscon\t: %s\n",
209 ge_imp3a_get_cpci_is_syscon() ? "yes" : "no");
210}
211
212/*
213 * Called very early, device-tree isn't unflattened
214 */
215static int __init ge_imp3a_probe(void)
216{
217 unsigned long root = of_get_flat_dt_root();
218
219 if (of_flat_dt_is_compatible(root, "ge,IMP3A")) {
220#ifdef CONFIG_PCI
221 primary_phb_addr = 0x9000;
222#endif
223 return 1;
224 }
225
226 return 0;
227}
228
229machine_device_initcall(ge_imp3a, mpc85xx_common_publish_devices);
230
231machine_arch_initcall(ge_imp3a, swiotlb_setup_bus_notifier);
232
233define_machine(ge_imp3a) {
234 .name = "GE_IMP3A",
235 .probe = ge_imp3a_probe,
236 .setup_arch = ge_imp3a_setup_arch,
237 .init_IRQ = ge_imp3a_pic_init,
238 .show_cpuinfo = ge_imp3a_show_cpuinfo,
239#ifdef CONFIG_PCI
240 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
241#endif
242 .get_irq = mpic_get_irq,
243 .restart = fsl_rstcr_restart,
244 .calibrate_decr = generic_calibrate_decr,
245 .progress = udbg_progress,
246};
diff --git a/drivers/gpio/gpio-ge.c b/drivers/gpio/gpio-ge.c
index f8e628952921..7b95a4a8318c 100644
--- a/drivers/gpio/gpio-ge.c
+++ b/drivers/gpio/gpio-ge.c
@@ -162,6 +162,34 @@ static int __init gef_gpio_init(void)
162 } 162 }
163 } 163 }
164 164
165 for_each_compatible_node(np, NULL, "ge,imp3a-gpio") {
166
167 pr_debug("%s: Initialising GE GPIO\n", np->full_name);
168
169 /* Allocate chip structure */
170 gef_gpio_chip = kzalloc(sizeof(*gef_gpio_chip), GFP_KERNEL);
171 if (!gef_gpio_chip) {
172 pr_err("%s: Unable to allocate structure\n",
173 np->full_name);
174 continue;
175 }
176
177 /* Setup pointers to chip functions */
178 gef_gpio_chip->gc.of_gpio_n_cells = 2;
179 gef_gpio_chip->gc.ngpio = 16;
180 gef_gpio_chip->gc.direction_input = gef_gpio_dir_in;
181 gef_gpio_chip->gc.direction_output = gef_gpio_dir_out;
182 gef_gpio_chip->gc.get = gef_gpio_get;
183 gef_gpio_chip->gc.set = gef_gpio_set;
184
185 /* This function adds a memory mapped GPIO chip */
186 retval = of_mm_gpiochip_add(np, gef_gpio_chip);
187 if (retval) {
188 kfree(gef_gpio_chip);
189 pr_err("%s: Unable to add GPIO\n", np->full_name);
190 }
191 }
192
165 return 0; 193 return 0;
166}; 194};
167arch_initcall(gef_gpio_init); 195arch_initcall(gef_gpio_init);
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-07 22:42:18 -0400