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authorStephen Hemminger <shemminger@vyatta.com>2008-05-30 12:49:58 -0400
committerJeff Garzik <jgarzik@redhat.com>2008-05-30 22:18:02 -0400
commitdfc2c0a6db926749bd49101503644bf915f70e45 (patch)
tree73a2e2105b9779135a13454ea0de955c3df576e4
parenta3ccc78968f00b6589653c1cccadb7940594935a (diff)
tlan: wrap source lines
Make driver more readable on standard 80 col windows. Signed-off-by: Stephen Hemminger <shemminger@vyatta.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat
-rw-r--r--drivers/net/tlan.c294
-rw-r--r--drivers/net/tlan.h24
2 files changed, 203 insertions, 115 deletions
diff --git a/drivers/net/tlan.c b/drivers/net/tlan.c
index 01aa331e1838..85246ed7cb9c 100644
--- a/drivers/net/tlan.c
+++ b/drivers/net/tlan.c
@@ -13,8 +13,6 @@
13 * This software may be used and distributed according to the terms 13 * This software may be used and distributed according to the terms
14 * of the GNU General Public License, incorporated herein by reference. 14 * of the GNU General Public License, incorporated herein by reference.
15 * 15 *
16 ** This file is best viewed/edited with columns>=132.
17 *
18 ** Useful (if not required) reading: 16 ** Useful (if not required) reading:
19 * 17 *
20 * Texas Instruments, ThunderLAN Programmer's Guide, 18 * Texas Instruments, ThunderLAN Programmer's Guide,
@@ -236,9 +234,11 @@ static struct board {
236 { "Compaq Netelligent 10 T PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, 234 { "Compaq Netelligent 10 T PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
237 { "Compaq Netelligent 10/100 TX PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, 235 { "Compaq Netelligent 10/100 TX PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
238 { "Compaq Integrated NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 }, 236 { "Compaq Integrated NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
239 { "Compaq NetFlex-3/P", TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 }, 237 { "Compaq NetFlex-3/P",
238 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
240 { "Compaq NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 }, 239 { "Compaq NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
241 { "Compaq Netelligent Integrated 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, 240 { "Compaq Netelligent Integrated 10/100 TX UTP",
241 TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
242 { "Compaq Netelligent Dual 10/100 TX PCI UTP", TLAN_ADAPTER_NONE, 0x83 }, 242 { "Compaq Netelligent Dual 10/100 TX PCI UTP", TLAN_ADAPTER_NONE, 0x83 },
243 { "Compaq Netelligent 10/100 TX Embedded UTP", TLAN_ADAPTER_NONE, 0x83 }, 243 { "Compaq Netelligent 10/100 TX Embedded UTP", TLAN_ADAPTER_NONE, 0x83 },
244 { "Olicom OC-2183/2185", TLAN_ADAPTER_USE_INTERN_10, 0x83 }, 244 { "Olicom OC-2183/2185", TLAN_ADAPTER_USE_INTERN_10, 0x83 },
@@ -246,8 +246,9 @@ static struct board {
246 { "Olicom OC-2326", TLAN_ADAPTER_USE_INTERN_10, 0xF8 }, 246 { "Olicom OC-2326", TLAN_ADAPTER_USE_INTERN_10, 0xF8 },
247 { "Compaq Netelligent 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, 247 { "Compaq Netelligent 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
248 { "Compaq Netelligent 10 T/2 PCI UTP/Coax", TLAN_ADAPTER_NONE, 0x83 }, 248 { "Compaq Netelligent 10 T/2 PCI UTP/Coax", TLAN_ADAPTER_NONE, 0x83 },
249 { "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED | /* EISA card */ 249 { "Compaq NetFlex-3/E",
250 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 }, 250 TLAN_ADAPTER_ACTIVITY_LED | /* EISA card */
251 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
251 { "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, /* EISA card */ 252 { "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, /* EISA card */
252}; 253};
253 254
@@ -292,7 +293,8 @@ static int TLan_Close( struct net_device *);
292static struct net_device_stats *TLan_GetStats( struct net_device *); 293static struct net_device_stats *TLan_GetStats( struct net_device *);
293static void TLan_SetMulticastList( struct net_device *); 294static void TLan_SetMulticastList( struct net_device *);
294static int TLan_ioctl( struct net_device *dev, struct ifreq *rq, int cmd); 295static int TLan_ioctl( struct net_device *dev, struct ifreq *rq, int cmd);
295static int TLan_probe1( struct pci_dev *pdev, long ioaddr, int irq, int rev, const struct pci_device_id *ent); 296static int TLan_probe1( struct pci_dev *pdev, long ioaddr,
297 int irq, int rev, const struct pci_device_id *ent);
296static void TLan_tx_timeout( struct net_device *dev); 298static void TLan_tx_timeout( struct net_device *dev);
297static void TLan_tx_timeout_work(struct work_struct *work); 299static void TLan_tx_timeout_work(struct work_struct *work);
298static int tlan_init_one( struct pci_dev *pdev, const struct pci_device_id *ent); 300static int tlan_init_one( struct pci_dev *pdev, const struct pci_device_id *ent);
@@ -439,7 +441,9 @@ static void __devexit tlan_remove_one( struct pci_dev *pdev)
439 unregister_netdev( dev ); 441 unregister_netdev( dev );
440 442
441 if ( priv->dmaStorage ) { 443 if ( priv->dmaStorage ) {
442 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage, priv->dmaStorageDMA ); 444 pci_free_consistent(priv->pciDev,
445 priv->dmaSize, priv->dmaStorage,
446 priv->dmaStorageDMA );
443 } 447 }
444 448
445#ifdef CONFIG_PCI 449#ifdef CONFIG_PCI
@@ -522,7 +526,8 @@ static int __devinit tlan_init_one( struct pci_dev *pdev,
522 **************************************************************/ 526 **************************************************************/
523 527
524static int __devinit TLan_probe1(struct pci_dev *pdev, 528static int __devinit TLan_probe1(struct pci_dev *pdev,
525 long ioaddr, int irq, int rev, const struct pci_device_id *ent ) 529 long ioaddr, int irq, int rev,
530 const struct pci_device_id *ent )
526{ 531{
527 532
528 struct net_device *dev; 533 struct net_device *dev;
@@ -608,8 +613,10 @@ static int __devinit TLan_probe1(struct pci_dev *pdev,
608 /* Kernel parameters */ 613 /* Kernel parameters */
609 if (dev->mem_start) { 614 if (dev->mem_start) {
610 priv->aui = dev->mem_start & 0x01; 615 priv->aui = dev->mem_start & 0x01;
611 priv->duplex = ((dev->mem_start & 0x06) == 0x06) ? 0 : (dev->mem_start & 0x06) >> 1; 616 priv->duplex = ((dev->mem_start & 0x06) == 0x06) ? 0
612 priv->speed = ((dev->mem_start & 0x18) == 0x18) ? 0 : (dev->mem_start & 0x18) >> 3; 617 : (dev->mem_start & 0x06) >> 1;
618 priv->speed = ((dev->mem_start & 0x18) == 0x18) ? 0
619 : (dev->mem_start & 0x18) >> 3;
613 620
614 if (priv->speed == 0x1) { 621 if (priv->speed == 0x1) {
615 priv->speed = TLAN_SPEED_10; 622 priv->speed = TLAN_SPEED_10;
@@ -689,7 +696,8 @@ static void TLan_Eisa_Cleanup(void)
689 dev = TLan_Eisa_Devices; 696 dev = TLan_Eisa_Devices;
690 priv = netdev_priv(dev); 697 priv = netdev_priv(dev);
691 if (priv->dmaStorage) { 698 if (priv->dmaStorage) {
692 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage, priv->dmaStorageDMA ); 699 pci_free_consistent(priv->pciDev, priv->dmaSize,
700 priv->dmaStorage, priv->dmaStorageDMA );
693 } 701 }
694 release_region( dev->base_addr, 0x10); 702 release_region( dev->base_addr, 0x10);
695 unregister_netdev( dev ); 703 unregister_netdev( dev );
@@ -744,8 +752,10 @@ static void __init TLan_EisaProbe (void)
744 /* Loop through all slots of the EISA bus */ 752 /* Loop through all slots of the EISA bus */
745 for (ioaddr = 0x1000; ioaddr < 0x9000; ioaddr += 0x1000) { 753 for (ioaddr = 0x1000; ioaddr < 0x9000; ioaddr += 0x1000) {
746 754
747 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n", (int) ioaddr + 0xC80, inw(ioaddr + EISA_ID)); 755 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n",
748 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n", (int) ioaddr + 0xC82, inw(ioaddr + EISA_ID2)); 756 (int) ioaddr + 0xC80, inw(ioaddr + EISA_ID));
757 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n",
758 (int) ioaddr + 0xC82, inw(ioaddr + EISA_ID2));
749 759
750 760
751 TLAN_DBG(TLAN_DEBUG_PROBE, "Probing for EISA adapter at IO: 0x%4x : ", 761 TLAN_DBG(TLAN_DEBUG_PROBE, "Probing for EISA adapter at IO: 0x%4x : ",
@@ -872,9 +882,12 @@ static int TLan_Init( struct net_device *dev )
872 882
873 if ( bbuf ) { 883 if ( bbuf ) {
874 priv->rxBuffer = (u8 *) ( priv->txList + TLAN_NUM_TX_LISTS ); 884 priv->rxBuffer = (u8 *) ( priv->txList + TLAN_NUM_TX_LISTS );
875 priv->rxBufferDMA =priv->txListDMA + sizeof(TLanList) * TLAN_NUM_TX_LISTS; 885 priv->rxBufferDMA =priv->txListDMA
876 priv->txBuffer = priv->rxBuffer + ( TLAN_NUM_RX_LISTS * TLAN_MAX_FRAME_SIZE ); 886 + sizeof(TLanList) * TLAN_NUM_TX_LISTS;
877 priv->txBufferDMA = priv->rxBufferDMA + ( TLAN_NUM_RX_LISTS * TLAN_MAX_FRAME_SIZE ); 887 priv->txBuffer = priv->rxBuffer
888 + ( TLAN_NUM_RX_LISTS * TLAN_MAX_FRAME_SIZE );
889 priv->txBufferDMA = priv->rxBufferDMA
890 + ( TLAN_NUM_RX_LISTS * TLAN_MAX_FRAME_SIZE );
878 } 891 }
879 892
880 err = 0; 893 err = 0;
@@ -938,7 +951,8 @@ static int TLan_Open( struct net_device *dev )
938 dev->name, dev ); 951 dev->name, dev );
939 952
940 if ( err ) { 953 if ( err ) {
941 printk(KERN_ERR "TLAN: Cannot open %s because IRQ %d is already in use.\n", dev->name, dev->irq ); 954 pr_err("TLAN: Cannot open %s because IRQ %d is already in use.\n",
955 dev->name, dev->irq );
942 return err; 956 return err;
943 } 957 }
944 958
@@ -952,7 +966,8 @@ static int TLan_Open( struct net_device *dev )
952 TLan_ReadAndClearStats( dev, TLAN_IGNORE ); 966 TLan_ReadAndClearStats( dev, TLAN_IGNORE );
953 TLan_ResetAdapter( dev ); 967 TLan_ResetAdapter( dev );
954 968
955 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Opened. TLAN Chip Rev: %x\n", dev->name, priv->tlanRev ); 969 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Opened. TLAN Chip Rev: %x\n",
970 dev->name, priv->tlanRev );
956 971
957 return 0; 972 return 0;
958 973
@@ -990,14 +1005,16 @@ static int TLan_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
990 1005
991 1006
992 case SIOCGMIIREG: /* Read MII PHY register. */ 1007 case SIOCGMIIREG: /* Read MII PHY register. */
993 TLan_MiiReadReg(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, &data->val_out); 1008 TLan_MiiReadReg(dev, data->phy_id & 0x1f,
1009 data->reg_num & 0x1f, &data->val_out);
994 return 0; 1010 return 0;
995 1011
996 1012
997 case SIOCSMIIREG: /* Write MII PHY register. */ 1013 case SIOCSMIIREG: /* Write MII PHY register. */
998 if (!capable(CAP_NET_ADMIN)) 1014 if (!capable(CAP_NET_ADMIN))
999 return -EPERM; 1015 return -EPERM;
1000 TLan_MiiWriteReg(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in); 1016 TLan_MiiWriteReg(dev, data->phy_id & 0x1f,
1017 data->reg_num & 0x1f, data->val_in);
1001 return 0; 1018 return 0;
1002 default: 1019 default:
1003 return -EOPNOTSUPP; 1020 return -EOPNOTSUPP;
@@ -1082,7 +1099,8 @@ static int TLan_StartTx( struct sk_buff *skb, struct net_device *dev )
1082 unsigned long flags; 1099 unsigned long flags;
1083 1100
1084 if ( ! priv->phyOnline ) { 1101 if ( ! priv->phyOnline ) {
1085 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s PHY is not ready\n", dev->name ); 1102 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s PHY is not ready\n",
1103 dev->name );
1086 dev_kfree_skb_any(skb); 1104 dev_kfree_skb_any(skb);
1087 return 0; 1105 return 0;
1088 } 1106 }
@@ -1094,7 +1112,9 @@ static int TLan_StartTx( struct sk_buff *skb, struct net_device *dev )
1094 tail_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txTail; 1112 tail_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txTail;
1095 1113
1096 if ( tail_list->cStat != TLAN_CSTAT_UNUSED ) { 1114 if ( tail_list->cStat != TLAN_CSTAT_UNUSED ) {
1097 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s is busy (Head=%d Tail=%d)\n", dev->name, priv->txHead, priv->txTail ); 1115 TLAN_DBG( TLAN_DEBUG_TX,
1116 "TRANSMIT: %s is busy (Head=%d Tail=%d)\n",
1117 dev->name, priv->txHead, priv->txTail );
1098 netif_stop_queue(dev); 1118 netif_stop_queue(dev);
1099 priv->txBusyCount++; 1119 priv->txBusyCount++;
1100 return 1; 1120 return 1;
@@ -1106,7 +1126,9 @@ static int TLan_StartTx( struct sk_buff *skb, struct net_device *dev )
1106 tail_buffer = priv->txBuffer + ( priv->txTail * TLAN_MAX_FRAME_SIZE ); 1126 tail_buffer = priv->txBuffer + ( priv->txTail * TLAN_MAX_FRAME_SIZE );
1107 skb_copy_from_linear_data(skb, tail_buffer, skb->len); 1127 skb_copy_from_linear_data(skb, tail_buffer, skb->len);
1108 } else { 1128 } else {
1109 tail_list->buffer[0].address = pci_map_single(priv->pciDev, skb->data, skb->len, PCI_DMA_TODEVICE); 1129 tail_list->buffer[0].address = pci_map_single(priv->pciDev,
1130 skb->data, skb->len,
1131 PCI_DMA_TODEVICE);
1110 TLan_StoreSKB(tail_list, skb); 1132 TLan_StoreSKB(tail_list, skb);
1111 } 1133 }
1112 1134
@@ -1119,15 +1141,19 @@ static int TLan_StartTx( struct sk_buff *skb, struct net_device *dev )
1119 tail_list->cStat = TLAN_CSTAT_READY; 1141 tail_list->cStat = TLAN_CSTAT_READY;
1120 if ( ! priv->txInProgress ) { 1142 if ( ! priv->txInProgress ) {
1121 priv->txInProgress = 1; 1143 priv->txInProgress = 1;
1122 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Starting TX on buffer %d\n", priv->txTail ); 1144 TLAN_DBG( TLAN_DEBUG_TX,
1145 "TRANSMIT: Starting TX on buffer %d\n", priv->txTail );
1123 outl( tail_list_phys, dev->base_addr + TLAN_CH_PARM ); 1146 outl( tail_list_phys, dev->base_addr + TLAN_CH_PARM );
1124 outl( TLAN_HC_GO, dev->base_addr + TLAN_HOST_CMD ); 1147 outl( TLAN_HC_GO, dev->base_addr + TLAN_HOST_CMD );
1125 } else { 1148 } else {
1126 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Adding buffer %d to TX channel\n", priv->txTail ); 1149 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Adding buffer %d to TX channel\n",
1150 priv->txTail );
1127 if ( priv->txTail == 0 ) { 1151 if ( priv->txTail == 0 ) {
1128 ( priv->txList + ( TLAN_NUM_TX_LISTS - 1 ) )->forward = tail_list_phys; 1152 ( priv->txList + ( TLAN_NUM_TX_LISTS - 1 ) )->forward
1153 = tail_list_phys;
1129 } else { 1154 } else {
1130 ( priv->txList + ( priv->txTail - 1 ) )->forward = tail_list_phys; 1155 ( priv->txList + ( priv->txTail - 1 ) )->forward
1156 = tail_list_phys;
1131 } 1157 }
1132 } 1158 }
1133 spin_unlock_irqrestore(&priv->lock, flags); 1159 spin_unlock_irqrestore(&priv->lock, flags);
@@ -1260,8 +1286,10 @@ static struct net_device_stats *TLan_GetStats( struct net_device *dev )
1260 /* Should only read stats if open ? */ 1286 /* Should only read stats if open ? */
1261 TLan_ReadAndClearStats( dev, TLAN_RECORD ); 1287 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1262 1288
1263 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: %s EOC count = %d\n", dev->name, priv->rxEocCount ); 1289 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: %s EOC count = %d\n", dev->name,
1264 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s Busy count = %d\n", dev->name, priv->txBusyCount ); 1290 priv->rxEocCount );
1291 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s Busy count = %d\n", dev->name,
1292 priv->txBusyCount );
1265 if ( debug & TLAN_DEBUG_GNRL ) { 1293 if ( debug & TLAN_DEBUG_GNRL ) {
1266 TLan_PrintDio( dev->base_addr ); 1294 TLan_PrintDio( dev->base_addr );
1267 TLan_PhyPrint( dev ); 1295 TLan_PhyPrint( dev );
@@ -1311,10 +1339,12 @@ static void TLan_SetMulticastList( struct net_device *dev )
1311 1339
1312 if ( dev->flags & IFF_PROMISC ) { 1340 if ( dev->flags & IFF_PROMISC ) {
1313 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD ); 1341 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
1314 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, tmp | TLAN_NET_CMD_CAF ); 1342 TLan_DioWrite8( dev->base_addr,
1343 TLAN_NET_CMD, tmp | TLAN_NET_CMD_CAF );
1315 } else { 1344 } else {
1316 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD ); 1345 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
1317 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, tmp & ~TLAN_NET_CMD_CAF ); 1346 TLan_DioWrite8( dev->base_addr,
1347 TLAN_NET_CMD, tmp & ~TLAN_NET_CMD_CAF );
1318 if ( dev->flags & IFF_ALLMULTI ) { 1348 if ( dev->flags & IFF_ALLMULTI ) {
1319 for ( i = 0; i < 3; i++ ) 1349 for ( i = 0; i < 3; i++ )
1320 TLan_SetMac( dev, i + 1, NULL ); 1350 TLan_SetMac( dev, i + 1, NULL );
@@ -1323,7 +1353,8 @@ static void TLan_SetMulticastList( struct net_device *dev )
1323 } else { 1353 } else {
1324 for ( i = 0; i < dev->mc_count; i++ ) { 1354 for ( i = 0; i < dev->mc_count; i++ ) {
1325 if ( i < 3 ) { 1355 if ( i < 3 ) {
1326 TLan_SetMac( dev, i + 1, (char *) &dmi->dmi_addr ); 1356 TLan_SetMac( dev, i + 1,
1357 (char *) &dmi->dmi_addr );
1327 } else { 1358 } else {
1328 offset = TLan_HashFunc( (u8 *) &dmi->dmi_addr ); 1359 offset = TLan_HashFunc( (u8 *) &dmi->dmi_addr );
1329 if ( offset < 32 ) 1360 if ( offset < 32 )
@@ -1390,14 +1421,16 @@ static u32 TLan_HandleTxEOF( struct net_device *dev, u16 host_int )
1390 u32 ack = 0; 1421 u32 ack = 0;
1391 u16 tmpCStat; 1422 u16 tmpCStat;
1392 1423
1393 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOF (Head=%d Tail=%d)\n", priv->txHead, priv->txTail ); 1424 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOF (Head=%d Tail=%d)\n",
1425 priv->txHead, priv->txTail );
1394 head_list = priv->txList + priv->txHead; 1426 head_list = priv->txList + priv->txHead;
1395 1427
1396 while (((tmpCStat = head_list->cStat ) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) { 1428 while (((tmpCStat = head_list->cStat ) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) {
1397 ack++; 1429 ack++;
1398 if ( ! bbuf ) { 1430 if ( ! bbuf ) {
1399 struct sk_buff *skb = TLan_GetSKB(head_list); 1431 struct sk_buff *skb = TLan_GetSKB(head_list);
1400 pci_unmap_single(priv->pciDev, head_list->buffer[0].address, skb->len, PCI_DMA_TODEVICE); 1432 pci_unmap_single(priv->pciDev, head_list->buffer[0].address,
1433 skb->len, PCI_DMA_TODEVICE);
1401 dev_kfree_skb_any(skb); 1434 dev_kfree_skb_any(skb);
1402 head_list->buffer[8].address = 0; 1435 head_list->buffer[8].address = 0;
1403 head_list->buffer[9].address = 0; 1436 head_list->buffer[9].address = 0;
@@ -1418,7 +1451,9 @@ static u32 TLan_HandleTxEOF( struct net_device *dev, u16 host_int )
1418 printk(KERN_INFO "TLAN: Received interrupt for uncompleted TX frame.\n"); 1451 printk(KERN_INFO "TLAN: Received interrupt for uncompleted TX frame.\n");
1419 1452
1420 if ( eoc ) { 1453 if ( eoc ) {
1421 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOC (Head=%d Tail=%d)\n", priv->txHead, priv->txTail ); 1454 TLAN_DBG( TLAN_DEBUG_TX,
1455 "TRANSMIT: Handling TX EOC (Head=%d Tail=%d)\n",
1456 priv->txHead, priv->txTail );
1422 head_list = priv->txList + priv->txHead; 1457 head_list = priv->txList + priv->txHead;
1423 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead; 1458 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead;
1424 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) { 1459 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
@@ -1430,7 +1465,8 @@ static u32 TLan_HandleTxEOF( struct net_device *dev, u16 host_int )
1430 } 1465 }
1431 1466
1432 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) { 1467 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
1433 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT ); 1468 TLan_DioWrite8( dev->base_addr,
1469 TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1434 if ( priv->timer.function == NULL ) { 1470 if ( priv->timer.function == NULL ) {
1435 priv->timer.function = &TLan_Timer; 1471 priv->timer.function = &TLan_Timer;
1436 priv->timer.data = (unsigned long) dev; 1472 priv->timer.data = (unsigned long) dev;
@@ -1515,7 +1551,8 @@ static u32 TLan_HandleRxEOF( struct net_device *dev, u16 host_int )
1515 u16 tmpCStat; 1551 u16 tmpCStat;
1516 dma_addr_t head_list_phys; 1552 dma_addr_t head_list_phys;
1517 1553
1518 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOF (Head=%d Tail=%d)\n", priv->rxHead, priv->rxTail ); 1554 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOF (Head=%d Tail=%d)\n",
1555 priv->rxHead, priv->rxTail );
1519 head_list = priv->rxList + priv->rxHead; 1556 head_list = priv->rxList + priv->rxHead;
1520 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead; 1557 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1521 1558
@@ -1528,41 +1565,48 @@ static u32 TLan_HandleRxEOF( struct net_device *dev, u16 host_int )
1528 1565
1529 if (bbuf) { 1566 if (bbuf) {
1530 skb = netdev_alloc_skb(dev, frameSize + 7); 1567 skb = netdev_alloc_skb(dev, frameSize + 7);
1531 if ( skb ) { 1568 if ( !skb )
1532 head_buffer = priv->rxBuffer + (priv->rxHead * TLAN_MAX_FRAME_SIZE); 1569 goto drop_and_reuse;
1533 skb_reserve(skb, 2); 1570
1534 pci_dma_sync_single_for_cpu(priv->pciDev, 1571 head_buffer = priv->rxBuffer
1535 frameDma, frameSize, 1572 + (priv->rxHead * TLAN_MAX_FRAME_SIZE);
1536 PCI_DMA_FROMDEVICE); 1573 skb_reserve(skb, 2);
1537 skb_copy_from_linear_data(skb, head_buffer, frameSize); 1574 pci_dma_sync_single_for_cpu(priv->pciDev,
1538 skb_put(skb, frameSize); 1575 frameDma, frameSize,
1539 dev->stats.rx_bytes += frameSize; 1576 PCI_DMA_FROMDEVICE);
1540 1577 skb_copy_from_linear_data(skb, head_buffer, frameSize);
1541 skb->protocol = eth_type_trans( skb, dev ); 1578 skb_put(skb, frameSize);
1542 netif_rx( skb ); 1579 dev->stats.rx_bytes += frameSize;
1543 } 1580
1581 skb->protocol = eth_type_trans( skb, dev );
1582 netif_rx( skb );
1544 } else { 1583 } else {
1545 struct sk_buff *new_skb; 1584 struct sk_buff *new_skb;
1546 1585
1547 new_skb = netdev_alloc_skb(dev, TLAN_MAX_FRAME_SIZE + 7 ); 1586 new_skb = netdev_alloc_skb(dev, TLAN_MAX_FRAME_SIZE + 7 );
1548 if ( new_skb ) { 1587 if ( !new_skb )
1549 skb = TLan_GetSKB(head_list); 1588 goto drop_and_reuse;
1550 pci_unmap_single(priv->pciDev, frameDma, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
1551 skb_put( skb, frameSize );
1552 1589
1553 dev->stats.rx_bytes += frameSize; 1590 skb = TLan_GetSKB(head_list);
1591 pci_unmap_single(priv->pciDev, frameDma,
1592 TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
1593 skb_put( skb, frameSize );
1554 1594
1555 skb->protocol = eth_type_trans( skb, dev ); 1595 dev->stats.rx_bytes += frameSize;
1556 netif_rx( skb );
1557 1596
1558 skb_reserve( new_skb, NET_IP_ALIGN ); 1597 skb->protocol = eth_type_trans( skb, dev );
1559 head_list->buffer[0].address = pci_map_single(priv->pciDev, new_skb->data, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE); 1598 netif_rx( skb );
1560 1599
1561 TLan_StoreSKB(head_list, new_skb); 1600 skb_reserve( new_skb, NET_IP_ALIGN );
1562 } 1601 head_list->buffer[0].address = pci_map_single(priv->pciDev,
1602 new_skb->data,
1603 TLAN_MAX_FRAME_SIZE,
1604 PCI_DMA_FROMDEVICE);
1563 1605
1564 } 1606 TLan_StoreSKB(head_list, new_skb);
1565 1607
1608 }
1609drop_and_reuse:
1566 head_list->forward = 0; 1610 head_list->forward = 0;
1567 head_list->cStat = 0; 1611 head_list->cStat = 0;
1568 tail_list = priv->rxList + priv->rxTail; 1612 tail_list = priv->rxList + priv->rxTail;
@@ -1578,10 +1622,10 @@ static u32 TLan_HandleRxEOF( struct net_device *dev, u16 host_int )
1578 printk(KERN_INFO "TLAN: Received interrupt for uncompleted RX frame.\n"); 1622 printk(KERN_INFO "TLAN: Received interrupt for uncompleted RX frame.\n");
1579 1623
1580 1624
1581
1582
1583 if ( eoc ) { 1625 if ( eoc ) {
1584 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOC (Head=%d Tail=%d)\n", priv->rxHead, priv->rxTail ); 1626 TLAN_DBG( TLAN_DEBUG_RX,
1627 "RECEIVE: Handling RX EOC (Head=%d Tail=%d)\n",
1628 priv->rxHead, priv->rxTail );
1585 head_list = priv->rxList + priv->rxHead; 1629 head_list = priv->rxList + priv->rxHead;
1586 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead; 1630 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1587 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM ); 1631 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM );
@@ -1590,7 +1634,8 @@ static u32 TLan_HandleRxEOF( struct net_device *dev, u16 host_int )
1590 } 1634 }
1591 1635
1592 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) { 1636 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
1593 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT ); 1637 TLan_DioWrite8( dev->base_addr,
1638 TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1594 if ( priv->timer.function == NULL ) { 1639 if ( priv->timer.function == NULL ) {
1595 priv->timer.function = &TLan_Timer; 1640 priv->timer.function = &TLan_Timer;
1596 priv->timer.data = (unsigned long) dev; 1641 priv->timer.data = (unsigned long) dev;
@@ -1668,7 +1713,9 @@ static u32 TLan_HandleTxEOC( struct net_device *dev, u16 host_int )
1668 1713
1669 host_int = 0; 1714 host_int = 0;
1670 if ( priv->tlanRev < 0x30 ) { 1715 if ( priv->tlanRev < 0x30 ) {
1671 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOC (Head=%d Tail=%d) -- IRQ\n", priv->txHead, priv->txTail ); 1716 TLAN_DBG( TLAN_DEBUG_TX,
1717 "TRANSMIT: Handling TX EOC (Head=%d Tail=%d) -- IRQ\n",
1718 priv->txHead, priv->txTail );
1672 head_list = priv->txList + priv->txHead; 1719 head_list = priv->txList + priv->txHead;
1673 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead; 1720 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead;
1674 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) { 1721 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
@@ -1736,15 +1783,18 @@ static u32 TLan_HandleStatusCheck( struct net_device *dev, u16 host_int )
1736 net_sts = TLan_DioRead8( dev->base_addr, TLAN_NET_STS ); 1783 net_sts = TLan_DioRead8( dev->base_addr, TLAN_NET_STS );
1737 if ( net_sts ) { 1784 if ( net_sts ) {
1738 TLan_DioWrite8( dev->base_addr, TLAN_NET_STS, net_sts ); 1785 TLan_DioWrite8( dev->base_addr, TLAN_NET_STS, net_sts );
1739 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Net_Sts = %x\n", dev->name, (unsigned) net_sts ); 1786 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Net_Sts = %x\n",
1787 dev->name, (unsigned) net_sts );
1740 } 1788 }
1741 if ( ( net_sts & TLAN_NET_STS_MIRQ ) && ( priv->phyNum == 0 ) ) { 1789 if ( ( net_sts & TLAN_NET_STS_MIRQ ) && ( priv->phyNum == 0 ) ) {
1742 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_STS, &tlphy_sts ); 1790 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_STS, &tlphy_sts );
1743 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl ); 1791 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
1744 if ( ! ( tlphy_sts & TLAN_TS_POLOK ) && ! ( tlphy_ctl & TLAN_TC_SWAPOL ) ) { 1792 if ( ! ( tlphy_sts & TLAN_TS_POLOK ) &&
1793 ! ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1745 tlphy_ctl |= TLAN_TC_SWAPOL; 1794 tlphy_ctl |= TLAN_TC_SWAPOL;
1746 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl); 1795 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
1747 } else if ( ( tlphy_sts & TLAN_TS_POLOK ) && ( tlphy_ctl & TLAN_TC_SWAPOL ) ) { 1796 } else if ( ( tlphy_sts & TLAN_TS_POLOK )
1797 && ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1748 tlphy_ctl &= ~TLAN_TC_SWAPOL; 1798 tlphy_ctl &= ~TLAN_TC_SWAPOL;
1749 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl); 1799 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
1750 } 1800 }
@@ -1789,7 +1839,9 @@ static u32 TLan_HandleRxEOC( struct net_device *dev, u16 host_int )
1789 u32 ack = 1; 1839 u32 ack = 1;
1790 1840
1791 if ( priv->tlanRev < 0x30 ) { 1841 if ( priv->tlanRev < 0x30 ) {
1792 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOC (Head=%d Tail=%d) -- IRQ\n", priv->rxHead, priv->rxTail ); 1842 TLAN_DBG( TLAN_DEBUG_RX,
1843 "RECEIVE: Handling RX EOC (Head=%d Tail=%d) -- IRQ\n",
1844 priv->rxHead, priv->rxTail );
1793 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead; 1845 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1794 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM ); 1846 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM );
1795 ack |= TLAN_HC_GO | TLAN_HC_RT; 1847 ack |= TLAN_HC_GO | TLAN_HC_RT;
@@ -1880,10 +1932,12 @@ static void TLan_Timer( unsigned long data )
1880 if ( priv->timer.function == NULL ) { 1932 if ( priv->timer.function == NULL ) {
1881 elapsed = jiffies - priv->timerSetAt; 1933 elapsed = jiffies - priv->timerSetAt;
1882 if ( elapsed >= TLAN_TIMER_ACT_DELAY ) { 1934 if ( elapsed >= TLAN_TIMER_ACT_DELAY ) {
1883 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK ); 1935 TLan_DioWrite8( dev->base_addr,
1936 TLAN_LED_REG, TLAN_LED_LINK );
1884 } else { 1937 } else {
1885 priv->timer.function = &TLan_Timer; 1938 priv->timer.function = &TLan_Timer;
1886 priv->timer.expires = priv->timerSetAt + TLAN_TIMER_ACT_DELAY; 1939 priv->timer.expires = priv->timerSetAt
1940 + TLAN_TIMER_ACT_DELAY;
1887 spin_unlock_irqrestore(&priv->lock, flags); 1941 spin_unlock_irqrestore(&priv->lock, flags);
1888 add_timer( &priv->timer ); 1942 add_timer( &priv->timer );
1889 break; 1943 break;
@@ -1938,7 +1992,8 @@ static void TLan_ResetLists( struct net_device *dev )
1938 list = priv->txList + i; 1992 list = priv->txList + i;
1939 list->cStat = TLAN_CSTAT_UNUSED; 1993 list->cStat = TLAN_CSTAT_UNUSED;
1940 if ( bbuf ) { 1994 if ( bbuf ) {
1941 list->buffer[0].address = priv->txBufferDMA + ( i * TLAN_MAX_FRAME_SIZE ); 1995 list->buffer[0].address = priv->txBufferDMA
1996 + ( i * TLAN_MAX_FRAME_SIZE );
1942 } else { 1997 } else {
1943 list->buffer[0].address = 0; 1998 list->buffer[0].address = 0;
1944 } 1999 }
@@ -1957,16 +2012,19 @@ static void TLan_ResetLists( struct net_device *dev )
1957 list->frameSize = TLAN_MAX_FRAME_SIZE; 2012 list->frameSize = TLAN_MAX_FRAME_SIZE;
1958 list->buffer[0].count = TLAN_MAX_FRAME_SIZE | TLAN_LAST_BUFFER; 2013 list->buffer[0].count = TLAN_MAX_FRAME_SIZE | TLAN_LAST_BUFFER;
1959 if ( bbuf ) { 2014 if ( bbuf ) {
1960 list->buffer[0].address = priv->rxBufferDMA + ( i * TLAN_MAX_FRAME_SIZE ); 2015 list->buffer[0].address = priv->rxBufferDMA
2016 + ( i * TLAN_MAX_FRAME_SIZE );
1961 } else { 2017 } else {
1962 skb = netdev_alloc_skb(dev, TLAN_MAX_FRAME_SIZE + 7 ); 2018 skb = netdev_alloc_skb(dev, TLAN_MAX_FRAME_SIZE + 7 );
1963 if ( !skb ) { 2019 if ( !skb ) {
1964 printk( "TLAN: Couldn't allocate memory for received data.\n" ); 2020 pr_err("TLAN: out of memory for received data.\n" );
1965 break; 2021 break;
1966 } 2022 }
1967 2023
1968 skb_reserve( skb, NET_IP_ALIGN ); 2024 skb_reserve( skb, NET_IP_ALIGN );
1969 list->buffer[0].address = pci_map_single(priv->pciDev, t, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE); 2025 list->buffer[0].address = pci_map_single(priv->pciDev, t,
2026 TLAN_MAX_FRAME_SIZE,
2027 PCI_DMA_FROMDEVICE);
1970 TLan_StoreSKB(list, skb); 2028 TLan_StoreSKB(list, skb);
1971 } 2029 }
1972 list->buffer[1].count = 0; 2030 list->buffer[1].count = 0;
@@ -1996,7 +2054,9 @@ static void TLan_FreeLists( struct net_device *dev )
1996 list = priv->txList + i; 2054 list = priv->txList + i;
1997 skb = TLan_GetSKB(list); 2055 skb = TLan_GetSKB(list);
1998 if ( skb ) { 2056 if ( skb ) {
1999 pci_unmap_single(priv->pciDev, list->buffer[0].address, skb->len, PCI_DMA_TODEVICE); 2057 pci_unmap_single(priv->pciDev,
2058 list->buffer[0].address, skb->len,
2059 PCI_DMA_TODEVICE);
2000 dev_kfree_skb_any( skb ); 2060 dev_kfree_skb_any( skb );
2001 list->buffer[8].address = 0; 2061 list->buffer[8].address = 0;
2002 list->buffer[9].address = 0; 2062 list->buffer[9].address = 0;
@@ -2007,7 +2067,10 @@ static void TLan_FreeLists( struct net_device *dev )
2007 list = priv->rxList + i; 2067 list = priv->rxList + i;
2008 skb = TLan_GetSKB(list); 2068 skb = TLan_GetSKB(list);
2009 if ( skb ) { 2069 if ( skb ) {
2010 pci_unmap_single(priv->pciDev, list->buffer[0].address, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE); 2070 pci_unmap_single(priv->pciDev,
2071 list->buffer[0].address,
2072 TLAN_MAX_FRAME_SIZE,
2073 PCI_DMA_FROMDEVICE);
2011 dev_kfree_skb_any( skb ); 2074 dev_kfree_skb_any( skb );
2012 list->buffer[8].address = 0; 2075 list->buffer[8].address = 0;
2013 list->buffer[9].address = 0; 2076 list->buffer[9].address = 0;
@@ -2038,7 +2101,8 @@ static void TLan_PrintDio( u16 io_base )
2038 u32 data0, data1; 2101 u32 data0, data1;
2039 int i; 2102 int i;
2040 2103
2041 printk( "TLAN: Contents of internal registers for io base 0x%04hx.\n", io_base ); 2104 printk( "TLAN: Contents of internal registers for io base 0x%04hx.\n",
2105 io_base );
2042 printk( "TLAN: Off. +0 +4\n" ); 2106 printk( "TLAN: Off. +0 +4\n" );
2043 for ( i = 0; i < 0x4C; i+= 8 ) { 2107 for ( i = 0; i < 0x4C; i+= 8 ) {
2044 data0 = TLan_DioRead32( io_base, i ); 2108 data0 = TLan_DioRead32( io_base, i );
@@ -2078,7 +2142,8 @@ static void TLan_PrintList( TLanList *list, char *type, int num)
2078 printk( "TLAN: Frame Size = 0x%04hx\n", list->frameSize ); 2142 printk( "TLAN: Frame Size = 0x%04hx\n", list->frameSize );
2079 /* for ( i = 0; i < 10; i++ ) { */ 2143 /* for ( i = 0; i < 10; i++ ) { */
2080 for ( i = 0; i < 2; i++ ) { 2144 for ( i = 0; i < 2; i++ ) {
2081 printk( "TLAN: Buffer[%d].count, addr = 0x%08x, 0x%08x\n", i, list->buffer[i].count, list->buffer[i].address ); 2145 printk( "TLAN: Buffer[%d].count, addr = 0x%08x, 0x%08x\n",
2146 i, list->buffer[i].count, list->buffer[i].address );
2082 } 2147 }
2083 2148
2084} /* TLan_PrintList */ 2149} /* TLan_PrintList */
@@ -2294,14 +2359,16 @@ TLan_FinishReset( struct net_device *dev )
2294 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &tlphy_id1 ); 2359 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &tlphy_id1 );
2295 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &tlphy_id2 ); 2360 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &tlphy_id2 );
2296 2361
2297 if ( ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) || ( priv->aui ) ) { 2362 if ( ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) ||
2363 ( priv->aui ) ) {
2298 status = MII_GS_LINK; 2364 status = MII_GS_LINK;
2299 printk( "TLAN: %s: Link forced.\n", dev->name ); 2365 printk( "TLAN: %s: Link forced.\n", dev->name );
2300 } else { 2366 } else {
2301 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status ); 2367 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2302 udelay( 1000 ); 2368 udelay( 1000 );
2303 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status ); 2369 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2304 if ( (status & MII_GS_LINK) && /* We only support link info on Nat.Sem. PHY's */ 2370 if ( (status & MII_GS_LINK) &&
2371 /* We only support link info on Nat.Sem. PHY's */
2305 (tlphy_id1 == NAT_SEM_ID1) && 2372 (tlphy_id1 == NAT_SEM_ID1) &&
2306 (tlphy_id2 == NAT_SEM_ID2) ) { 2373 (tlphy_id2 == NAT_SEM_ID2) ) {
2307 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &partner ); 2374 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &partner );
@@ -2310,12 +2377,12 @@ TLan_FinishReset( struct net_device *dev )
2310 printk( "TLAN: %s: Link active with ", dev->name ); 2377 printk( "TLAN: %s: Link active with ", dev->name );
2311 if (!(tlphy_par & TLAN_PHY_AN_EN_STAT)) { 2378 if (!(tlphy_par & TLAN_PHY_AN_EN_STAT)) {
2312 printk( "forced 10%sMbps %s-Duplex\n", 2379 printk( "forced 10%sMbps %s-Duplex\n",
2313 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0", 2380 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0",
2314 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half"); 2381 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half");
2315 } else { 2382 } else {
2316 printk( "AutoNegotiation enabled, at 10%sMbps %s-Duplex\n", 2383 printk( "AutoNegotiation enabled, at 10%sMbps %s-Duplex\n",
2317 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0", 2384 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0",
2318 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half"); 2385 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half");
2319 printk("TLAN: Partner capability: "); 2386 printk("TLAN: Partner capability: ");
2320 for (i = 5; i <= 10; i++) 2387 for (i = 5; i <= 10; i++)
2321 if (partner & (1<<i)) 2388 if (partner & (1<<i))
@@ -2356,7 +2423,8 @@ TLan_FinishReset( struct net_device *dev )
2356 outl( TLAN_HC_GO | TLAN_HC_RT, dev->base_addr + TLAN_HOST_CMD ); 2423 outl( TLAN_HC_GO | TLAN_HC_RT, dev->base_addr + TLAN_HOST_CMD );
2357 netif_carrier_on(dev); 2424 netif_carrier_on(dev);
2358 } else { 2425 } else {
2359 printk( "TLAN: %s: Link inactive, will retry in 10 secs...\n", dev->name ); 2426 printk( "TLAN: %s: Link inactive, will retry in 10 secs...\n",
2427 dev->name );
2360 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_FINISH_RESET ); 2428 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_FINISH_RESET );
2361 return; 2429 return;
2362 } 2430 }
@@ -2396,10 +2464,12 @@ static void TLan_SetMac( struct net_device *dev, int areg, char *mac )
2396 2464
2397 if ( mac != NULL ) { 2465 if ( mac != NULL ) {
2398 for ( i = 0; i < 6; i++ ) 2466 for ( i = 0; i < 6; i++ )
2399 TLan_DioWrite8( dev->base_addr, TLAN_AREG_0 + areg + i, mac[i] ); 2467 TLan_DioWrite8( dev->base_addr,
2468 TLAN_AREG_0 + areg + i, mac[i] );
2400 } else { 2469 } else {
2401 for ( i = 0; i < 6; i++ ) 2470 for ( i = 0; i < 6; i++ )
2402 TLan_DioWrite8( dev->base_addr, TLAN_AREG_0 + areg + i, 0 ); 2471 TLan_DioWrite8( dev->base_addr,
2472 TLAN_AREG_0 + areg + i, 0 );
2403 } 2473 }
2404 2474
2405} /* TLan_SetMac */ 2475} /* TLan_SetMac */
@@ -2505,9 +2575,13 @@ static void TLan_PhyDetect( struct net_device *dev )
2505 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &control ); 2575 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &control );
2506 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &hi ); 2576 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &hi );
2507 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &lo ); 2577 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &lo );
2508 if ( ( control != 0xFFFF ) || ( hi != 0xFFFF ) || ( lo != 0xFFFF ) ) { 2578 if ( ( control != 0xFFFF ) ||
2509 TLAN_DBG( TLAN_DEBUG_GNRL, "PHY found at %02x %04x %04x %04x\n", phy, control, hi, lo ); 2579 ( hi != 0xFFFF ) || ( lo != 0xFFFF ) ) {
2510 if ( ( priv->phy[1] == TLAN_PHY_NONE ) && ( phy != TLAN_PHY_MAX_ADDR ) ) { 2580 TLAN_DBG( TLAN_DEBUG_GNRL,
2581 "PHY found at %02x %04x %04x %04x\n",
2582 phy, control, hi, lo );
2583 if ( ( priv->phy[1] == TLAN_PHY_NONE ) &&
2584 ( phy != TLAN_PHY_MAX_ADDR ) ) {
2511 priv->phy[1] = phy; 2585 priv->phy[1] = phy;
2512 } 2586 }
2513 } 2587 }
@@ -2535,7 +2609,9 @@ static void TLan_PhyPowerDown( struct net_device *dev )
2535 value = MII_GC_PDOWN | MII_GC_LOOPBK | MII_GC_ISOLATE; 2609 value = MII_GC_PDOWN | MII_GC_LOOPBK | MII_GC_ISOLATE;
2536 TLan_MiiSync( dev->base_addr ); 2610 TLan_MiiSync( dev->base_addr );
2537 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value ); 2611 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
2538 if ( ( priv->phyNum == 0 ) && ( priv->phy[1] != TLAN_PHY_NONE ) && ( ! ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) ) ) { 2612 if ( ( priv->phyNum == 0 ) &&
2613 ( priv->phy[1] != TLAN_PHY_NONE ) &&
2614 ( ! ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) ) ) {
2539 TLan_MiiSync( dev->base_addr ); 2615 TLan_MiiSync( dev->base_addr );
2540 TLan_MiiWriteReg( dev, priv->phy[1], MII_GEN_CTL, value ); 2616 TLan_MiiWriteReg( dev, priv->phy[1], MII_GEN_CTL, value );
2541 } 2617 }
@@ -2708,10 +2784,10 @@ static void TLan_PhyFinishAutoNeg( struct net_device *dev )
2708 * more time. Perhaps we should fail after a while. 2784 * more time. Perhaps we should fail after a while.
2709 */ 2785 */
2710 if (!priv->neg_be_verbose++) { 2786 if (!priv->neg_be_verbose++) {
2711 printk(KERN_INFO "TLAN: Giving autonegotiation more time.\n"); 2787 pr_info("TLAN: Giving autonegotiation more time.\n");
2712 printk(KERN_INFO "TLAN: Please check that your adapter has\n"); 2788 pr_info("TLAN: Please check that your adapter has\n");
2713 printk(KERN_INFO "TLAN: been properly connected to a HUB or Switch.\n"); 2789 pr_info("TLAN: been properly connected to a HUB or Switch.\n");
2714 printk(KERN_INFO "TLAN: Trying to establish link in the background...\n"); 2790 pr_info("TLAN: Trying to establish link in the background...\n");
2715 } 2791 }
2716 TLan_SetTimer( dev, (8*HZ), TLAN_TIMER_PHY_FINISH_AN ); 2792 TLan_SetTimer( dev, (8*HZ), TLAN_TIMER_PHY_FINISH_AN );
2717 return; 2793 return;
@@ -2727,7 +2803,9 @@ static void TLan_PhyFinishAutoNeg( struct net_device *dev )
2727 priv->tlanFullDuplex = TRUE; 2803 priv->tlanFullDuplex = TRUE;
2728 } 2804 }
2729 2805
2730 if ( ( ! ( mode & 0x0180 ) ) && ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) && ( priv->phyNum != 0 ) ) { 2806 if ( ( ! ( mode & 0x0180 ) ) &&
2807 ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) &&
2808 ( priv->phyNum != 0 ) ) {
2731 priv->phyNum = 0; 2809 priv->phyNum = 0;
2732 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN; 2810 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2733 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data ); 2811 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data );
@@ -2736,12 +2814,14 @@ static void TLan_PhyFinishAutoNeg( struct net_device *dev )
2736 } 2814 }
2737 2815
2738 if ( priv->phyNum == 0 ) { 2816 if ( priv->phyNum == 0 ) {
2739 if ( ( priv->duplex == TLAN_DUPLEX_FULL ) || ( an_adv & an_lpa & 0x0040 ) ) { 2817 if ( ( priv->duplex == TLAN_DUPLEX_FULL ) ||
2740 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB | MII_GC_DUPLEX ); 2818 ( an_adv & an_lpa & 0x0040 ) ) {
2741 printk( "TLAN: Starting internal PHY with FULL-DUPLEX\n" ); 2819 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL,
2820 MII_GC_AUTOENB | MII_GC_DUPLEX );
2821 pr_info("TLAN: Starting internal PHY with FULL-DUPLEX\n" );
2742 } else { 2822 } else {
2743 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB ); 2823 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB );
2744 printk( "TLAN: Starting internal PHY with HALF-DUPLEX\n" ); 2824 pr_info( "TLAN: Starting internal PHY with HALF-DUPLEX\n" );
2745 } 2825 }
2746 } 2826 }
2747 2827
@@ -3149,7 +3229,8 @@ static int TLan_EeSendByte( u16 io_base, u8 data, int stop )
3149 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio ); 3229 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3150 3230
3151 if ( ( ! err ) && stop ) { 3231 if ( ( ! err ) && stop ) {
3152 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* STOP, raise data while clock is high */ 3232 /* STOP, raise data while clock is high */
3233 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
3153 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio ); 3234 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3154 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); 3235 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3155 } 3236 }
@@ -3212,7 +3293,8 @@ static void TLan_EeReceiveByte( u16 io_base, u8 *data, int stop )
3212 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); /* No ack = 1 (?) */ 3293 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); /* No ack = 1 (?) */
3213 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio ); 3294 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3214 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio ); 3295 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3215 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* STOP, raise data while clock is high */ 3296 /* STOP, raise data while clock is high */
3297 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
3216 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio ); 3298 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3217 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); 3299 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3218 } 3300 }
diff --git a/drivers/net/tlan.h b/drivers/net/tlan.h
index 2c0abfb0c644..4b82f283e985 100644
--- a/drivers/net/tlan.h
+++ b/drivers/net/tlan.h
@@ -13,8 +13,6 @@
13 * This software may be used and distributed according to the terms 13 * This software may be used and distributed according to the terms
14 * of the GNU General Public License, incorporated herein by reference. 14 * of the GNU General Public License, incorporated herein by reference.
15 * 15 *
16 ** This file is best viewed/edited with tabstop=4, colums>=132
17 *
18 * 16 *
19 * Dec 10, 1999 Torben Mathiasen <torben.mathiasen@compaq.com> 17 * Dec 10, 1999 Torben Mathiasen <torben.mathiasen@compaq.com>
20 * New Maintainer 18 * New Maintainer
@@ -45,7 +43,9 @@
45#define TLAN_IGNORE 0 43#define TLAN_IGNORE 0
46#define TLAN_RECORD 1 44#define TLAN_RECORD 1
47 45
48#define TLAN_DBG(lvl, format, args...) if (debug&lvl) printk(KERN_DEBUG "TLAN: " format, ##args ); 46#define TLAN_DBG(lvl, format, args...) \
47 do { if (debug&lvl) printk(KERN_DEBUG "TLAN: " format, ##args ); } while(0)
48
49#define TLAN_DEBUG_GNRL 0x0001 49#define TLAN_DEBUG_GNRL 0x0001
50#define TLAN_DEBUG_TX 0x0002 50#define TLAN_DEBUG_TX 0x0002
51#define TLAN_DEBUG_RX 0x0004 51#define TLAN_DEBUG_RX 0x0004
@@ -515,12 +515,18 @@ static inline void TLan_DioWrite32(u16 base_addr, u16 internal_addr, u32 data)
515 * xor( a, xor( b, xor( c, xor( d, xor( e, xor( f, xor( g, h ) ) ) ) ) ) ) 515 * xor( a, xor( b, xor( c, xor( d, xor( e, xor( f, xor( g, h ) ) ) ) ) ) )
516 * #define DA( a, bit ) ( ( (u8) a[bit/8] ) & ( (u8) ( 1 << bit%8 ) ) ) 516 * #define DA( a, bit ) ( ( (u8) a[bit/8] ) & ( (u8) ( 1 << bit%8 ) ) )
517 * 517 *
518 * hash = XOR8( DA(a,0), DA(a, 6), DA(a,12), DA(a,18), DA(a,24), DA(a,30), DA(a,36), DA(a,42) ); 518 * hash = XOR8( DA(a,0), DA(a, 6), DA(a,12), DA(a,18), DA(a,24),
519 * hash |= XOR8( DA(a,1), DA(a, 7), DA(a,13), DA(a,19), DA(a,25), DA(a,31), DA(a,37), DA(a,43) ) << 1; 519 * DA(a,30), DA(a,36), DA(a,42) );
520 * hash |= XOR8( DA(a,2), DA(a, 8), DA(a,14), DA(a,20), DA(a,26), DA(a,32), DA(a,38), DA(a,44) ) << 2; 520 * hash |= XOR8( DA(a,1), DA(a, 7), DA(a,13), DA(a,19), DA(a,25),
521 * hash |= XOR8( DA(a,3), DA(a, 9), DA(a,15), DA(a,21), DA(a,27), DA(a,33), DA(a,39), DA(a,45) ) << 3; 521 * DA(a,31), DA(a,37), DA(a,43) ) << 1;
522 * hash |= XOR8( DA(a,4), DA(a,10), DA(a,16), DA(a,22), DA(a,28), DA(a,34), DA(a,40), DA(a,46) ) << 4; 522 * hash |= XOR8( DA(a,2), DA(a, 8), DA(a,14), DA(a,20), DA(a,26),
523 * hash |= XOR8( DA(a,5), DA(a,11), DA(a,17), DA(a,23), DA(a,29), DA(a,35), DA(a,41), DA(a,47) ) << 5; 523 * DA(a,32), DA(a,38), DA(a,44) ) << 2;
524 * hash |= XOR8( DA(a,3), DA(a, 9), DA(a,15), DA(a,21), DA(a,27),
525 * DA(a,33), DA(a,39), DA(a,45) ) << 3;
526 * hash |= XOR8( DA(a,4), DA(a,10), DA(a,16), DA(a,22), DA(a,28),
527 * DA(a,34), DA(a,40), DA(a,46) ) << 4;
528 * hash |= XOR8( DA(a,5), DA(a,11), DA(a,17), DA(a,23), DA(a,29),
529 * DA(a,35), DA(a,41), DA(a,47) ) << 5;
524 * 530 *
525 */ 531 */
526static inline u32 TLan_HashFunc( const u8 *a ) 532static inline u32 TLan_HashFunc( const u8 *a )
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-20 15:14:53 -0400