aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorDoug Anderson <dianders@chromium.org>2014-08-25 18:59:26 -0400
committerHeiko Stuebner <heiko@sntech.de>2014-08-27 17:29:10 -0400
commitdf542df3f572af7e5f8279e78d86614483d9670d (patch)
tree86f2f44e43f9b73e2d6a570ebec83ce9a6bf1fb6
parent91ff8cd8c3aae34a26b517506cc1ff809401a490 (diff)
ARM: dts: Add main PWM info to rk3288
This adds the PWM info (other than the VOP PWM) to the main rk3288 dtsi file. Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r--arch/arm/boot/dts/rk3288.dtsi68
1 files changed, 68 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 36be7bb55a01..7342b2453d6f 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -261,6 +261,50 @@
261 status = "disabled"; 261 status = "disabled";
262 }; 262 };
263 263
264 pwm0: pwm@ff680000 {
265 compatible = "rockchip,rk3288-pwm";
266 reg = <0xff680000 0x10>;
267 #pwm-cells = <3>;
268 pinctrl-names = "default";
269 pinctrl-0 = <&pwm0_pin>;
270 clocks = <&cru PCLK_PWM>;
271 clock-names = "pwm";
272 status = "disabled";
273 };
274
275 pwm1: pwm@ff680010 {
276 compatible = "rockchip,rk3288-pwm";
277 reg = <0xff680010 0x10>;
278 #pwm-cells = <3>;
279 pinctrl-names = "default";
280 pinctrl-0 = <&pwm1_pin>;
281 clocks = <&cru PCLK_PWM>;
282 clock-names = "pwm";
283 status = "disabled";
284 };
285
286 pwm2: pwm@ff680020 {
287 compatible = "rockchip,rk3288-pwm";
288 reg = <0xff680020 0x10>;
289 #pwm-cells = <3>;
290 pinctrl-names = "default";
291 pinctrl-0 = <&pwm2_pin>;
292 clocks = <&cru PCLK_PWM>;
293 clock-names = "pwm";
294 status = "disabled";
295 };
296
297 pwm3: pwm@ff680030 {
298 compatible = "rockchip,rk3288-pwm";
299 reg = <0xff680030 0x10>;
300 #pwm-cells = <2>;
301 pinctrl-names = "default";
302 pinctrl-0 = <&pwm3_pin>;
303 clocks = <&cru PCLK_PWM>;
304 clock-names = "pwm";
305 status = "disabled";
306 };
307
264 pmu: power-management@ff730000 { 308 pmu: power-management@ff730000 {
265 compatible = "rockchip,rk3288-pmu", "syscon"; 309 compatible = "rockchip,rk3288-pmu", "syscon";
266 reg = <0xff730000 0x100>; 310 reg = <0xff730000 0x100>;
@@ -611,5 +655,29 @@
611 rockchip,pins = <5 15 3 &pcfg_pull_none>; 655 rockchip,pins = <5 15 3 &pcfg_pull_none>;
612 }; 656 };
613 }; 657 };
658
659 pwm0 {
660 pwm0_pin: pwm0-pin {
661 rockchip,pins = <7 0 RK_FUNC_1 &pcfg_pull_none>;
662 };
663 };
664
665 pwm1 {
666 pwm1_pin: pwm1-pin {
667 rockchip,pins = <7 1 RK_FUNC_1 &pcfg_pull_none>;
668 };
669 };
670
671 pwm2 {
672 pwm2_pin: pwm2-pin {
673 rockchip,pins = <7 22 3 &pcfg_pull_none>;
674 };
675 };
676
677 pwm3 {
678 pwm3_pin: pwm3-pin {
679 rockchip,pins = <7 23 3 &pcfg_pull_none>;
680 };
681 };
614 }; 682 };
615}; 683};