diff options
| author | Egbert Eich <eich@suse.com> | 2013-07-17 09:07:27 -0400 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2013-07-29 19:44:42 -0400 |
| commit | de7500eafc96274654201bd585fb85e2814ef9b2 (patch) | |
| tree | 4e5a3782b903c7ebeb04011e6a0c8ec82dddbaab | |
| parent | da55839870263563cc70e700a7f58090a860576d (diff) | |
drm/mgag200: Fix LUT programming for 16bpp
Since there are only 32 (64) distinct color values for each color
in 16bpp Matrox hardware expects those in a 'dense' manner, ie in
the first 32 (64) entries of the respective color.
Signed-off-by: Egbert Eich <eich@suse.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
| -rw-r--r-- | drivers/gpu/drm/mgag200/mgag200_mode.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index c8983f92bc67..503a414cbdad 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c | |||
| @@ -29,6 +29,7 @@ static void mga_crtc_load_lut(struct drm_crtc *crtc) | |||
| 29 | struct mga_crtc *mga_crtc = to_mga_crtc(crtc); | 29 | struct mga_crtc *mga_crtc = to_mga_crtc(crtc); |
| 30 | struct drm_device *dev = crtc->dev; | 30 | struct drm_device *dev = crtc->dev; |
| 31 | struct mga_device *mdev = dev->dev_private; | 31 | struct mga_device *mdev = dev->dev_private; |
| 32 | struct drm_framebuffer *fb = crtc->fb; | ||
| 32 | int i; | 33 | int i; |
| 33 | 34 | ||
| 34 | if (!crtc->enabled) | 35 | if (!crtc->enabled) |
| @@ -36,6 +37,28 @@ static void mga_crtc_load_lut(struct drm_crtc *crtc) | |||
| 36 | 37 | ||
| 37 | WREG8(DAC_INDEX + MGA1064_INDEX, 0); | 38 | WREG8(DAC_INDEX + MGA1064_INDEX, 0); |
| 38 | 39 | ||
| 40 | if (fb && fb->bits_per_pixel == 16) { | ||
| 41 | int inc = (fb->depth == 15) ? 8 : 4; | ||
| 42 | u8 r, b; | ||
| 43 | for (i = 0; i < MGAG200_LUT_SIZE; i += inc) { | ||
| 44 | if (fb->depth == 16) { | ||
| 45 | if (i > (MGAG200_LUT_SIZE >> 1)) { | ||
| 46 | r = b = 0; | ||
| 47 | } else { | ||
| 48 | r = mga_crtc->lut_r[i << 1]; | ||
| 49 | b = mga_crtc->lut_b[i << 1]; | ||
| 50 | } | ||
| 51 | } else { | ||
| 52 | r = mga_crtc->lut_r[i]; | ||
| 53 | b = mga_crtc->lut_b[i]; | ||
| 54 | } | ||
| 55 | /* VGA registers */ | ||
| 56 | WREG8(DAC_INDEX + MGA1064_COL_PAL, r); | ||
| 57 | WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc->lut_g[i]); | ||
| 58 | WREG8(DAC_INDEX + MGA1064_COL_PAL, b); | ||
| 59 | } | ||
| 60 | return; | ||
| 61 | } | ||
| 39 | for (i = 0; i < MGAG200_LUT_SIZE; i++) { | 62 | for (i = 0; i < MGAG200_LUT_SIZE; i++) { |
| 40 | /* VGA registers */ | 63 | /* VGA registers */ |
| 41 | WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc->lut_r[i]); | 64 | WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc->lut_r[i]); |
