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authorPaul Walmsley <paul@pwsan.com>2009-01-28 14:35:01 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-02-08 12:50:42 -0500
commitde07fedd79999668c4c112a2ba3eaf3d7434235c (patch)
treed8fe4daf87293447608594a5d65930667ffba181
parent3f0a820c4c0b4670fb5f164baa5582e23c2ef118 (diff)
[ARM] OMAP2/3 clock: don't use a barrier after clk_disable()
clk_disable() previously used an ARM barrier, wmb(), to try to ensure that the hardware write completed before continuing. There are some problems with this approach. The first problem is that wmb() only ensures that the write leaves the ARM -- not that it actually reaches the endpoint device. In this case, the endpoint device - either the PRM, CM, or SCM - is three interconnects away from the ARM, and the final interconnect is low-speed. And the OCP interconnects will post the write, who knows how long that will take to complete. So the wmb() is not really what we want. Worse, the wmb() is indiscriminate; it will cause the ARM to flush any other unrelated buffered writes and wait for the local interconnect to acknowledge them - potentially very expensive. This first problem could be fixed by doing a readback of the same PRM/CM/SCM register. Since these devices use a single OCP thread, this will cause the MPU to wait for the write to complete. But the primary problem is a conceptual one: clk_disable() should not need any kind of barrier. clk_enable() needs one since device driver code must not access a device until its clocks are known to be enabled. But clk_disable() has no such restriction. Since blocking the MPU on a PRM/CM/SCM write can be a very high-latency operation - several hundred MPU cycles - it's worth avoiding this barrier if possible. linux-omap source commit is f4aacad2c0ed1055622d5c1e910befece24ef0e2. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mach-omap2/clock.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 38a7898d0ce3..0803c8c811f4 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -353,7 +353,7 @@ static void omap2_dflt_clk_disable(struct clk *clk)
353 else 353 else
354 v &= ~(1 << clk->enable_bit); 354 v &= ~(1 << clk->enable_bit);
355 __raw_writel(v, clk->enable_reg); 355 __raw_writel(v, clk->enable_reg);
356 wmb(); 356 /* No OCP barrier needed here since it is a disable operation */
357} 357}
358 358
359const struct clkops clkops_omap2_dflt_wait = { 359const struct clkops clkops_omap2_dflt_wait = {